JPS5562771A - Integrated circuit device - Google Patents
Integrated circuit deviceInfo
- Publication number
- JPS5562771A JPS5562771A JP13445578A JP13445578A JPS5562771A JP S5562771 A JPS5562771 A JP S5562771A JP 13445578 A JP13445578 A JP 13445578A JP 13445578 A JP13445578 A JP 13445578A JP S5562771 A JPS5562771 A JP S5562771A
- Authority
- JP
- Japan
- Prior art keywords
- layers
- oxide films
- poly
- masks
- speeds
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000012212 insulator Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To obtain a gate, which operates at high-speeds, and a memory cell with a high integrating degree of minute memory holding currents, by forming a source, a drain and a channel in poly Si layers made up on an insulator. CONSTITUTION:A P well 20 is manufactured on an N substrate 10, thermal oxide films 70-90 are built up by etching the substrate 10 by using the masks of SiO230, 40 and Si3N450, 60 and the masks are removed. Gate oxide films 111, 112 are mounted, non-addition poly Si layers 100, 110, 120 and 130 are selectively formed and a non-addition poly Si layer 114 is placed through oxide films. Layers 140, 150 are prepared by choicely removing the layer 114, and phosphor-added Sio2 is selectively laminated. P-layers 120, 160, 170, 13a, 150 and 13b are manufactured by diffusing B, and N-layers 10a, 140, 10b, 180, 110 and 190 are prepared by diffusing phosphor. And when these layers are covered with an oxide film, windows are opened and an Al electrode is attached, a C-MOS and a memory are simultaneously made up. According to this constitution, a high integrating degree is obtained at high-speeds, conduction currents are lessened and a suitable memory cell is acquired.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13445578A JPS5562771A (en) | 1978-11-02 | 1978-11-02 | Integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13445578A JPS5562771A (en) | 1978-11-02 | 1978-11-02 | Integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5562771A true JPS5562771A (en) | 1980-05-12 |
Family
ID=15128732
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13445578A Pending JPS5562771A (en) | 1978-11-02 | 1978-11-02 | Integrated circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5562771A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5760868A (en) * | 1980-09-29 | 1982-04-13 | Seiko Epson Corp | Cmos memory cell |
JPS57192069A (en) * | 1981-05-22 | 1982-11-26 | Hitachi Ltd | Insulated gate field effect semiconductor device |
US4593453A (en) * | 1982-06-01 | 1986-06-10 | Rockwell International Corporation | Two-level transistor structures and method utilizing minimal area therefor |
US4635089A (en) * | 1981-10-28 | 1987-01-06 | Kabushiki Kaisha Daini Seikosha | MIS-integrated semiconductor device |
US4799097A (en) * | 1987-07-29 | 1989-01-17 | Ncr Corporation | CMOS integrated devices in seeded islands |
JPH0214566A (en) * | 1989-04-10 | 1990-01-18 | Seiko Epson Corp | Cmos memory cell |
JPH0214564A (en) * | 1989-04-10 | 1990-01-18 | Seiko Epson Corp | Cmos memory cell |
JPH0221656A (en) * | 1989-04-10 | 1990-01-24 | Seiko Epson Corp | Cmos memory cell |
JPH0221655A (en) * | 1989-04-10 | 1990-01-24 | Seiko Epson Corp | Cmos memory cell |
JPH08213482A (en) * | 1995-11-24 | 1996-08-20 | Seiko Epson Corp | Production of thin-film transistor |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5055281A (en) * | 1973-09-12 | 1975-05-15 |
-
1978
- 1978-11-02 JP JP13445578A patent/JPS5562771A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5055281A (en) * | 1973-09-12 | 1975-05-15 |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5760868A (en) * | 1980-09-29 | 1982-04-13 | Seiko Epson Corp | Cmos memory cell |
JPH0435903B2 (en) * | 1980-09-29 | 1992-06-12 | Seiko Epson Corp | |
JPS57192069A (en) * | 1981-05-22 | 1982-11-26 | Hitachi Ltd | Insulated gate field effect semiconductor device |
US4635089A (en) * | 1981-10-28 | 1987-01-06 | Kabushiki Kaisha Daini Seikosha | MIS-integrated semiconductor device |
US4593453A (en) * | 1982-06-01 | 1986-06-10 | Rockwell International Corporation | Two-level transistor structures and method utilizing minimal area therefor |
US4799097A (en) * | 1987-07-29 | 1989-01-17 | Ncr Corporation | CMOS integrated devices in seeded islands |
JPH0214564A (en) * | 1989-04-10 | 1990-01-18 | Seiko Epson Corp | Cmos memory cell |
JPH0221656A (en) * | 1989-04-10 | 1990-01-24 | Seiko Epson Corp | Cmos memory cell |
JPH0221655A (en) * | 1989-04-10 | 1990-01-24 | Seiko Epson Corp | Cmos memory cell |
JPH0421349B2 (en) * | 1989-04-10 | 1992-04-09 | Seiko Epson Corp | |
JPH0214566A (en) * | 1989-04-10 | 1990-01-18 | Seiko Epson Corp | Cmos memory cell |
JPH0459783B2 (en) * | 1989-04-10 | 1992-09-24 | Seiko Epson Corp | |
JPH0459784B2 (en) * | 1989-04-10 | 1992-09-24 | Seiko Epson Corp | |
JPH08213482A (en) * | 1995-11-24 | 1996-08-20 | Seiko Epson Corp | Production of thin-film transistor |
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