JPS555563A - Semiconductor circuit - Google Patents

Semiconductor circuit

Info

Publication number
JPS555563A
JPS555563A JP7897278A JP7897278A JPS555563A JP S555563 A JPS555563 A JP S555563A JP 7897278 A JP7897278 A JP 7897278A JP 7897278 A JP7897278 A JP 7897278A JP S555563 A JPS555563 A JP S555563A
Authority
JP
Japan
Prior art keywords
mosfetq31
voltage
phittl
node
low level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7897278A
Other languages
Japanese (ja)
Other versions
JPS62613B2 (en
Inventor
Akira Osami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7897278A priority Critical patent/JPS555563A/en
Publication of JPS555563A publication Critical patent/JPS555563A/en
Publication of JPS62613B2 publication Critical patent/JPS62613B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01714—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To eliminate malfuction and unstable operation of the circuit, by adding the potential greater than the logical value to the connection point, when the signal fed to the gate of two MOSFET's in series connection has smaller logical value. CONSTITUTION:When phiTTL is from high to low level, if the low level of phiTTL is lower than the threshold voltage of MOSFET, MOSFETQ31, Q32, Q5 are not conducted, the voltage at the node 2 is increased, MOSFETQ2 is driven to non-saturation region with the bootstrap capacitor CIF to reach the VDD level. The node 4 is charged up to the level of (VDD-2Xthreshold voltage) with the conduction of MOSFETQ7, and MOSFETQ31 is perfectly non-conductive. When the low level of phiTTL is higher than the threshold voltage, although MOSFETQ31, Q32, Q5 are slightly conductive, when MOSFETQ7 is conducted to increase the voltage ar the node 4, MOSFETQ31 is immediately in perfect non-conduction.
JP7897278A 1978-06-28 1978-06-28 Semiconductor circuit Granted JPS555563A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7897278A JPS555563A (en) 1978-06-28 1978-06-28 Semiconductor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7897278A JPS555563A (en) 1978-06-28 1978-06-28 Semiconductor circuit

Publications (2)

Publication Number Publication Date
JPS555563A true JPS555563A (en) 1980-01-16
JPS62613B2 JPS62613B2 (en) 1987-01-08

Family

ID=13676805

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7897278A Granted JPS555563A (en) 1978-06-28 1978-06-28 Semiconductor circuit

Country Status (1)

Country Link
JP (1) JPS555563A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0130587A2 (en) * 1983-06-29 1985-01-09 Siemens Aktiengesellschaft Input level converter for a digital MOS circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0196922U (en) * 1987-12-17 1989-06-28

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5214074A (en) * 1975-06-24 1977-02-02 Agency Of Ind Science & Technol Method and device to automatically measure the indicator of amount of activated sludge

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5214074A (en) * 1975-06-24 1977-02-02 Agency Of Ind Science & Technol Method and device to automatically measure the indicator of amount of activated sludge

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0130587A2 (en) * 1983-06-29 1985-01-09 Siemens Aktiengesellschaft Input level converter for a digital MOS circuit

Also Published As

Publication number Publication date
JPS62613B2 (en) 1987-01-08

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