JPS5555524A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device

Info

Publication number
JPS5555524A
JPS5555524A JP12879978A JP12879978A JPS5555524A JP S5555524 A JPS5555524 A JP S5555524A JP 12879978 A JP12879978 A JP 12879978A JP 12879978 A JP12879978 A JP 12879978A JP S5555524 A JPS5555524 A JP S5555524A
Authority
JP
Japan
Prior art keywords
temperature
diffusion
furnace
push
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12879978A
Other languages
Japanese (ja)
Inventor
Gunji Mihashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12879978A priority Critical patent/JPS5555524A/en
Publication of JPS5555524A publication Critical patent/JPS5555524A/en
Pending legal-status Critical Current

Links

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  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE: To prevent contamination and crystal defects, by performing the diffusion and push-in diffusion of impurities, oxidation, anneaing, etc. in an identical furnace while controlling the temperature therein.
CONSTITUTION: A process in which a semiconductor substrate is set in a furnace at a low temperature of such a degree as to exert no influence upon the crystallizing property of the substrate; the temperature is gradually raised; and an impurity is diffused at a prescribed temperature to produce a diffused region, a push-in diffusion process, an oxidation process, an annealing process, etc. are sequentially effected in the same furnace.
COPYRIGHT: (C)1980,JPO&Japio
JP12879978A 1978-10-19 1978-10-19 Method of manufacturing semiconductor device Pending JPS5555524A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12879978A JPS5555524A (en) 1978-10-19 1978-10-19 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12879978A JPS5555524A (en) 1978-10-19 1978-10-19 Method of manufacturing semiconductor device

Publications (1)

Publication Number Publication Date
JPS5555524A true JPS5555524A (en) 1980-04-23

Family

ID=14993713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12879978A Pending JPS5555524A (en) 1978-10-19 1978-10-19 Method of manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPS5555524A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5815269A (en) * 1981-07-21 1983-01-28 Yamagata Nippon Denki Kk Manufacture of semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5815269A (en) * 1981-07-21 1983-01-28 Yamagata Nippon Denki Kk Manufacture of semiconductor element

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