JPS5539417A - Angle modulation circuit - Google Patents

Angle modulation circuit

Info

Publication number
JPS5539417A
JPS5539417A JP11177578A JP11177578A JPS5539417A JP S5539417 A JPS5539417 A JP S5539417A JP 11177578 A JP11177578 A JP 11177578A JP 11177578 A JP11177578 A JP 11177578A JP S5539417 A JPS5539417 A JP S5539417A
Authority
JP
Japan
Prior art keywords
frequency
pll
modulation
loop
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11177578A
Other languages
Japanese (ja)
Inventor
Tetsuo Onodera
Haruhiko Akiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP11177578A priority Critical patent/JPS5539417A/en
Publication of JPS5539417A publication Critical patent/JPS5539417A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0966—Modifications of modulator for regulating the mean frequency using a phase locked loop modulating the reference clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0941—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/095—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To obtain a high-performance PLL-type angle modulator circuit by using a simple modulation sensitivity compensating circuit. CONSTITUTION:Digital synthesizer 1 is used as the local oscillator of the receiver and consists of dividers 2 and 3, phase detector 4, LPF5 and VCO (Voltage Control Oscillator) 6. Thus the phase cycle is secured between the reception local oscillation frequency and the transmission output frequency via the PLL theory. Resistance R2 is provided in series to capacitor C0 and resistance R0 of the LPF structure, and the modulation signals are applied across R2. In terms of the loop constant calculation of the PLL, R2 is included into R0 in conception with no effect given to the loop characteristics. Furthermore, the reactance of C0 can be ignored to the modulation frequency by selecting an appropriate loop band width, thus ensuring the good modulation frequency characteristics. In addition, the ratio between resistances Rx and Ry is varies through switching of analog multiplexer 7 in order to give compensation to the variation of the deviation frequency for the VOC.
JP11177578A 1978-09-13 1978-09-13 Angle modulation circuit Pending JPS5539417A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11177578A JPS5539417A (en) 1978-09-13 1978-09-13 Angle modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11177578A JPS5539417A (en) 1978-09-13 1978-09-13 Angle modulation circuit

Publications (1)

Publication Number Publication Date
JPS5539417A true JPS5539417A (en) 1980-03-19

Family

ID=14569844

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11177578A Pending JPS5539417A (en) 1978-09-13 1978-09-13 Angle modulation circuit

Country Status (1)

Country Link
JP (1) JPS5539417A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6016706A (en) * 1984-06-25 1985-01-28 Matsushita Electric Ind Co Ltd Fm modulation circuit
US4573026A (en) * 1984-02-29 1986-02-25 Hewlett-Packard Company FM Modulator phase-locked loop with FM calibration
US7667553B2 (en) 2006-02-15 2010-02-23 Rohm Co., Ltd. Frequency modulator using PLL

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4573026A (en) * 1984-02-29 1986-02-25 Hewlett-Packard Company FM Modulator phase-locked loop with FM calibration
JPS6016706A (en) * 1984-06-25 1985-01-28 Matsushita Electric Ind Co Ltd Fm modulation circuit
US7667553B2 (en) 2006-02-15 2010-02-23 Rohm Co., Ltd. Frequency modulator using PLL

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