JPS5538764A - Index picture receiver - Google Patents

Index picture receiver

Info

Publication number
JPS5538764A
JPS5538764A JP11190178A JP11190178A JPS5538764A JP S5538764 A JPS5538764 A JP S5538764A JP 11190178 A JP11190178 A JP 11190178A JP 11190178 A JP11190178 A JP 11190178A JP S5538764 A JPS5538764 A JP S5538764A
Authority
JP
Japan
Prior art keywords
run
pulse
filament
clamped
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11190178A
Other languages
Japanese (ja)
Inventor
Masaharu Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11190178A priority Critical patent/JPS5538764A/en
Publication of JPS5538764A publication Critical patent/JPS5538764A/en
Pending legal-status Critical Current

Links

Landscapes

  • Video Image Reproduction Devices For Color Tv Systems (AREA)

Abstract

PURPOSE: To secure a steady sampling of the run-in pulse by providing the clamping reference filament featuring the width which is several times as wide as the run- in filament width at the horizontal scanning start side of the run-in filament.
CONSTITUTION: The clamp reference pulse, the run-in pulse and the index pulse, which are amplified via preamplifier 29 after detection through photoelectric conversion element 23, are clamped at run-in clamping circuit 30 so that the peak value of the run-in pulse may be an optional DC level. The clamped run-in signal is sliced at slicing circuit 32 with an optional level, and only run-in pulse is sampled at gate circuit 33. Then the run-in pulse is applied to divider 25 via counter 34.
COPYRIGHT: (C)1980,JPO&Japio
JP11190178A 1978-09-12 1978-09-12 Index picture receiver Pending JPS5538764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11190178A JPS5538764A (en) 1978-09-12 1978-09-12 Index picture receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11190178A JPS5538764A (en) 1978-09-12 1978-09-12 Index picture receiver

Publications (1)

Publication Number Publication Date
JPS5538764A true JPS5538764A (en) 1980-03-18

Family

ID=14572961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11190178A Pending JPS5538764A (en) 1978-09-12 1978-09-12 Index picture receiver

Country Status (1)

Country Link
JP (1) JPS5538764A (en)

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