JPS5535513A - Automatic gain control circuit - Google Patents
Automatic gain control circuitInfo
- Publication number
- JPS5535513A JPS5535513A JP10831278A JP10831278A JPS5535513A JP S5535513 A JPS5535513 A JP S5535513A JP 10831278 A JP10831278 A JP 10831278A JP 10831278 A JP10831278 A JP 10831278A JP S5535513 A JPS5535513 A JP S5535513A
- Authority
- JP
- Japan
- Prior art keywords
- burst
- amplitude
- control
- reference voltage
- attenuator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
Landscapes
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To make the amplitude of each burst of an input signal constant in the demodulator in a TDMA digital link of satellite communication. CONSTITUTION:An input from a terminal 1 is applied to a peak detector 3 through a voltage control attenuator 2, detects a peak value of the whole bursts, is compared with a reference voltage 4, amplified 6, after filtered 7 on its wave, enters into a attenuator 2, and when the peak value of the input is larger than the reference value, it organizes a loop to implement attenuation and control of it. Further, since there are a large and small difference among each burst, these signals are amplified 9, sent to a voltage control variable attenuator 12, and the output is detected 10 on its burst amplitude, compared with the reference voltage by a digital comparator 11, with a controller 13 stored the difference from the reference voltage of each burst in before 1 frame, defines control volume of the next following frame, with which stablization of amplitude control and unification of the amplitude of each burst are implemented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10831278A JPS5535513A (en) | 1978-09-04 | 1978-09-04 | Automatic gain control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10831278A JPS5535513A (en) | 1978-09-04 | 1978-09-04 | Automatic gain control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5535513A true JPS5535513A (en) | 1980-03-12 |
Family
ID=14481513
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10831278A Pending JPS5535513A (en) | 1978-09-04 | 1978-09-04 | Automatic gain control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5535513A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0114066A2 (en) * | 1983-01-14 | 1984-07-25 | Nec Corporation | Automatic gain control circuit for burst signal communication system |
-
1978
- 1978-09-04 JP JP10831278A patent/JPS5535513A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0114066A2 (en) * | 1983-01-14 | 1984-07-25 | Nec Corporation | Automatic gain control circuit for burst signal communication system |
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