JPS5525820A - Buffer memory device - Google Patents
Buffer memory deviceInfo
- Publication number
- JPS5525820A JPS5525820A JP9705578A JP9705578A JPS5525820A JP S5525820 A JPS5525820 A JP S5525820A JP 9705578 A JP9705578 A JP 9705578A JP 9705578 A JP9705578 A JP 9705578A JP S5525820 A JPS5525820 A JP S5525820A
- Authority
- JP
- Japan
- Prior art keywords
- error
- memory part
- register
- signals
- operating system
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Debugging And Monitoring (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
PURPOSE: To avoid the process discontinuation by continuing the process up to the prescribed frequency although the error may occur at the data memory part and thus stopping the announcement to the operating system to be given due to occurrence of the error.
CONSTITUTION: In case some error is detected at data memory part 8, the block having the error is registered not to be used thereafter. For this purpose, the logic product is secured via AND circuit 5 between signals 106aW106d produced at control circuit 4 and the signals 102aW102d read out from memory part 2e of directory memory part 2. Then output signals 107aW107d are written into application possibility display part 2e, and at the same time counter register 11 is given +1. If the value of register 11 coincides with the value of register 12 which designates the error generation frequency, machine error signal 115 turns to logic "1" to be informed to the operating system. And in the case of noncoincidence, the block having the error becomes unusable but the process is continued as before.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9705578A JPS5525820A (en) | 1978-08-08 | 1978-08-08 | Buffer memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9705578A JPS5525820A (en) | 1978-08-08 | 1978-08-08 | Buffer memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5525820A true JPS5525820A (en) | 1980-02-23 |
Family
ID=14181965
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9705578A Pending JPS5525820A (en) | 1978-08-08 | 1978-08-08 | Buffer memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5525820A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58128099A (en) * | 1982-01-25 | 1983-07-30 | Hitachi Ltd | Failure processing system |
JPS617959A (en) * | 1984-06-22 | 1986-01-14 | Fujitsu Ltd | Control system of tag storage device |
US5537621A (en) * | 1991-11-18 | 1996-07-16 | Bull, S.A. | Integrated memory, method for managing it, and resultant information processing system |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5183429A (en) * | 1975-01-20 | 1976-07-22 | Tokyo Shibaura Electric Co | |
JPS51113427A (en) * | 1975-03-28 | 1976-10-06 | Toshiba Corp | Information processing device |
JPS5279736A (en) * | 1975-12-26 | 1977-07-05 | Hitachi Ltd | Memory error detecting control system |
JPS5341948A (en) * | 1976-09-29 | 1978-04-15 | Hitachi Ltd | Information processor |
JPS54106133A (en) * | 1978-02-09 | 1979-08-20 | Fujitsu Ltd | Buffer memory fault control system |
-
1978
- 1978-08-08 JP JP9705578A patent/JPS5525820A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5183429A (en) * | 1975-01-20 | 1976-07-22 | Tokyo Shibaura Electric Co | |
JPS51113427A (en) * | 1975-03-28 | 1976-10-06 | Toshiba Corp | Information processing device |
JPS5279736A (en) * | 1975-12-26 | 1977-07-05 | Hitachi Ltd | Memory error detecting control system |
JPS5341948A (en) * | 1976-09-29 | 1978-04-15 | Hitachi Ltd | Information processor |
JPS54106133A (en) * | 1978-02-09 | 1979-08-20 | Fujitsu Ltd | Buffer memory fault control system |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58128099A (en) * | 1982-01-25 | 1983-07-30 | Hitachi Ltd | Failure processing system |
JPS617959A (en) * | 1984-06-22 | 1986-01-14 | Fujitsu Ltd | Control system of tag storage device |
US5537621A (en) * | 1991-11-18 | 1996-07-16 | Bull, S.A. | Integrated memory, method for managing it, and resultant information processing system |
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