JPS55165030A - Signal transmission circuit of dynamic type - Google Patents
Signal transmission circuit of dynamic typeInfo
- Publication number
- JPS55165030A JPS55165030A JP7218579A JP7218579A JPS55165030A JP S55165030 A JPS55165030 A JP S55165030A JP 7218579 A JP7218579 A JP 7218579A JP 7218579 A JP7218579 A JP 7218579A JP S55165030 A JPS55165030 A JP S55165030A
- Authority
- JP
- Japan
- Prior art keywords
- level
- circuit
- nmostr
- circuits
- signal transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Shift Register Type Memory (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To reduce the power consumption of CMOS inverter IV circuit, by fixing the voltage on the transmission gate TG at stand-by to a potential either H or L level. CONSTITUTION:The dynamic type signal transmission circuit consists of IV circuits 1-4 consisting of PMOS transistor TR and NMOSTR, and TG5-7 consisting of PMOSTR and NMOSTR. The gate potentials of TG5-7 are controlled with the signal control circuit 80, which consists of the CMOSIV circuits 11-14 and the NOR circuit 14 consisting of CMOSTR. At stand-by, when the control signal input terminal T is made at L level and the terminal CS is at H level, the control signals phi1 and phi2 are both at L level. When the signals phi1 and phi2 are respectively fed to the gates of TG6 and TG5, 7, NMOSTR in TG5-7 is conductive, and no through- current flows to the circuits 2-4, and power consumption can be reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7218579A JPS55165030A (en) | 1979-06-11 | 1979-06-11 | Signal transmission circuit of dynamic type |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7218579A JPS55165030A (en) | 1979-06-11 | 1979-06-11 | Signal transmission circuit of dynamic type |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55165030A true JPS55165030A (en) | 1980-12-23 |
Family
ID=13481896
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7218579A Pending JPS55165030A (en) | 1979-06-11 | 1979-06-11 | Signal transmission circuit of dynamic type |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55165030A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6299998A (en) * | 1985-10-25 | 1987-05-09 | Hitachi Micro Comput Eng Ltd | Shift register |
JPS63268312A (en) * | 1987-02-04 | 1988-11-07 | アメリカン テレフォン アンド テレグラフ カムパニー | Current surge control integrated circuit |
-
1979
- 1979-06-11 JP JP7218579A patent/JPS55165030A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6299998A (en) * | 1985-10-25 | 1987-05-09 | Hitachi Micro Comput Eng Ltd | Shift register |
JPS63268312A (en) * | 1987-02-04 | 1988-11-07 | アメリカン テレフォン アンド テレグラフ カムパニー | Current surge control integrated circuit |
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