JPS55163918A - Logic gate circuit - Google Patents

Logic gate circuit

Info

Publication number
JPS55163918A
JPS55163918A JP7141179A JP7141179A JPS55163918A JP S55163918 A JPS55163918 A JP S55163918A JP 7141179 A JP7141179 A JP 7141179A JP 7141179 A JP7141179 A JP 7141179A JP S55163918 A JPS55163918 A JP S55163918A
Authority
JP
Japan
Prior art keywords
output
transistors
stage
voltage
dielectric strength
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7141179A
Other languages
Japanese (ja)
Inventor
Susumu Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7141179A priority Critical patent/JPS55163918A/en
Publication of JPS55163918A publication Critical patent/JPS55163918A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/088Transistor-transistor logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To increase output dielectric strength by combining pulldown transistors with phase-dividing stage and output-side transistors. CONSTITUTION:When either input terminal 1 is held at a level of ''0'', input-side and power-side transistors Q1 and Q7 conduct and phase-dividing stage and output- stage transistors Q2 and Q3 become unconductive, so that an output terminal where output-side and pulldown transistors Q3 and Q4 are also cut off will be held at a level of ''1''. In this state, when a high voltage is applied to terminal 3 from the outside, prior-stage and post-stage transistors Q5 and Q6 of an off-buffer become unconductive and no current flows to the output until an enough voltage to break down the emitter junction between both the transistors. Therefore, when an electric power voltage is 5V in this case, the output voltage is 17V or more and when 0V, it is 12V, so that the output dielectric strength will increase remarkably as compared with the conventional dielectric strength of 6V, etc.
JP7141179A 1979-06-07 1979-06-07 Logic gate circuit Pending JPS55163918A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7141179A JPS55163918A (en) 1979-06-07 1979-06-07 Logic gate circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7141179A JPS55163918A (en) 1979-06-07 1979-06-07 Logic gate circuit

Publications (1)

Publication Number Publication Date
JPS55163918A true JPS55163918A (en) 1980-12-20

Family

ID=13459740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7141179A Pending JPS55163918A (en) 1979-06-07 1979-06-07 Logic gate circuit

Country Status (1)

Country Link
JP (1) JPS55163918A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1984001066A1 (en) * 1982-09-10 1984-03-15 Advanced Micro Devices Inc High-speed schottky ttl gate apparatus
US4504744A (en) * 1983-01-13 1985-03-12 National Semiconductor Corporation Schottky TTL integrated logic gate circuit with reduced speed power product
JPS61263324A (en) * 1985-05-08 1986-11-21 バ−・ブラウン・コ−ポレ−シヨン Low voltage digital-analog converter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5599833A (en) * 1979-01-24 1980-07-30 Fairchild Camera Instr Co Transistor logic three state output device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5599833A (en) * 1979-01-24 1980-07-30 Fairchild Camera Instr Co Transistor logic three state output device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1984001066A1 (en) * 1982-09-10 1984-03-15 Advanced Micro Devices Inc High-speed schottky ttl gate apparatus
US4521699A (en) * 1982-09-10 1985-06-04 Advanced Micro Devices, Inc. High-speed schottky TTL gate apparatus
US4504744A (en) * 1983-01-13 1985-03-12 National Semiconductor Corporation Schottky TTL integrated logic gate circuit with reduced speed power product
JPS61263324A (en) * 1985-05-08 1986-11-21 バ−・ブラウン・コ−ポレ−シヨン Low voltage digital-analog converter
JPH0340538B2 (en) * 1985-05-08 1991-06-19

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