JPS55148465A - Manufacture of complementary mos integrated circuit device - Google Patents

Manufacture of complementary mos integrated circuit device

Info

Publication number
JPS55148465A
JPS55148465A JP5681079A JP5681079A JPS55148465A JP S55148465 A JPS55148465 A JP S55148465A JP 5681079 A JP5681079 A JP 5681079A JP 5681079 A JP5681079 A JP 5681079A JP S55148465 A JPS55148465 A JP S55148465A
Authority
JP
Japan
Prior art keywords
region
type
substrate
impurity density
mos transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5681079A
Other languages
Japanese (ja)
Inventor
Michihiro Oota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5681079A priority Critical patent/JPS55148465A/en
Publication of JPS55148465A publication Critical patent/JPS55148465A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the irregularity of the threshold voltage of a MOS transistor by forming a high impurity density region in a low impurity density silicon substrate and forming a C-MOS transistor in this region. CONSTITUTION:The impurity density of one conducting type such as, for example, n-type silicon substrate 1 is lowered, and N<+>-type region 2 of n-type high impurity density region is formed uniformly on one side surface of the substrate 1. Then, P<+>-type region 3 of reverse conducting type high impurity density region to the substrate 1 is formed at predetermined position of the substrate 1. Thereafter, there are formed a p-channel MOS transistor in the region 2 and an n-channel MOS transistor in the region 3. According to this, the irregularity of the n<+>-type and p<+>-type regions in the impurity density is very reduced as compared with that of the original substrate 1 and the irredularity of the threshold voltage of the MOS transistor formed in this region is therefore suppressed to low value so as to largely reduce the cost by improving the yield of the substrate.
JP5681079A 1979-05-09 1979-05-09 Manufacture of complementary mos integrated circuit device Pending JPS55148465A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5681079A JPS55148465A (en) 1979-05-09 1979-05-09 Manufacture of complementary mos integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5681079A JPS55148465A (en) 1979-05-09 1979-05-09 Manufacture of complementary mos integrated circuit device

Publications (1)

Publication Number Publication Date
JPS55148465A true JPS55148465A (en) 1980-11-19

Family

ID=13037728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5681079A Pending JPS55148465A (en) 1979-05-09 1979-05-09 Manufacture of complementary mos integrated circuit device

Country Status (1)

Country Link
JP (1) JPS55148465A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57186353A (en) * 1981-05-12 1982-11-16 Seiko Epson Corp Complementary metal oxide semiconductor type semiconductor device
JPS58170048A (en) * 1982-03-31 1983-10-06 Fujitsu Ltd Semiconductor device
JPS61183547U (en) * 1986-05-01 1986-11-15
US4724221A (en) * 1981-10-28 1988-02-09 U.S. Philips Corporation High-speed, low-power-dissipation integrated circuits
JPH0372668A (en) * 1990-07-26 1991-03-27 Seiko Epson Corp Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50139678A (en) * 1974-04-15 1975-11-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50139678A (en) * 1974-04-15 1975-11-08

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57186353A (en) * 1981-05-12 1982-11-16 Seiko Epson Corp Complementary metal oxide semiconductor type semiconductor device
US4724221A (en) * 1981-10-28 1988-02-09 U.S. Philips Corporation High-speed, low-power-dissipation integrated circuits
JPS58170048A (en) * 1982-03-31 1983-10-06 Fujitsu Ltd Semiconductor device
JPS61183547U (en) * 1986-05-01 1986-11-15
JPH0372668A (en) * 1990-07-26 1991-03-27 Seiko Epson Corp Semiconductor device

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