JPS55143856A - Data transmission system and its receiving circuit - Google Patents
Data transmission system and its receiving circuitInfo
- Publication number
- JPS55143856A JPS55143856A JP5169079A JP5169079A JPS55143856A JP S55143856 A JPS55143856 A JP S55143856A JP 5169079 A JP5169079 A JP 5169079A JP 5169079 A JP5169079 A JP 5169079A JP S55143856 A JPS55143856 A JP S55143856A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- hcd
- fcd
- data transmission
- nand
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0052—Realisations of complexity reduction techniques, e.g. pipelining or use of look-up tables
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Communication Control (AREA)
Abstract
PURPOSE:To simplify a circuit constitution in the receiving side by causing one of plural Hamming code data HCD and Fleming code data FCD to agree with each other. CONSTITUTION:The parallel output signal of shift register 2 is applied to HCD correcting circuit 6, and HCD is accurately corrected even for the error of one bit or less, and the signal is taken out. The output signal of circuit 6 is applied to NAND gate 7, and the pulse from terminal 8 and the pulse from the FF consisting of NAND gates 10 and 11 are operated for NAND, and FCD agreeing with HCD is detected. Consequently, circuit 6 is used commonly as a part of the FCD detecting circuit, and the receiving-side circuit can be cheap, and corrected data is always used by circuit 6, so that sure data transmission possible.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54051690A JPS5836865B2 (en) | 1979-04-26 | 1979-04-26 | Data transmission system and its receiving circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54051690A JPS5836865B2 (en) | 1979-04-26 | 1979-04-26 | Data transmission system and its receiving circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55143856A true JPS55143856A (en) | 1980-11-10 |
JPS5836865B2 JPS5836865B2 (en) | 1983-08-12 |
Family
ID=12893888
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54051690A Expired JPS5836865B2 (en) | 1979-04-26 | 1979-04-26 | Data transmission system and its receiving circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5836865B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60142673U (en) * | 1984-03-02 | 1985-09-21 | フランスベッド株式会社 | comforter |
JPH0720928U (en) * | 1993-10-01 | 1995-04-18 | 株式会社大阪西川 | Summer bedding |
-
1979
- 1979-04-26 JP JP54051690A patent/JPS5836865B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5836865B2 (en) | 1983-08-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS55143856A (en) | Data transmission system and its receiving circuit | |
GB1087938A (en) | A data transmission system with error detection | |
JPS5592054A (en) | Unique word detection circuit | |
IE780442L (en) | Detecting errors in digital transmission | |
ES8405216A1 (en) | Apparatus for detecting errors in a digital data stream encoded in a double density code | |
GB2268296B (en) | Digital signal comparison circuitry | |
JPS5452907A (en) | Data transfer unit | |
JPS56149849A (en) | Parity error detection system | |
JPS57106966A (en) | Error check system for data transmission bus | |
JPS5362905A (en) | Alarm information collection system | |
JPS56162078A (en) | Electronic clock | |
JPS5372412A (en) | Signal transmission system | |
JPS5741069A (en) | Inter-frame encoding system | |
GB1508915A (en) | Error detection in digital transmission systems | |
SU585616A1 (en) | Device for detecting errors of bipolar signal | |
JPS55136744A (en) | Detection circuit for code rule error | |
SU1662009A1 (en) | Device for checking fibonacci two-code | |
JPS5744351A (en) | Code error detecting circuit | |
JPS5569867A (en) | Checking method for dot pattern | |
JPS5556264A (en) | Error detection circuit | |
NL7408277A (en) | Coding system for time stacked signals and direction of transition - uses 3 bits code words denoting condition of original period and possible transition | |
JPS57100541A (en) | Error checking circuit | |
JPS5429509A (en) | Error detection system in differential phase modulation | |
JPS5455339A (en) | Error detecting correction system | |
JPS5344787A (en) | Transmitter and receiver |