JPS55135404A - Amplifying circuit - Google Patents

Amplifying circuit

Info

Publication number
JPS55135404A
JPS55135404A JP4280479A JP4280479A JPS55135404A JP S55135404 A JPS55135404 A JP S55135404A JP 4280479 A JP4280479 A JP 4280479A JP 4280479 A JP4280479 A JP 4280479A JP S55135404 A JPS55135404 A JP S55135404A
Authority
JP
Japan
Prior art keywords
balanced
unbalanced
connection
output
virtual
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4280479A
Other languages
Japanese (ja)
Inventor
Wasaku Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4280479A priority Critical patent/JPS55135404A/en
Publication of JPS55135404A publication Critical patent/JPS55135404A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B3/00Line transmission systems
    • H04B3/02Details
    • H04B3/30Reducing interference caused by unbalanced currents in a normally balanced line

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To eliminate both the connection loss and the mutual interference of the power for the repeater which is used for both the balanced and unbalanced circuit at one time, by securing connection between the balanced and unbalanced signals via the virtual O-impedance circuit part. CONSTITUTION:The current connection is given to the output of amplifier E featuring the balanced output and that of amplifier F featuring the unbalanced output each at the virtual O-impedance point of inverse amplifiers G and H, and then these outputs are sent out to the line. Then the connection is given between the balanced and unbalanced siganals at the virtual O-impedance point, and thus the interference can be prevented between the balanced and unbalanced circuits. Furthermore, a highly effective signal connection is possible with no power loss since at the input side of the output amplifier.
JP4280479A 1979-04-09 1979-04-09 Amplifying circuit Pending JPS55135404A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4280479A JPS55135404A (en) 1979-04-09 1979-04-09 Amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4280479A JPS55135404A (en) 1979-04-09 1979-04-09 Amplifying circuit

Publications (1)

Publication Number Publication Date
JPS55135404A true JPS55135404A (en) 1980-10-22

Family

ID=12646141

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4280479A Pending JPS55135404A (en) 1979-04-09 1979-04-09 Amplifying circuit

Country Status (1)

Country Link
JP (1) JPS55135404A (en)

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