JPS55112038A - Bootstrap-type circuit - Google Patents
Bootstrap-type circuitInfo
- Publication number
- JPS55112038A JPS55112038A JP1925579A JP1925579A JPS55112038A JP S55112038 A JPS55112038 A JP S55112038A JP 1925579 A JP1925579 A JP 1925579A JP 1925579 A JP1925579 A JP 1925579A JP S55112038 A JPS55112038 A JP S55112038A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- point
- terminal
- gate
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01714—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To realize a simple-constitution circuit which features a high-speed operation and small amount of power consumption at the queuing time, by securing both the capacitor charging concurrently with application of the input voltage and the bootstrap function via the capacitor at one time. CONSTITUTION:MOSFET5 is connected between point A and the earth point, and the gate is connected to input terminal C along with the gate of MOSFET4. The high-level voltage is always applied to terminal C, and FET4 and 5 are ON. And voltage VA and VB of point A and output terminal B are at the earth potential each. When input voltage VC to terminal C becomes to a low level, voltage VA at point A increases quickly to make MOSFET2 conduct. And then voltage VA is raised up to secure the ON state for FET2, and output voltage VB holds VDD. When voltage VC turns to a high level again, both voltage VB and VA are set to the earth potential again.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1925579A JPS55112038A (en) | 1979-02-20 | 1979-02-20 | Bootstrap-type circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1925579A JPS55112038A (en) | 1979-02-20 | 1979-02-20 | Bootstrap-type circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55112038A true JPS55112038A (en) | 1980-08-29 |
Family
ID=11994311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1925579A Pending JPS55112038A (en) | 1979-02-20 | 1979-02-20 | Bootstrap-type circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55112038A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5706189A (en) * | 1996-02-15 | 1998-01-06 | Mitsubishi Denki Kabushiki Kaisha | Method of driving a power converter |
JP2011259418A (en) * | 2010-05-13 | 2011-12-22 | Semiconductor Energy Lab Co Ltd | Buffer circuit |
JP2015158678A (en) * | 2015-03-12 | 2015-09-03 | 株式会社半導体エネルギー研究所 | Semiconductor device, display device, display module, and electronic apparatus |
-
1979
- 1979-02-20 JP JP1925579A patent/JPS55112038A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5706189A (en) * | 1996-02-15 | 1998-01-06 | Mitsubishi Denki Kabushiki Kaisha | Method of driving a power converter |
JP2011259418A (en) * | 2010-05-13 | 2011-12-22 | Semiconductor Energy Lab Co Ltd | Buffer circuit |
JP2015158678A (en) * | 2015-03-12 | 2015-09-03 | 株式会社半導体エネルギー研究所 | Semiconductor device, display device, display module, and electronic apparatus |
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