JPS55110349A - Test processing system of one-chip microprocessor - Google Patents

Test processing system of one-chip microprocessor

Info

Publication number
JPS55110349A
JPS55110349A JP897879A JP897879A JPS55110349A JP S55110349 A JPS55110349 A JP S55110349A JP 897879 A JP897879 A JP 897879A JP 897879 A JP897879 A JP 897879A JP S55110349 A JPS55110349 A JP S55110349A
Authority
JP
Japan
Prior art keywords
vote
instruction
output
synchronizing
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP897879A
Other languages
Japanese (ja)
Other versions
JPS594051B2 (en
Inventor
Kensaku Wada
Koichi Fujita
Masaharu Kimura
Seigo Hibi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54008978A priority Critical patent/JPS594051B2/en
Publication of JPS55110349A publication Critical patent/JPS55110349A/en
Publication of JPS594051B2 publication Critical patent/JPS594051B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE: To enable a relatively-easy internal state check by exercising a supervision over arithmetic processing results on an external output bus.
CONSTITUTION: The processing of processor 1 is carried out synchronizing with clocks ϕ1 and ϕ2. Synchronizing with clock ϕ1, #1 instruction, vote output instruction, #3 instruction, etc., are read out from instruction storage memory 2, and synchronizing with clock ϕ2, processing results corresponding to respective instructions appear at terminals O0WO3 of output vote 16. Arithmetic results at terminals of output vote 16 are supervised on external output bus 17. Once the vote output instruction arrives, indication signal PLC is supplied and the vote output result is latched by latch circuits 4-0 and 4-1 via 3 synchronizing with clock ϕ2. The internal state of the microprocessor can therefore be checked easily.
COPYRIGHT: (C)1980,JPO&Japio
JP54008978A 1979-01-29 1979-01-29 One-chip microprocessor test processing method Expired JPS594051B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54008978A JPS594051B2 (en) 1979-01-29 1979-01-29 One-chip microprocessor test processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54008978A JPS594051B2 (en) 1979-01-29 1979-01-29 One-chip microprocessor test processing method

Publications (2)

Publication Number Publication Date
JPS55110349A true JPS55110349A (en) 1980-08-25
JPS594051B2 JPS594051B2 (en) 1984-01-27

Family

ID=11707771

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54008978A Expired JPS594051B2 (en) 1979-01-29 1979-01-29 One-chip microprocessor test processing method

Country Status (1)

Country Link
JP (1) JPS594051B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141760A (en) * 1981-02-25 1982-09-02 Nec Corp Semiconductor information processor
JPS59211123A (en) * 1983-05-16 1984-11-29 Nec Corp Semiconductor integrated circuit
JPS63121934A (en) * 1986-11-10 1988-05-26 Oki Electric Ind Co Ltd One-chip microcomputer for evaluation

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61169941A (en) * 1985-01-22 1986-07-31 Sony Corp Memory device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141760A (en) * 1981-02-25 1982-09-02 Nec Corp Semiconductor information processor
JPS6342299B2 (en) * 1981-02-25 1988-08-23 Nippon Electric Co
JPS59211123A (en) * 1983-05-16 1984-11-29 Nec Corp Semiconductor integrated circuit
JPS63121934A (en) * 1986-11-10 1988-05-26 Oki Electric Ind Co Ltd One-chip microcomputer for evaluation
US4969087A (en) * 1986-11-10 1990-11-06 Oki Electric Industry Co., Ltd. Single-chip microcomputer
US5088027A (en) * 1986-11-10 1992-02-11 Oki Electric Industry Co., Ltd. Single-chip microcomputer

Also Published As

Publication number Publication date
JPS594051B2 (en) 1984-01-27

Similar Documents

Publication Publication Date Title
EP0391173A3 (en) Debug peripheral for microcomputers, microprocessors and core processor integrated circuits and system using the same
JPS55110349A (en) Test processing system of one-chip microprocessor
JPS54122043A (en) Electronic computer
JPS5580158A (en) False fault generation control system
JPS5635233A (en) Fault detecting system for bus line
JPS5543422A (en) Electronic timer
JPS57203162A (en) One-chip microcomputer
JPS55119756A (en) Monitor system for processor
JPS5621250A (en) Instruction retrial system
JPS54133851A (en) Data transfer controller
JPS5330243A (en) Arithmetic processor
JPS5690314A (en) Microcomputer
JPS55112655A (en) Information processor
JPS53116750A (en) Portable electronic unit
JPS5585923A (en) Automatic power supply interrupter
JPS5638657A (en) Multiprocessor control system
JPS52130258A (en) Test circuit for computers
JPS5414647A (en) Signal processor
JPS5572261A (en) Logic unit
JPS5236437A (en) Address system
JPS5549759A (en) Signal processing system
JPS55159257A (en) Debugging system
JPS55935A (en) Signal synchronization system
JPS5533256A (en) Error detection control system
JPS55138680A (en) Event interval measuring apparatus