JPS549557A - Phase-locked loop circuit device - Google Patents
Phase-locked loop circuit deviceInfo
- Publication number
- JPS549557A JPS549557A JP7513677A JP7513677A JPS549557A JP S549557 A JPS549557 A JP S549557A JP 7513677 A JP7513677 A JP 7513677A JP 7513677 A JP7513677 A JP 7513677A JP S549557 A JPS549557 A JP S549557A
- Authority
- JP
- Japan
- Prior art keywords
- input
- phase
- circuit device
- locked loop
- loop circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 abstract 1
- 238000009434 installation Methods 0.000 abstract 1
- 230000010355 oscillation Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To secure the steady oscillation output in the free-running state by turning forcedly the filter input into the earth potential when the input is cut off through installation of the input cut-off detection circuit which detects the existence of the input plus the switch which switches the filter input terminal level to the earth potential level in a PLL circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7513677A JPS549557A (en) | 1977-06-24 | 1977-06-24 | Phase-locked loop circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7513677A JPS549557A (en) | 1977-06-24 | 1977-06-24 | Phase-locked loop circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS549557A true JPS549557A (en) | 1979-01-24 |
Family
ID=13567464
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7513677A Pending JPS549557A (en) | 1977-06-24 | 1977-06-24 | Phase-locked loop circuit device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS549557A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60158724A (en) * | 1984-01-27 | 1985-08-20 | Nec Corp | Phase locked circuit |
JPH0846511A (en) * | 1994-05-24 | 1996-02-16 | Matsushita Electric Ind Co Ltd | Clock generator and clock generating method |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4834407A (en) * | 1971-09-07 | 1973-05-18 |
-
1977
- 1977-06-24 JP JP7513677A patent/JPS549557A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4834407A (en) * | 1971-09-07 | 1973-05-18 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60158724A (en) * | 1984-01-27 | 1985-08-20 | Nec Corp | Phase locked circuit |
JPH0846511A (en) * | 1994-05-24 | 1996-02-16 | Matsushita Electric Ind Co Ltd | Clock generator and clock generating method |
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