JPS5490468A - Program reservation device - Google Patents

Program reservation device

Info

Publication number
JPS5490468A
JPS5490468A JP15763977A JP15763977A JPS5490468A JP S5490468 A JPS5490468 A JP S5490468A JP 15763977 A JP15763977 A JP 15763977A JP 15763977 A JP15763977 A JP 15763977A JP S5490468 A JPS5490468 A JP S5490468A
Authority
JP
Japan
Prior art keywords
gates
outputs
program reservation
reservation device
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15763977A
Other languages
Japanese (ja)
Other versions
JPS5854403B2 (en
Inventor
Kazuo Kitahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP15763977A priority Critical patent/JPS5854403B2/en
Publication of JPS5490468A publication Critical patent/JPS5490468A/en
Publication of JPS5854403B2 publication Critical patent/JPS5854403B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Circuits Of Receivers In General (AREA)
  • Electric Clocks (AREA)

Abstract

PURPOSE: To provide an inexpensive program reservation device which can easily operate to switch to reserved number at desired set time by a simple operation when selecting channel number, pressing a memory button, and setting a timer.
CONSTITUTION: When L-level channel selection instruction signal is applied to an input terminal 1 of a program reservation device at channel selecting time, a clock oscillator 2 is driven to produce 4-bit output from a binary counter 3 for counting the number of clocks from the oscillator 2. This output from the counter 3 is input to AND gates 10 to 13 and 19 to 22. The outputs from the AND gates 10 to 13 are stored in a latch circuit 5, and the 4-bit output is applied to the AND gates 15 to 18. The outputs from the AND gates 15 to 22 are applied to OR gates 19' to 22'. The binary outputs from the OR gates are converted by a decorder into decimal signals, which are applied to a channel selection circuit 7, which thereupon switches the tuning band or the like.
COPYRIGHT: (C)1979,JPO&Japio
JP15763977A 1977-12-27 1977-12-27 Program reservation device Expired JPS5854403B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15763977A JPS5854403B2 (en) 1977-12-27 1977-12-27 Program reservation device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15763977A JPS5854403B2 (en) 1977-12-27 1977-12-27 Program reservation device

Publications (2)

Publication Number Publication Date
JPS5490468A true JPS5490468A (en) 1979-07-18
JPS5854403B2 JPS5854403B2 (en) 1983-12-05

Family

ID=15654111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15763977A Expired JPS5854403B2 (en) 1977-12-27 1977-12-27 Program reservation device

Country Status (1)

Country Link
JP (1) JPS5854403B2 (en)

Also Published As

Publication number Publication date
JPS5854403B2 (en) 1983-12-05

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