JPS5489595A - Manufacture for semiconductor device - Google Patents

Manufacture for semiconductor device

Info

Publication number
JPS5489595A
JPS5489595A JP15966977A JP15966977A JPS5489595A JP S5489595 A JPS5489595 A JP S5489595A JP 15966977 A JP15966977 A JP 15966977A JP 15966977 A JP15966977 A JP 15966977A JP S5489595 A JPS5489595 A JP S5489595A
Authority
JP
Japan
Prior art keywords
pad
deficient
electrode
modules
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15966977A
Other languages
Japanese (ja)
Inventor
Hiromichi Asaoka
Kazuyuki Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15966977A priority Critical patent/JPS5489595A/en
Publication of JPS5489595A publication Critical patent/JPS5489595A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To make LSI into high density, by providing the measuring pad to the functional module electrodes for the entire circuit, removing the pad after discriminating and picking up only non-deficient modules via the pad, and performing mutual connection through the use of the remaining electrodes for the non-deficient modules. CONSTITUTION:The circuit functional modules 22 are formed on the Si substrate 21, they are covered with the SiO2 film 24, and the conduction pattern 23 connected to the modules 22 is fitted with opening. Next, PSG film 25 is coated on the entire surface, opening is made, and the conduction pattern 27 connected to the pattern 23 is formed, and the pad 26 to measure larger area linked with the module electrode 28 in contact with the pattern 27 is provided. The module is constituted as mentioned above, and the deficiency is discriminated by pushing on the test probe 31 on the pad 26, and the pad 26 is removed while tapering the side surface of the electrode 28, if it is not deficient. Further, if deficient, the pad 26 as well as the electrode 28 are removed and the selective electrode 51 is attached to the electrode 28 only for the non-deficient modules and mutual wiring is made.
JP15966977A 1977-12-27 1977-12-27 Manufacture for semiconductor device Pending JPS5489595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15966977A JPS5489595A (en) 1977-12-27 1977-12-27 Manufacture for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15966977A JPS5489595A (en) 1977-12-27 1977-12-27 Manufacture for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5489595A true JPS5489595A (en) 1979-07-16

Family

ID=15698741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15966977A Pending JPS5489595A (en) 1977-12-27 1977-12-27 Manufacture for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5489595A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS621247A (en) * 1985-02-14 1987-01-07 Nec Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS621247A (en) * 1985-02-14 1987-01-07 Nec Corp Manufacture of semiconductor device

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