JPS5471571A - Semiconductor device and production of the same - Google Patents

Semiconductor device and production of the same

Info

Publication number
JPS5471571A
JPS5471571A JP13877377A JP13877377A JPS5471571A JP S5471571 A JPS5471571 A JP S5471571A JP 13877377 A JP13877377 A JP 13877377A JP 13877377 A JP13877377 A JP 13877377A JP S5471571 A JPS5471571 A JP S5471571A
Authority
JP
Japan
Prior art keywords
positioning
piece
ceramic substrate
leads
metal pieces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13877377A
Other languages
Japanese (ja)
Other versions
JPS617014B2 (en
Inventor
Takashi Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13877377A priority Critical patent/JPS5471571A/en
Publication of JPS5471571A publication Critical patent/JPS5471571A/en
Publication of JPS617014B2 publication Critical patent/JPS617014B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/79—Apparatus for Tape Automated Bonding [TAB]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To improve workability and heat radiation characteristic by connecting metal pieces separately from leads for power source and signal of the device.
CONSTITUTION: Connecting pieces 12', 13' for holding and positioning are added to a lead frame 2'. Bump electrodes for connecting these are specially provided. External leads are suitably formed and if the piece 12' is gripped with a pincette and the pin 15 for positioning of a ceramic substrate is inserted into the hole 14 of the piece 13, then the entire external lead ends align to the wiring patterns 9 on the ceramic substrate. When the positions of the pins and holes are selected, packaging miss may be prevented and the respective metal pieces become heat sinks.
COPYRIGHT: (C)1979,JPO&Japio
JP13877377A 1977-11-17 1977-11-17 Semiconductor device and production of the same Granted JPS5471571A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13877377A JPS5471571A (en) 1977-11-17 1977-11-17 Semiconductor device and production of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13877377A JPS5471571A (en) 1977-11-17 1977-11-17 Semiconductor device and production of the same

Publications (2)

Publication Number Publication Date
JPS5471571A true JPS5471571A (en) 1979-06-08
JPS617014B2 JPS617014B2 (en) 1986-03-03

Family

ID=15229850

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13877377A Granted JPS5471571A (en) 1977-11-17 1977-11-17 Semiconductor device and production of the same

Country Status (1)

Country Link
JP (1) JPS5471571A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126863U (en) * 1980-02-26 1981-09-26
JPS6365660A (en) * 1986-09-05 1988-03-24 Nec Corp Semiconductor integrated circuit device
JPS6413754A (en) * 1987-07-07 1989-01-18 Nec Corp Flat package ic

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56126863U (en) * 1980-02-26 1981-09-26
JPS626694Y2 (en) * 1980-02-26 1987-02-16
JPS6365660A (en) * 1986-09-05 1988-03-24 Nec Corp Semiconductor integrated circuit device
JPS6413754A (en) * 1987-07-07 1989-01-18 Nec Corp Flat package ic

Also Published As

Publication number Publication date
JPS617014B2 (en) 1986-03-03

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