JPS5470741A - Printer control system - Google Patents

Printer control system

Info

Publication number
JPS5470741A
JPS5470741A JP13768077A JP13768077A JPS5470741A JP S5470741 A JPS5470741 A JP S5470741A JP 13768077 A JP13768077 A JP 13768077A JP 13768077 A JP13768077 A JP 13768077A JP S5470741 A JPS5470741 A JP S5470741A
Authority
JP
Japan
Prior art keywords
data
memory
timing
circuit
printer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13768077A
Other languages
Japanese (ja)
Inventor
Tadayoshi Yoshimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP13768077A priority Critical patent/JPS5470741A/en
Publication of JPS5470741A publication Critical patent/JPS5470741A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase substantailly the data transfer speed by designating the continuous numbers not by receiving the data continuously to substitute the data with the less number of the data in case the same characters, symbols or the spaces are printed.
CONSTITUTION: The data is received with connection to the data processor such as the electronic computer or the like, and the characters or symbols corresponding to the data are printed on the printing paper. In such printer, memory 1 to memorize the data given from the data processor and timing control circuit 2 to control the timing for memory 1 and other component circuits are installed. In addition, FF3 which is set when the data read out from memory 1 is special data ESC is provided, along with FF4 which is set by the reading timing for the data following data ESC. With set of FF4, the lower bit of data 5 is set to binary counter 6, and at the same time space data growing circuit 7 is actuated. Thus, the space data is identified between data 5 and circuit 7 to be applied to printer 8.
COPYRIGHT: (C)1979,JPO&Japio
JP13768077A 1977-11-16 1977-11-16 Printer control system Pending JPS5470741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13768077A JPS5470741A (en) 1977-11-16 1977-11-16 Printer control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13768077A JPS5470741A (en) 1977-11-16 1977-11-16 Printer control system

Publications (1)

Publication Number Publication Date
JPS5470741A true JPS5470741A (en) 1979-06-06

Family

ID=15204295

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13768077A Pending JPS5470741A (en) 1977-11-16 1977-11-16 Printer control system

Country Status (1)

Country Link
JP (1) JPS5470741A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848184A (en) * 1981-09-18 1983-03-22 Fujitsu Ltd Line printer control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5848184A (en) * 1981-09-18 1983-03-22 Fujitsu Ltd Line printer control system

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