JPS5458827A - Frequency converter - Google Patents

Frequency converter

Info

Publication number
JPS5458827A
JPS5458827A JP12444877A JP12444877A JPS5458827A JP S5458827 A JPS5458827 A JP S5458827A JP 12444877 A JP12444877 A JP 12444877A JP 12444877 A JP12444877 A JP 12444877A JP S5458827 A JPS5458827 A JP S5458827A
Authority
JP
Japan
Prior art keywords
load operation
time
load
quiescent time
current change
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12444877A
Other languages
Japanese (ja)
Other versions
JPS5632857B2 (en
Inventor
Kaoru Tamura
Hidetoshi Aizawa
Kiyoshi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP12444877A priority Critical patent/JPS5458827A/en
Publication of JPS5458827A publication Critical patent/JPS5458827A/en
Publication of JPS5632857B2 publication Critical patent/JPS5632857B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Ac-Ac Conversion (AREA)

Abstract

PURPOSE: To permit stable non-load operation by providing a means to set up the quiescent time for the main circuit current at the time of load operation and a means to set up the quiescent time for non-load operation, both of which are designed to operate changeably.
CONSTITUTION: When supplying power to the load 6 by converting power from the transformer 3 by making a phase-shifting control on the thyristor bridges 1 and 2, the non-load operation current change logic 15 to set up a quiescent time longer than the quiescent time at the time of load operation and the switches 16 and 17 are added in addition to the current change logic 9 to produce forward and reverse gate off signals at load operation time. Thus, when the main circuit switch 5 is opened to make non-load state, the switches 16 and 17 can be connected to the non-load operation current change logic 15 to sufficiently lengthen the quiescent time, so that the occurrence of anti-parallel short circuit cab be avoided and thus stable non-load operation is made possible
COPYRIGHT: (C)1979,JPO&Japio
JP12444877A 1977-10-19 1977-10-19 Frequency converter Granted JPS5458827A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12444877A JPS5458827A (en) 1977-10-19 1977-10-19 Frequency converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12444877A JPS5458827A (en) 1977-10-19 1977-10-19 Frequency converter

Publications (2)

Publication Number Publication Date
JPS5458827A true JPS5458827A (en) 1979-05-11
JPS5632857B2 JPS5632857B2 (en) 1981-07-30

Family

ID=14885757

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12444877A Granted JPS5458827A (en) 1977-10-19 1977-10-19 Frequency converter

Country Status (1)

Country Link
JP (1) JPS5458827A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63257779A (en) * 1987-04-15 1988-10-25 安藤　正基 Educational training system

Also Published As

Publication number Publication date
JPS5632857B2 (en) 1981-07-30

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