JPS5444811A - Synchronous transmission system - Google Patents

Synchronous transmission system

Info

Publication number
JPS5444811A
JPS5444811A JP11201977A JP11201977A JPS5444811A JP S5444811 A JPS5444811 A JP S5444811A JP 11201977 A JP11201977 A JP 11201977A JP 11201977 A JP11201977 A JP 11201977A JP S5444811 A JPS5444811 A JP S5444811A
Authority
JP
Japan
Prior art keywords
circuit
speed
register
receiving
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11201977A
Other languages
Japanese (ja)
Other versions
JPS623626B2 (en
Inventor
Hironori Mochizuki
Kumehiko Matsuda
Shigeru Kitano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP11201977A priority Critical patent/JPS5444811A/en
Publication of JPS5444811A publication Critical patent/JPS5444811A/en
Publication of JPS623626B2 publication Critical patent/JPS623626B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0262Arrangements for detecting the data rate of an incoming signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To improve transmission efficiency by individually discriminating information different in transmission speed by using a plural number of receiving register. CONSTITUTION:If transmission information is supplied to transmitting register 2 when low-speed transmitting clock signal CP1 and high-speed transmitting clock signal CP2 are both inputted to gate circuit 1, clock pulses are transmitted to the clock terminal of register 2 and the line driver circuit and the transmitted information is lined up and sent out to receiving register circuits 8 and 9 via receiver circuit 5. Line receiver circuit 6, on the other hand, drives receiving-register selector circuit 7 by receiving the clock signals. When the clock signal is low-speed CP1, circuit 8 is driven and when high-speed CP2, circuit 9 is driven selectively, thereby making it possible to improve the transmission efficiency.
JP11201977A 1977-09-16 1977-09-16 Synchronous transmission system Granted JPS5444811A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11201977A JPS5444811A (en) 1977-09-16 1977-09-16 Synchronous transmission system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11201977A JPS5444811A (en) 1977-09-16 1977-09-16 Synchronous transmission system

Publications (2)

Publication Number Publication Date
JPS5444811A true JPS5444811A (en) 1979-04-09
JPS623626B2 JPS623626B2 (en) 1987-01-26

Family

ID=14575937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11201977A Granted JPS5444811A (en) 1977-09-16 1977-09-16 Synchronous transmission system

Country Status (1)

Country Link
JP (1) JPS5444811A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715553U (en) * 1980-06-30 1982-01-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5715553U (en) * 1980-06-30 1982-01-26

Also Published As

Publication number Publication date
JPS623626B2 (en) 1987-01-26

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