JPS5434823A - Input-output circuit - Google Patents

Input-output circuit

Info

Publication number
JPS5434823A
JPS5434823A JP10045977A JP10045977A JPS5434823A JP S5434823 A JPS5434823 A JP S5434823A JP 10045977 A JP10045977 A JP 10045977A JP 10045977 A JP10045977 A JP 10045977A JP S5434823 A JPS5434823 A JP S5434823A
Authority
JP
Japan
Prior art keywords
input
output circuit
circuit
terminal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10045977A
Other languages
Japanese (ja)
Other versions
JPS6134135B2 (en
Inventor
Koshiro Iwasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10045977A priority Critical patent/JPS5434823A/en
Publication of JPS5434823A publication Critical patent/JPS5434823A/en
Publication of JPS6134135B2 publication Critical patent/JPS6134135B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Shutter-Related Mechanisms (AREA)
  • Indication In Cameras, And Counting Of Exposures (AREA)
  • Digital Computer Display Output (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE: To use in input terminal and an output terminal of the input-output circuit with a single terminal in common in order to reduce the number of terminals in the 1C for the camera provided with a timer circuit for setting the time, logic circuit for shutter control, and display circuit for showing the course of system operation.
COPYRIGHT: (C)1979,JPO&Japio
JP10045977A 1977-08-24 1977-08-24 Input-output circuit Granted JPS5434823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10045977A JPS5434823A (en) 1977-08-24 1977-08-24 Input-output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10045977A JPS5434823A (en) 1977-08-24 1977-08-24 Input-output circuit

Publications (2)

Publication Number Publication Date
JPS5434823A true JPS5434823A (en) 1979-03-14
JPS6134135B2 JPS6134135B2 (en) 1986-08-06

Family

ID=14274486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10045977A Granted JPS5434823A (en) 1977-08-24 1977-08-24 Input-output circuit

Country Status (1)

Country Link
JP (1) JPS5434823A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153929U (en) * 1980-04-15 1981-11-17
JP2010141499A (en) * 2008-12-10 2010-06-24 Toshiba Corp Trigger signal detection apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153929U (en) * 1980-04-15 1981-11-17
JP2010141499A (en) * 2008-12-10 2010-06-24 Toshiba Corp Trigger signal detection apparatus

Also Published As

Publication number Publication date
JPS6134135B2 (en) 1986-08-06

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