JPS54161869A - Amplitude limiting device - Google Patents
Amplitude limiting deviceInfo
- Publication number
- JPS54161869A JPS54161869A JP7121978A JP7121978A JPS54161869A JP S54161869 A JPS54161869 A JP S54161869A JP 7121978 A JP7121978 A JP 7121978A JP 7121978 A JP7121978 A JP 7121978A JP S54161869 A JPS54161869 A JP S54161869A
- Authority
- JP
- Japan
- Prior art keywords
- output
- comparators
- circuit
- limiting device
- amplitude limiting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G11/00—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general
- H03G11/002—Limiting amplitude; Limiting rate of change of amplitude ; Clipping in general without controlling loop
Landscapes
- Manipulation Of Pulses (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To obtain an amplitude limiting device which does not respond to the input signals of under a fixed level and also has an accurate inversion of the output at the zero crossover of the input signals. CONSTITUTION:Input signal A sent from input terminal 11 is supplied to 1st comparator 16 features no hysteresis property as well as to 2nd comparator 17 featuring the hysteresis property. The output of comparators 16 and 17 are supplied to 1st and 2nd pulse generation circuits 28 and 29 via level conversion circuits 23 and 27 each. Circuit 28 generates pulse E between the rear edges of the output pulses of comparators 16 and 17; while circuit 29 generates pulse F between the front edges of the output pulses of comparators 16 and 17 respectively. Flip-flop 35 is then driven by the output of circuit 28 and 29 to obtain output G.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7121978A JPS54161869A (en) | 1978-06-12 | 1978-06-12 | Amplitude limiting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7121978A JPS54161869A (en) | 1978-06-12 | 1978-06-12 | Amplitude limiting device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54161869A true JPS54161869A (en) | 1979-12-21 |
JPS6139769B2 JPS6139769B2 (en) | 1986-09-05 |
Family
ID=13454335
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7121978A Granted JPS54161869A (en) | 1978-06-12 | 1978-06-12 | Amplitude limiting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS54161869A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007282182A (en) * | 2006-03-15 | 2007-10-25 | Toyota Central Res & Dev Lab Inc | Binarization circuit |
JP2019190971A (en) * | 2018-04-24 | 2019-10-31 | エイブリック株式会社 | Zero-crossing detection circuit and sensor device |
-
1978
- 1978-06-12 JP JP7121978A patent/JPS54161869A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007282182A (en) * | 2006-03-15 | 2007-10-25 | Toyota Central Res & Dev Lab Inc | Binarization circuit |
JP2019190971A (en) * | 2018-04-24 | 2019-10-31 | エイブリック株式会社 | Zero-crossing detection circuit and sensor device |
Also Published As
Publication number | Publication date |
---|---|
JPS6139769B2 (en) | 1986-09-05 |
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