JPS54155068A - Indicator of analog value - Google Patents

Indicator of analog value

Info

Publication number
JPS54155068A
JPS54155068A JP6295778A JP6295778A JPS54155068A JP S54155068 A JPS54155068 A JP S54155068A JP 6295778 A JP6295778 A JP 6295778A JP 6295778 A JP6295778 A JP 6295778A JP S54155068 A JPS54155068 A JP S54155068A
Authority
JP
Japan
Prior art keywords
value
input
flip
graph
bar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6295778A
Other languages
Japanese (ja)
Other versions
JPS5759481B2 (en
Inventor
Takeshi Kutaragi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP6295778A priority Critical patent/JPS54155068A/en
Publication of JPS54155068A publication Critical patent/JPS54155068A/en
Publication of JPS5759481B2 publication Critical patent/JPS5759481B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Indicating Measured Values (AREA)

Abstract

PURPOSE: To display input analog value in a bar-graph-like shape and to dispaly the maximum value by a memory consisting of a plurality of comparators connected in parallel and a plurality of RS flip-flop circuits and simple constitution being composed of a decorder and an addition circuit.
CONSTITUTION: When input analog signals are fed to a terminal 1 under a condition that each circuit connected in parallel by means of a switch 6 for reset is reset, flip-flop circuits F1WF7 are inverted to set conditions at a memory 3 and a flip-flop circuit F8 remains as it is under a reset condition if the value is larger than the reference value of a comparator C7 and smaller than the reference value of a comparator C8. Thus, the output of AND circuits A1WA7 becomes to 0, luminous diodes D1WD7 light up and input value is dispalyed in a bar-graph-like shape. When value smaller than the value is input, the input value is displayed in a bar- graph-like shape while the luminous diode D7 also lights up as the maximum value up to that time.
COPYRIGHT: (C)1979,JPO&Japio
JP6295778A 1978-05-26 1978-05-26 Indicator of analog value Granted JPS54155068A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6295778A JPS54155068A (en) 1978-05-26 1978-05-26 Indicator of analog value

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6295778A JPS54155068A (en) 1978-05-26 1978-05-26 Indicator of analog value

Publications (2)

Publication Number Publication Date
JPS54155068A true JPS54155068A (en) 1979-12-06
JPS5759481B2 JPS5759481B2 (en) 1982-12-15

Family

ID=13215301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6295778A Granted JPS54155068A (en) 1978-05-26 1978-05-26 Indicator of analog value

Country Status (1)

Country Link
JP (1) JPS54155068A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05503196A (en) * 1990-02-16 1993-05-27 シーメンス　ニクスドルフ　インフオルマチオーンス　ジステーメ　アクチエンゲゼルシヤフト How to convert analog voltage to digital value

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05503196A (en) * 1990-02-16 1993-05-27 シーメンス　ニクスドルフ　インフオルマチオーンス　ジステーメ　アクチエンゲゼルシヤフト How to convert analog voltage to digital value

Also Published As

Publication number Publication date
JPS5759481B2 (en) 1982-12-15

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