JPS54139367A - Digital carrier wave extraction circuit - Google Patents

Digital carrier wave extraction circuit

Info

Publication number
JPS54139367A
JPS54139367A JP4725778A JP4725778A JPS54139367A JP S54139367 A JPS54139367 A JP S54139367A JP 4725778 A JP4725778 A JP 4725778A JP 4725778 A JP4725778 A JP 4725778A JP S54139367 A JPS54139367 A JP S54139367A
Authority
JP
Japan
Prior art keywords
circuit
waveform
slicer
extraction circuit
noise
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4725778A
Other languages
Japanese (ja)
Inventor
Ichiro Takase
Yoshihiko Akaiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4725778A priority Critical patent/JPS54139367A/en
Publication of JPS54139367A publication Critical patent/JPS54139367A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2275Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals
    • H04L27/2276Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses the received modulated signals using frequency multiplication or harmonic tracking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To operate stably an extraction circuit even if the ratio of carrier power to noise power is small, by providing a delay circuit in a part of the carrier extraction circuit of digital n-phase modulation receiving waves. CONSTITUTION:In the normal digital carrier extraction circuit consisting of n- multiplier circuit 402, resonator 403, slicer 404, 1/n frequency divider circuit 406 consisting of digital circuits, etc., pulse insertion circuit 406 consisting of differentiating circuit 502, delay circuit 503 and OR integrated circuit 504 is provided between slicer 404 and 1/n frequency divider circuit 406. For example, in case that one bit pulse is omitted in output waveform a of slicer 404 due to noise, waveform b differentiated by circuit 502 is inputted to circuit 504, and simultaneously, waveform b becomes waveform C delayed by one period (T time) in delay circuit 503 and is inputted to cirucit 504. Then, these waveforms are synthesized to become waveform d, and influences of noise are eliminated, and waveform d appears at terminal 505.
JP4725778A 1978-04-20 1978-04-20 Digital carrier wave extraction circuit Pending JPS54139367A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4725778A JPS54139367A (en) 1978-04-20 1978-04-20 Digital carrier wave extraction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4725778A JPS54139367A (en) 1978-04-20 1978-04-20 Digital carrier wave extraction circuit

Publications (1)

Publication Number Publication Date
JPS54139367A true JPS54139367A (en) 1979-10-29

Family

ID=12770217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4725778A Pending JPS54139367A (en) 1978-04-20 1978-04-20 Digital carrier wave extraction circuit

Country Status (1)

Country Link
JP (1) JPS54139367A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004094940A1 (en) * 2003-04-23 2004-11-04 Nikon Corporation Interferometer system, signal processing method in interferometer system, stage using the signal processing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004094940A1 (en) * 2003-04-23 2004-11-04 Nikon Corporation Interferometer system, signal processing method in interferometer system, stage using the signal processing method
JPWO2004094940A1 (en) * 2003-04-23 2006-07-13 株式会社ニコン Interferometer system, signal processing method in interferometer system, and stage using the signal processing method
US7382468B2 (en) 2003-04-23 2008-06-03 Nikon Corporation Interferometer system, signal processing method in interferometer system, and stage using signal processing

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