JPS54129925A - Process input-output device - Google Patents

Process input-output device

Info

Publication number
JPS54129925A
JPS54129925A JP3775378A JP3775378A JPS54129925A JP S54129925 A JPS54129925 A JP S54129925A JP 3775378 A JP3775378 A JP 3775378A JP 3775378 A JP3775378 A JP 3775378A JP S54129925 A JPS54129925 A JP S54129925A
Authority
JP
Japan
Prior art keywords
output
cpu
scanner
board
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3775378A
Other languages
Japanese (ja)
Inventor
Masayuki Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3775378A priority Critical patent/JPS54129925A/en
Publication of JPS54129925A publication Critical patent/JPS54129925A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To prevent error detection attending upon the insertion and extraction of a scanner board, by detecting the connection and disconnection of a signal line corresponding to the insertion and extraction of the scanner board into and from a input-output device.
CONSTITUTION: When scanner board #3 among board group 1 equipped to a back panel is pulled out, loop circuit 2 becomes broken, LEDD1 of photocoupler 3 turns OFF, and photo transistor Q1 also turns OFF. Therefore, the output of Schmitt circuit 4 is zero and signal line 8 is "1",thereby informing a CPU that a line is in process of extraction. Then, the process input-output device will not operate attending upon it. Further, monostable multivibrator 6 is triggered to generate the output for time T1 and to send it to the CPU via line 9. Consequently, the CPU inhibits an input to scanner boards for time T1. Once scanner board #3 is inserted next, loop circuit 2 turns into a closed circuit, signal line 8 is zero, and monostable multivibrator 7 is triggerd, so that the output terminal will be "1". This output is transmitted to the CPU, so that input data will be inhibited from being inputted to scanner board #3 for time T2.
COPYRIGHT: (C)1979,JPO&Japio
JP3775378A 1978-03-31 1978-03-31 Process input-output device Pending JPS54129925A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3775378A JPS54129925A (en) 1978-03-31 1978-03-31 Process input-output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3775378A JPS54129925A (en) 1978-03-31 1978-03-31 Process input-output device

Publications (1)

Publication Number Publication Date
JPS54129925A true JPS54129925A (en) 1979-10-08

Family

ID=12506224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3775378A Pending JPS54129925A (en) 1978-03-31 1978-03-31 Process input-output device

Country Status (1)

Country Link
JP (1) JPS54129925A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59127283A (en) * 1982-12-29 1984-07-23 Fujitsu Ltd Data writing system
JPS6047062U (en) * 1983-09-05 1985-04-02 オムロン株式会社 Data transmission method between programmable controller and program console

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59127283A (en) * 1982-12-29 1984-07-23 Fujitsu Ltd Data writing system
JPS6047062U (en) * 1983-09-05 1985-04-02 オムロン株式会社 Data transmission method between programmable controller and program console

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