JPS54125378A - Input-output unit for sequence controller - Google Patents

Input-output unit for sequence controller

Info

Publication number
JPS54125378A
JPS54125378A JP3305478A JP3305478A JPS54125378A JP S54125378 A JPS54125378 A JP S54125378A JP 3305478 A JP3305478 A JP 3305478A JP 3305478 A JP3305478 A JP 3305478A JP S54125378 A JPS54125378 A JP S54125378A
Authority
JP
Japan
Prior art keywords
adder
address
input
unit
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3305478A
Other languages
Japanese (ja)
Inventor
Masao Oura
Kazuyoshi Osako
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3305478A priority Critical patent/JPS54125378A/en
Publication of JPS54125378A publication Critical patent/JPS54125378A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control By Computers (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE: To facilitate a work of address register, by providing an adder for producing an output, with a prescribed value added to an input information, as the input information to the second stage input-output unit, and by making the output of said adder to be an address of the self unit.
CONSTITUTION: When a set address, outputted from an adder ADD1 to ADD3, and an address information AD1, outputted from a sequence controller main unit CPU, are agreed, a coincidence circuit CO1 to CO3 outputs a coincidence signal with a gate G1 to G3 closed and a gate G11 to G13, an address gate G21 to G23 opened, and the information of a data bus DA is given to each output circuit YC1 to YCn. The adder ADD1 to ADD3, for instance, makes an addition of 1 to the information of input, with the added result being given to the adder of the next stage unit. Accordingly, only a process of connecting each unit OU1 to OU3 in series with a prescribed value given to the first stage unit can operate an address register of each stage.
COPYRIGHT: (C)1979,JPO&Japio
JP3305478A 1978-03-24 1978-03-24 Input-output unit for sequence controller Pending JPS54125378A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3305478A JPS54125378A (en) 1978-03-24 1978-03-24 Input-output unit for sequence controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3305478A JPS54125378A (en) 1978-03-24 1978-03-24 Input-output unit for sequence controller

Publications (1)

Publication Number Publication Date
JPS54125378A true JPS54125378A (en) 1979-09-28

Family

ID=12376039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3305478A Pending JPS54125378A (en) 1978-03-24 1978-03-24 Input-output unit for sequence controller

Country Status (1)

Country Link
JP (1) JPS54125378A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57127203U (en) * 1981-01-30 1982-08-07
JPS6341906A (en) * 1986-08-08 1988-02-23 Oki Electric Ind Co Ltd Access system for actuator
JPH0496103A (en) * 1990-08-08 1992-03-27 Rohm Co Ltd Electronic control wiring device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57127203U (en) * 1981-01-30 1982-08-07
JPS6341906A (en) * 1986-08-08 1988-02-23 Oki Electric Ind Co Ltd Access system for actuator
JPH0496103A (en) * 1990-08-08 1992-03-27 Rohm Co Ltd Electronic control wiring device

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