JPS54124917A - Radio receiver - Google Patents

Radio receiver

Info

Publication number
JPS54124917A
JPS54124917A JP3335978A JP3335978A JPS54124917A JP S54124917 A JPS54124917 A JP S54124917A JP 3335978 A JP3335978 A JP 3335978A JP 3335978 A JP3335978 A JP 3335978A JP S54124917 A JPS54124917 A JP S54124917A
Authority
JP
Japan
Prior art keywords
data signal
receiving frequency
inputted
coincidence
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3335978A
Other languages
Japanese (ja)
Other versions
JPS5815984B2 (en
Inventor
Mitsuzo Shimomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP3335978A priority Critical patent/JPS5815984B2/en
Publication of JPS54124917A publication Critical patent/JPS54124917A/en
Publication of JPS5815984B2 publication Critical patent/JPS5815984B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/26Circuits for superheterodyne receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Superheterodyne Receivers (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Abstract

PURPOSE:To prevent the reception of an undesirable broadcast station by collating a 1st data signal, which is undesired to receive, with a 2nd data signal inputted corresponding to a receiving frequency and by maintaining it when a coincidence signal is outputted. CONSTITUTION:Memory circuit 11 is stored with the 1st data signal equivalent to a specific receiving frequency, and through the drive of scan oscillator 13, the contents of the 2nd data signal equivalent to the receiving frequency are outputted from up-down counter 12 being changed sequentially over a constant range. Then, the 1st data signal inputted is collated 10 with the 2nd data signal to be inputted and only when the both agree, a coincidence output is led out to maintain the contents of the gate signal of the output circuit, when the coincidence output is supplied from circuit 10, without stopping oscillator 13. Consequently, the reception of an undesirable broadcast station can be prerented by storing the receiving frequency of the station in memrory 11.
JP3335978A 1978-03-22 1978-03-22 radio receiver Expired JPS5815984B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3335978A JPS5815984B2 (en) 1978-03-22 1978-03-22 radio receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3335978A JPS5815984B2 (en) 1978-03-22 1978-03-22 radio receiver

Publications (2)

Publication Number Publication Date
JPS54124917A true JPS54124917A (en) 1979-09-28
JPS5815984B2 JPS5815984B2 (en) 1983-03-29

Family

ID=12384379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3335978A Expired JPS5815984B2 (en) 1978-03-22 1978-03-22 radio receiver

Country Status (1)

Country Link
JP (1) JPS5815984B2 (en)

Also Published As

Publication number Publication date
JPS5815984B2 (en) 1983-03-29

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