JPS54107236A - Micro instruction controller - Google Patents

Micro instruction controller

Info

Publication number
JPS54107236A
JPS54107236A JP1442278A JP1442278A JPS54107236A JP S54107236 A JPS54107236 A JP S54107236A JP 1442278 A JP1442278 A JP 1442278A JP 1442278 A JP1442278 A JP 1442278A JP S54107236 A JPS54107236 A JP S54107236A
Authority
JP
Japan
Prior art keywords
micro instruction
trap
line
instruction controller
trap circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1442278A
Other languages
Japanese (ja)
Other versions
JPS6134167B2 (en
Inventor
Shoichi Ibori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1442278A priority Critical patent/JPS54107236A/en
Publication of JPS54107236A publication Critical patent/JPS54107236A/en
Publication of JPS6134167B2 publication Critical patent/JPS6134167B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To make high-speed data transfer control possible by detecting signals, which are supplied from the external in data transfer, in a trap circuit in the micro instruction controller.
CONSTITUTION: When a micro instruction different from conditions set in register 31 is generated, trap circuit 30 is operated, and a trap address is selected by a signal which is transferred through line 32 and is outputted onto line 34 and is set to micro instruction address register 25 by a signal which is given from trap circuit 30 through line 35, thereby executing trap operation.
COPYRIGHT: (C)1979,JPO&Japio
JP1442278A 1978-02-09 1978-02-09 Micro instruction controller Granted JPS54107236A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1442278A JPS54107236A (en) 1978-02-09 1978-02-09 Micro instruction controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1442278A JPS54107236A (en) 1978-02-09 1978-02-09 Micro instruction controller

Publications (2)

Publication Number Publication Date
JPS54107236A true JPS54107236A (en) 1979-08-22
JPS6134167B2 JPS6134167B2 (en) 1986-08-06

Family

ID=11860574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1442278A Granted JPS54107236A (en) 1978-02-09 1978-02-09 Micro instruction controller

Country Status (1)

Country Link
JP (1) JPS54107236A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7181041B2 (en) 2001-07-23 2007-02-20 Foster Electric Co., Ltd. Flat speaker of full-face driving

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7181041B2 (en) 2001-07-23 2007-02-20 Foster Electric Co., Ltd. Flat speaker of full-face driving

Also Published As

Publication number Publication date
JPS6134167B2 (en) 1986-08-06

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