JPS5394875A - Package for semiconductor element - Google Patents
Package for semiconductor elementInfo
- Publication number
- JPS5394875A JPS5394875A JP991077A JP991077A JPS5394875A JP S5394875 A JPS5394875 A JP S5394875A JP 991077 A JP991077 A JP 991077A JP 991077 A JP991077 A JP 991077A JP S5394875 A JPS5394875 A JP S5394875A
- Authority
- JP
- Japan
- Prior art keywords
- package
- semiconductor element
- feqturing
- dectease
- detouring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE: To dectease the element size as well as to facilitate an easy element design, by providing the lead wiring feqturing the same function detouring the element in the package for the element.
COPYRIGHT: (C)1978,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52009910A JPS6011462B2 (en) | 1977-01-31 | 1977-01-31 | semiconductor equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP52009910A JPS6011462B2 (en) | 1977-01-31 | 1977-01-31 | semiconductor equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5394875A true JPS5394875A (en) | 1978-08-19 |
JPS6011462B2 JPS6011462B2 (en) | 1985-03-26 |
Family
ID=11733253
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52009910A Expired JPS6011462B2 (en) | 1977-01-31 | 1977-01-31 | semiconductor equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6011462B2 (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58110063A (en) * | 1981-12-23 | 1983-06-30 | Nec Corp | Integrated circuit device |
JPS593960A (en) * | 1982-06-29 | 1984-01-10 | Toshiba Corp | Semiconductor device |
JPS625649A (en) * | 1985-07-01 | 1987-01-12 | Nec Ic Microcomput Syst Ltd | Package for integrated circuit |
JPS6314438A (en) * | 1986-07-04 | 1988-01-21 | Mitsubishi Electric Corp | Semiconductor device |
JPH02131357U (en) * | 1989-04-05 | 1990-10-31 | ||
JPH03263334A (en) * | 1990-03-13 | 1991-11-22 | Toshiba Corp | Resin-sealed semiconductor device |
JPH04177846A (en) * | 1990-11-13 | 1992-06-25 | Toshiba Corp | Semiconductor device |
JPH0521691A (en) * | 1991-12-05 | 1993-01-29 | Hitachi Ltd | Semiconductor device and assembling method thereof |
JPH0521692A (en) * | 1991-12-05 | 1993-01-29 | Hitachi Ltd | Semiconductor device |
JPH0536890A (en) * | 1991-12-05 | 1993-02-12 | Hitachi Ltd | Semiconductor device |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6232682A (en) * | 1985-08-03 | 1987-02-12 | 株式会社 ニフコ | Improvement in integration density for 3-d circuit structural body |
-
1977
- 1977-01-31 JP JP52009910A patent/JPS6011462B2/en not_active Expired
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58110063A (en) * | 1981-12-23 | 1983-06-30 | Nec Corp | Integrated circuit device |
JPS593960A (en) * | 1982-06-29 | 1984-01-10 | Toshiba Corp | Semiconductor device |
JPS634951B2 (en) * | 1982-06-29 | 1988-02-01 | Tokyo Shibaura Electric Co | |
JPS625649A (en) * | 1985-07-01 | 1987-01-12 | Nec Ic Microcomput Syst Ltd | Package for integrated circuit |
JPS6314438A (en) * | 1986-07-04 | 1988-01-21 | Mitsubishi Electric Corp | Semiconductor device |
JPH02131357U (en) * | 1989-04-05 | 1990-10-31 | ||
JPH03263334A (en) * | 1990-03-13 | 1991-11-22 | Toshiba Corp | Resin-sealed semiconductor device |
JPH04177846A (en) * | 1990-11-13 | 1992-06-25 | Toshiba Corp | Semiconductor device |
JPH0521691A (en) * | 1991-12-05 | 1993-01-29 | Hitachi Ltd | Semiconductor device and assembling method thereof |
JPH0521692A (en) * | 1991-12-05 | 1993-01-29 | Hitachi Ltd | Semiconductor device |
JPH0536890A (en) * | 1991-12-05 | 1993-02-12 | Hitachi Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPS6011462B2 (en) | 1985-03-26 |
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