JPS5341060B2 - - Google Patents
Info
- Publication number
- JPS5341060B2 JPS5341060B2 JP11831974A JP11831974A JPS5341060B2 JP S5341060 B2 JPS5341060 B2 JP S5341060B2 JP 11831974 A JP11831974 A JP 11831974A JP 11831974 A JP11831974 A JP 11831974A JP S5341060 B2 JPS5341060 B2 JP S5341060B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
- H03K19/1952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with electro-magnetic coupling of the control current
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US41111473A | 1973-10-30 | 1973-10-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5075761A JPS5075761A (ja) | 1975-06-21 |
JPS5341060B2 true JPS5341060B2 (ja) | 1978-10-31 |
Family
ID=23627618
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11831974A Expired JPS5341060B2 (ja) | 1973-10-30 | 1974-10-16 |
Country Status (7)
Country | Link |
---|---|
JP (1) | JPS5341060B2 (ja) |
CA (1) | CA1024608A (ja) |
DE (1) | DE2448051C2 (ja) |
FR (1) | FR2249502B1 (ja) |
GB (1) | GB1441509A (ja) |
IT (1) | IT1020148B (ja) |
NL (1) | NL7414138A (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4097765A (en) * | 1976-06-30 | 1978-06-27 | International Business Machines Corporation | Electronically alterable non-latching Josephson AND, OR, NAND, NOR logic circuit |
EP0048115B1 (en) * | 1980-09-12 | 1986-06-25 | Fujitsu Limited | Decoder circuit utilising josephson devices |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3758795A (en) * | 1972-06-30 | 1973-09-11 | Ibm | Superconductive circuitry using josephson tunneling devices |
-
1974
- 1974-07-25 FR FR7426335A patent/FR2249502B1/fr not_active Expired
- 1974-08-23 IT IT2654874A patent/IT1020148B/it active
- 1974-09-19 CA CA209,645A patent/CA1024608A/en not_active Expired
- 1974-10-09 DE DE19742448051 patent/DE2448051C2/de not_active Expired
- 1974-10-16 JP JP11831974A patent/JPS5341060B2/ja not_active Expired
- 1974-10-17 GB GB4497074A patent/GB1441509A/en not_active Expired
- 1974-10-29 NL NL7414138A patent/NL7414138A/xx not_active Application Discontinuation
Non-Patent Citations (1)
Title |
---|
IBM TECHNICAL DISCLOSURE BULLETIN#N5=1972 * |
Also Published As
Publication number | Publication date |
---|---|
NL7414138A (nl) | 1975-05-02 |
CA1024608A (en) | 1978-01-17 |
GB1441509A (ja) | 1976-07-07 |
IT1020148B (it) | 1977-12-20 |
DE2448051C2 (de) | 1982-05-27 |
DE2448051A1 (de) | 1975-05-07 |
FR2249502A1 (ja) | 1975-05-23 |
JPS5075761A (ja) | 1975-06-21 |
FR2249502B1 (ja) | 1978-03-31 |