JPS5337288A - Set value monitoring circuit - Google Patents

Set value monitoring circuit

Info

Publication number
JPS5337288A
JPS5337288A JP11140176A JP11140176A JPS5337288A JP S5337288 A JPS5337288 A JP S5337288A JP 11140176 A JP11140176 A JP 11140176A JP 11140176 A JP11140176 A JP 11140176A JP S5337288 A JPS5337288 A JP S5337288A
Authority
JP
Japan
Prior art keywords
set value
monitoring circuit
value monitoring
constructure
computor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11140176A
Other languages
Japanese (ja)
Other versions
JPS5845723B2 (en
Inventor
Katsutoshi Shinohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP51111401A priority Critical patent/JPS5845723B2/en
Publication of JPS5337288A publication Critical patent/JPS5337288A/en
Publication of JPS5845723B2 publication Critical patent/JPS5845723B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C19/00—Electric signal transmission systems
    • G08C19/16—Electric signal transmission systems in which transmission is by pulses
    • G08C19/22—Electric signal transmission systems in which transmission is by pulses by varying the duration of individual pulses

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Selective Calling Equipment (AREA)
  • Testing And Monitoring For Control Systems (AREA)

Abstract

PURPOSE:To remove the influence of rise time/fall time of set value signal, by means of constituting the constructure therein a differential computor is not used.
JP51111401A 1976-09-17 1976-09-17 Set value monitoring circuit Expired JPS5845723B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP51111401A JPS5845723B2 (en) 1976-09-17 1976-09-17 Set value monitoring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP51111401A JPS5845723B2 (en) 1976-09-17 1976-09-17 Set value monitoring circuit

Publications (2)

Publication Number Publication Date
JPS5337288A true JPS5337288A (en) 1978-04-06
JPS5845723B2 JPS5845723B2 (en) 1983-10-12

Family

ID=14560207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP51111401A Expired JPS5845723B2 (en) 1976-09-17 1976-09-17 Set value monitoring circuit

Country Status (1)

Country Link
JP (1) JPS5845723B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175876A (en) * 1974-12-25 1976-06-30 Hitachi Ltd DENSHISHIKICHOSETSUKEI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175876A (en) * 1974-12-25 1976-06-30 Hitachi Ltd DENSHISHIKICHOSETSUKEI

Also Published As

Publication number Publication date
JPS5845723B2 (en) 1983-10-12

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