JPS5332636A - Ic memory - Google Patents

Ic memory

Info

Publication number
JPS5332636A
JPS5332636A JP10712476A JP10712476A JPS5332636A JP S5332636 A JPS5332636 A JP S5332636A JP 10712476 A JP10712476 A JP 10712476A JP 10712476 A JP10712476 A JP 10712476A JP S5332636 A JPS5332636 A JP S5332636A
Authority
JP
Japan
Prior art keywords
bit
memory
constitution
changeover
enabling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10712476A
Other languages
English (en)
Inventor
Junichi Takuri
Tsutomu Yokoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10712476A priority Critical patent/JPS5332636A/ja
Publication of JPS5332636A publication Critical patent/JPS5332636A/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP10712476A 1976-09-07 1976-09-07 Ic memory Pending JPS5332636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10712476A JPS5332636A (en) 1976-09-07 1976-09-07 Ic memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10712476A JPS5332636A (en) 1976-09-07 1976-09-07 Ic memory

Publications (1)

Publication Number Publication Date
JPS5332636A true JPS5332636A (en) 1978-03-28

Family

ID=14451093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10712476A Pending JPS5332636A (en) 1976-09-07 1976-09-07 Ic memory

Country Status (1)

Country Link
JP (1) JPS5332636A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253088A (ja) * 1984-05-30 1985-12-13 Mitsubishi Electric Corp 半導体記憶装置
JPS61240500A (ja) * 1985-04-18 1986-10-25 Nec Ic Microcomput Syst Ltd 半導体記憶回路装置
JPS62128098A (ja) * 1985-11-29 1987-06-10 Hitachi Ltd 半導体メモリ装置
JPS63183698A (ja) * 1987-01-23 1988-07-29 Mitsubishi Electric Corp 半導体記憶装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60253088A (ja) * 1984-05-30 1985-12-13 Mitsubishi Electric Corp 半導体記憶装置
JPH0440800B2 (ja) * 1984-05-30 1992-07-06 Mitsubishi Electric Corp
JPS61240500A (ja) * 1985-04-18 1986-10-25 Nec Ic Microcomput Syst Ltd 半導体記憶回路装置
JPS62128098A (ja) * 1985-11-29 1987-06-10 Hitachi Ltd 半導体メモリ装置
JPS63183698A (ja) * 1987-01-23 1988-07-29 Mitsubishi Electric Corp 半導体記憶装置
JPH0785355B2 (ja) * 1987-01-23 1995-09-13 三菱電機株式会社 半導体記憶装置

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