JPS5330262A - Current mirror circuit - Google Patents

Current mirror circuit

Info

Publication number
JPS5330262A
JPS5330262A JP10531776A JP10531776A JPS5330262A JP S5330262 A JPS5330262 A JP S5330262A JP 10531776 A JP10531776 A JP 10531776A JP 10531776 A JP10531776 A JP 10531776A JP S5330262 A JPS5330262 A JP S5330262A
Authority
JP
Japan
Prior art keywords
current mirror
mirror circuit
circuit
flow
approximate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10531776A
Other languages
Japanese (ja)
Other versions
JPS555287B2 (en
Inventor
Akio Tanaka
Hitoshi Sugano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10531776A priority Critical patent/JPS5330262A/en
Publication of JPS5330262A publication Critical patent/JPS5330262A/en
Publication of JPS555287B2 publication Critical patent/JPS555287B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/265Current mirrors using bipolar transistors only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To approximate the ratio further to ''1'' between the flow-in and flow-out currents for a current mirror circuit, thus the circuit being applied very effectively to a circuit to which a high accuracy is required.
JP10531776A 1976-09-01 1976-09-01 Current mirror circuit Granted JPS5330262A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10531776A JPS5330262A (en) 1976-09-01 1976-09-01 Current mirror circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10531776A JPS5330262A (en) 1976-09-01 1976-09-01 Current mirror circuit

Publications (2)

Publication Number Publication Date
JPS5330262A true JPS5330262A (en) 1978-03-22
JPS555287B2 JPS555287B2 (en) 1980-02-05

Family

ID=14404321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10531776A Granted JPS5330262A (en) 1976-09-01 1976-09-01 Current mirror circuit

Country Status (1)

Country Link
JP (1) JPS5330262A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125116U (en) * 1983-02-08 1984-08-23 ヤマハ株式会社 current mirror circuit
JPS60136541U (en) * 1985-01-17 1985-09-10 富士通株式会社 level detection circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125116U (en) * 1983-02-08 1984-08-23 ヤマハ株式会社 current mirror circuit
JPS60136541U (en) * 1985-01-17 1985-09-10 富士通株式会社 level detection circuit

Also Published As

Publication number Publication date
JPS555287B2 (en) 1980-02-05

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