JPS53141576A - Fixing device of semiconductor - Google Patents

Fixing device of semiconductor

Info

Publication number
JPS53141576A
JPS53141576A JP5695577A JP5695577A JPS53141576A JP S53141576 A JPS53141576 A JP S53141576A JP 5695577 A JP5695577 A JP 5695577A JP 5695577 A JP5695577 A JP 5695577A JP S53141576 A JPS53141576 A JP S53141576A
Authority
JP
Japan
Prior art keywords
semiconductor
fixing device
metal piece
fabricate
sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5695577A
Other languages
Japanese (ja)
Inventor
Eizo Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5695577A priority Critical patent/JPS53141576A/en
Publication of JPS53141576A publication Critical patent/JPS53141576A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To fabricate a semiconductor device vy previously fixing a semiconductor element to a metal piece and by resin-sealing this metal piece after fixed to a printed substrate.
COPYRIGHT: (C)1978,JPO&Japio
JP5695577A 1977-05-16 1977-05-16 Fixing device of semiconductor Pending JPS53141576A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5695577A JPS53141576A (en) 1977-05-16 1977-05-16 Fixing device of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5695577A JPS53141576A (en) 1977-05-16 1977-05-16 Fixing device of semiconductor

Publications (1)

Publication Number Publication Date
JPS53141576A true JPS53141576A (en) 1978-12-09

Family

ID=13041956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5695577A Pending JPS53141576A (en) 1977-05-16 1977-05-16 Fixing device of semiconductor

Country Status (1)

Country Link
JP (1) JPS53141576A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5832442A (en) * 1981-08-20 1983-02-25 Nec Corp Hybrid integrated circuit device
JPS5946087A (en) * 1982-09-09 1984-03-15 イビデン株式会社 Printed circuit board
JPS6413146U (en) * 1987-07-09 1989-01-24
JPH03181143A (en) * 1989-12-11 1991-08-07 Ibiden Co Ltd Substrate for mounting electronic part
US5710062A (en) * 1993-06-01 1998-01-20 Mitsubishi Denki Kabushiki Kaisha Plastic molded semiconductor package and method of manufacturing the same
JP2008028254A (en) * 2006-07-24 2008-02-07 Sharp Corp Radiation structure of electronic device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5832442A (en) * 1981-08-20 1983-02-25 Nec Corp Hybrid integrated circuit device
JPS5946087A (en) * 1982-09-09 1984-03-15 イビデン株式会社 Printed circuit board
JPS6413146U (en) * 1987-07-09 1989-01-24
JPH03181143A (en) * 1989-12-11 1991-08-07 Ibiden Co Ltd Substrate for mounting electronic part
US5710062A (en) * 1993-06-01 1998-01-20 Mitsubishi Denki Kabushiki Kaisha Plastic molded semiconductor package and method of manufacturing the same
US5834340A (en) * 1993-06-01 1998-11-10 Mitsubishi Denki Kabushiki Kaisha Plastic molded semiconductor package and method of manufacturing the same
US6046071A (en) * 1993-06-01 2000-04-04 Mitsubishi Denki Kabushiki Kaisha Plastic molded semiconductor package and method of manufacturing the same
JP2008028254A (en) * 2006-07-24 2008-02-07 Sharp Corp Radiation structure of electronic device
JP4726729B2 (en) * 2006-07-24 2011-07-20 シャープ株式会社 Heat dissipation structure for electronic devices

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