JPS53132230A - Simulator for read only memory - Google Patents

Simulator for read only memory

Info

Publication number
JPS53132230A
JPS53132230A JP4681677A JP4681677A JPS53132230A JP S53132230 A JPS53132230 A JP S53132230A JP 4681677 A JP4681677 A JP 4681677A JP 4681677 A JP4681677 A JP 4681677A JP S53132230 A JPS53132230 A JP S53132230A
Authority
JP
Japan
Prior art keywords
memory
high speed
simulator
read
rom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4681677A
Other languages
Japanese (ja)
Inventor
Koji Fujimoto
Shinichi Hayashi
Iwao Asakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4681677A priority Critical patent/JPS53132230A/en
Publication of JPS53132230A publication Critical patent/JPS53132230A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Landscapes

  • Debugging And Monitoring (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To perform the development of an information processor using high speed ROM efficiently, by simulating the functions of high speed ROM from the hardware standpoint through the use of an erasable EPROM and a high speed RAM, and by constituting that the content of memory can be altered easily.
JP4681677A 1977-04-25 1977-04-25 Simulator for read only memory Pending JPS53132230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4681677A JPS53132230A (en) 1977-04-25 1977-04-25 Simulator for read only memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4681677A JPS53132230A (en) 1977-04-25 1977-04-25 Simulator for read only memory

Publications (1)

Publication Number Publication Date
JPS53132230A true JPS53132230A (en) 1978-11-17

Family

ID=12757851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4681677A Pending JPS53132230A (en) 1977-04-25 1977-04-25 Simulator for read only memory

Country Status (1)

Country Link
JP (1) JPS53132230A (en)

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