JPS53104106A - Channel selector - Google Patents
Channel selectorInfo
- Publication number
- JPS53104106A JPS53104106A JP1822877A JP1822877A JPS53104106A JP S53104106 A JPS53104106 A JP S53104106A JP 1822877 A JP1822877 A JP 1822877A JP 1822877 A JP1822877 A JP 1822877A JP S53104106 A JPS53104106 A JP S53104106A
- Authority
- JP
- Japan
- Prior art keywords
- channel selector
- destinations
- destination
- building
- enable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Superheterodyne Receivers (AREA)
Abstract
PURPOSE:To enable to simply determine the destination with the external switch, by building in the logic calculation program for all the destinations in the logic operation circuit and by controlling the variable frequency divider by obtaining the frequency dividing ratio corresponding to the reception desired channel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1822877A JPS53104106A (en) | 1977-02-23 | 1977-02-23 | Channel selector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1822877A JPS53104106A (en) | 1977-02-23 | 1977-02-23 | Channel selector |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS53104106A true JPS53104106A (en) | 1978-09-11 |
Family
ID=11965794
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1822877A Pending JPS53104106A (en) | 1977-02-23 | 1977-02-23 | Channel selector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS53104106A (en) |
-
1977
- 1977-02-23 JP JP1822877A patent/JPS53104106A/en active Pending
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