JPS5275908A - Non-block time division exchange call path system - Google Patents

Non-block time division exchange call path system

Info

Publication number
JPS5275908A
JPS5275908A JP15196975A JP15196975A JPS5275908A JP S5275908 A JPS5275908 A JP S5275908A JP 15196975 A JP15196975 A JP 15196975A JP 15196975 A JP15196975 A JP 15196975A JP S5275908 A JPS5275908 A JP S5275908A
Authority
JP
Japan
Prior art keywords
time division
path system
call path
block time
exchange call
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15196975A
Other languages
Japanese (ja)
Other versions
JPS5649516B2 (en
Inventor
Kanji Tawara
Yoji Fukinuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP15196975A priority Critical patent/JPS5275908A/en
Publication of JPS5275908A publication Critical patent/JPS5275908A/en
Publication of JPS5649516B2 publication Critical patent/JPS5649516B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To reduce the number of necessary memory bit by installing channel shift switch to first and final stages and highway switch of plural stages to the center respectively.
JP15196975A 1975-12-22 1975-12-22 Non-block time division exchange call path system Granted JPS5275908A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15196975A JPS5275908A (en) 1975-12-22 1975-12-22 Non-block time division exchange call path system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15196975A JPS5275908A (en) 1975-12-22 1975-12-22 Non-block time division exchange call path system

Publications (2)

Publication Number Publication Date
JPS5275908A true JPS5275908A (en) 1977-06-25
JPS5649516B2 JPS5649516B2 (en) 1981-11-21

Family

ID=15530166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15196975A Granted JPS5275908A (en) 1975-12-22 1975-12-22 Non-block time division exchange call path system

Country Status (1)

Country Link
JP (1) JPS5275908A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS612183U (en) * 1984-06-13 1986-01-08 勉 佐藤 Dama Bow / Dama Arrow Decoration
JPS612996U (en) * 1984-06-13 1986-01-09 勉 佐藤 battledore decoration

Also Published As

Publication number Publication date
JPS5649516B2 (en) 1981-11-21

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