JPS5236476A - Non-volatile semiconductor memory - Google Patents
Non-volatile semiconductor memoryInfo
- Publication number
- JPS5236476A JPS5236476A JP11304275A JP11304275A JPS5236476A JP S5236476 A JPS5236476 A JP S5236476A JP 11304275 A JP11304275 A JP 11304275A JP 11304275 A JP11304275 A JP 11304275A JP S5236476 A JPS5236476 A JP S5236476A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor memory
- volatile semiconductor
- insulating film
- read operation
- control gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To provide a step on the secondary insulating film and form a control gate on it, thereby permitting write and read operation to be performed extremely easily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11304275A JPS5236476A (en) | 1975-09-17 | 1975-09-17 | Non-volatile semiconductor memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11304275A JPS5236476A (en) | 1975-09-17 | 1975-09-17 | Non-volatile semiconductor memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5236476A true JPS5236476A (en) | 1977-03-19 |
JPS5634107B2 JPS5634107B2 (en) | 1981-08-07 |
Family
ID=14602000
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11304275A Granted JPS5236476A (en) | 1975-09-17 | 1975-09-17 | Non-volatile semiconductor memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5236476A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57180181A (en) * | 1981-04-30 | 1982-11-06 | Nec Corp | Mos type semiconductor device and manufacturing method therefor |
US5739568A (en) * | 1994-11-28 | 1998-04-14 | Motorola, Inc. | Non-volatile memory having a cell applying to multi-bit data by double layered floating gate architecture and programming method for the same |
-
1975
- 1975-09-17 JP JP11304275A patent/JPS5236476A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57180181A (en) * | 1981-04-30 | 1982-11-06 | Nec Corp | Mos type semiconductor device and manufacturing method therefor |
US5739568A (en) * | 1994-11-28 | 1998-04-14 | Motorola, Inc. | Non-volatile memory having a cell applying to multi-bit data by double layered floating gate architecture and programming method for the same |
Also Published As
Publication number | Publication date |
---|---|
JPS5634107B2 (en) | 1981-08-07 |
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