JPS52147044A - Dc balancing unit - Google Patents

Dc balancing unit

Info

Publication number
JPS52147044A
JPS52147044A JP6419376A JP6419376A JPS52147044A JP S52147044 A JPS52147044 A JP S52147044A JP 6419376 A JP6419376 A JP 6419376A JP 6419376 A JP6419376 A JP 6419376A JP S52147044 A JPS52147044 A JP S52147044A
Authority
JP
Japan
Prior art keywords
balancing unit
balancing
shut
affected
obtaining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6419376A
Other languages
Japanese (ja)
Inventor
Botaro Hirosaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6419376A priority Critical patent/JPS52147044A/en
Publication of JPS52147044A publication Critical patent/JPS52147044A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017545Coupling arrangements; Impedance matching circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

PURPOSE:To obtain the pulse wave form of small inter-code interference without being affected by DC shut-off of transmission line at the input point of discrimination circuit by obtaining the stable DC balancing.
JP6419376A 1976-06-01 1976-06-01 Dc balancing unit Pending JPS52147044A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6419376A JPS52147044A (en) 1976-06-01 1976-06-01 Dc balancing unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6419376A JPS52147044A (en) 1976-06-01 1976-06-01 Dc balancing unit

Publications (1)

Publication Number Publication Date
JPS52147044A true JPS52147044A (en) 1977-12-07

Family

ID=13250975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6419376A Pending JPS52147044A (en) 1976-06-01 1976-06-01 Dc balancing unit

Country Status (1)

Country Link
JP (1) JPS52147044A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5586213A (en) * 1978-12-22 1980-06-28 Nec Corp Automatic equalizer
JPS6442960A (en) * 1987-08-10 1989-02-15 Nippon Telegraph & Telephone Low frequency regeneration circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5586213A (en) * 1978-12-22 1980-06-28 Nec Corp Automatic equalizer
JPS6256686B2 (en) * 1978-12-22 1987-11-26 Nippon Electric Co
JPS6442960A (en) * 1987-08-10 1989-02-15 Nippon Telegraph & Telephone Low frequency regeneration circuit

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