JPH11243167A - Heat sink - Google Patents
Heat sinkInfo
- Publication number
- JPH11243167A JPH11243167A JP10042424A JP4242498A JPH11243167A JP H11243167 A JPH11243167 A JP H11243167A JP 10042424 A JP10042424 A JP 10042424A JP 4242498 A JP4242498 A JP 4242498A JP H11243167 A JPH11243167 A JP H11243167A
- Authority
- JP
- Japan
- Prior art keywords
- heat sink
- polycrystalline diamond
- semiconductor element
- thickness
- diamond layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、ヒートシンクに
関し、特に、その表面上に発熱量の大きい半導体素子が
取付けられるヒートシンクに関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat sink, and more particularly, to a heat sink having a semiconductor element having a large amount of heat generated thereon.
【０００２】[0002]
【従来の技術】従来のＬＳＩパッケージなどの半導体素
子を搭載した電子部品は、その発熱量もそれほど大きく
なく、Ａｌ2 Ｏ3 のように熱伝導率が１７Ｗ／ｍ・Ｋ程
度のヒートシンクが多用されていた。しかし、近年では
ＬＳＩの高性能化や高密度実装化に伴い発熱量の増大が
問題となっており、その対策としてＡｌＮ、ＳｉＣまた
はＣｕ−Ｗ焼結体などの熱伝導特性の優れた材料をヒー
トシンク（放熱基板）として用いる傾向が強くなってい
る。さらに、最近は情報の高密度化に伴いレーザダイオ
ード（ＬＤ）のように局所的に大きな発熱をする半導体
素子に高性能なヒートシンクが利用されている。2. Description of the Related Art A conventional electronic component on which a semiconductor element such as an LSI package is mounted does not generate much heat, and a heat sink having a thermal conductivity of about 17 W / m · K, such as Al 2 O 3 , is frequently used. I was However, in recent years, an increase in the amount of heat generated has become a problem due to higher performance and higher density mounting of LSIs. As a countermeasure, a material having excellent heat conduction properties such as AlN, SiC or Cu-W sintered body has been used. There is a strong tendency to use it as a heat sink (radiator substrate). Further, recently, a high-performance heat sink is used for a semiconductor element that generates a large amount of heat locally such as a laser diode (LD) as information density increases.
【０００３】例えば、本願の出願人は特開平５−３２６
７６７号公報「放熱基板」において、図７に示すような
ヒートシンクを提案している。図７を参照して、従来の
ヒートシンクの問題点を説明する。[0003] For example, the applicant of the present application is disclosed in Japanese Patent Laid-Open No. 5-326.
Japanese Patent Application Publication No. 767, “radiation board” proposes a heat sink as shown in FIG. The problem of the conventional heat sink will be described with reference to FIG.
【０００４】図７は、パッケージ１１の中に半導体素子
１５、半導体素子１５に接続されるボンディングワイヤ
１７およびボンディングワイヤ１７に接続されるリード
フレーム１６が設けらている状態を示している。そし
て、半導体素子１５の下には下から順に、金属またはセ
ラミックスからなる基板母材１２、多結晶ダイヤモンド
層１３、第１中間接合層１８ａ、第２中間接合層１８
ｂ、金属接合層１４で構成される放熱基板が設けられて
いる。それによれば、基板母材として熱伝導性の良い金
属および金属化合物を選択した場合、たとえばＣｕ−Ｗ
焼結体は熱膨張係数が室温〜４００℃で６．５×１０-6
／℃以上と比較的大きい値をし、熱伝導特性の良い放熱
基板の使用により発せられる熱は分散されていた。FIG. 7 shows a state in which a semiconductor element 15, a bonding wire 17 connected to the semiconductor element 15, and a lead frame 16 connected to the bonding wire 17 are provided in the package 11. Then, under the semiconductor element 15, in order from the bottom, a substrate base material 12 made of metal or ceramic, a polycrystalline diamond layer 13, a first intermediate bonding layer 18a, and a second intermediate bonding layer 18
b, a heat dissipation board composed of the metal bonding layer 14 is provided. According to this, when a metal and a metal compound having good thermal conductivity are selected as a substrate base material, for example, Cu-W
The sintered body has a thermal expansion coefficient of 6.5 × 10 −6 at room temperature to 400 ° C.
/ ° C or more, and the heat generated by the use of a heat-radiating substrate having good heat conduction characteristics was dispersed.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、多結晶
ダイヤモンド層１３の熱膨張係数が室温〜４００℃で
２．３×１０-6／℃であることから、全体の熱膨張係数
を４×１０-6／℃以上と規定することは、多結晶ダイヤ
モンド層１３と金属基板母材１２の厚みの関係が制限さ
れ、多結晶ダイヤモンド層１３に比して熱伝導率の高い
金属基板母材１２を必要以上に厚くしてしまい、熱膨張
係数の一致に着目するあまり、本来の目的である放熱特
性を低下させることがある。そのため、ＧａＡｓやＩｎ
Ｐなどの出力の高いＬＤ等の半導体素子１５に使用する
とヒートシンクとＬＤの熱膨張率の差により、温度上昇
時にＬＤ内部の応力が加わりレーザの出力特性が低下し
たり、ひどいときにはＬＤが割れるという問題が発生し
ていた。[SUMMARY OF THE INVENTION However, the polycrystalline diamond layer from a thermal expansion coefficient of 13 is 2.3 × 10 -6 / ℃ at room temperature to 400 ° C., the overall thermal expansion coefficient of 4 × 10 - When the temperature is 6 / ° C. or more, the relationship between the thickness of the polycrystalline diamond layer 13 and the thickness of the metal substrate base material 12 is limited, and the metal substrate base material 12 having a higher thermal conductivity than the polycrystalline diamond layer 13 is required. When the thickness is increased as described above, and attention is paid to the coincidence of the thermal expansion coefficients, the heat radiation characteristic, which is the original purpose, may be reduced. Therefore, GaAs or In
When used for a semiconductor device 15 such as an LD having a high output such as P, the stress inside the LD is applied when the temperature rises and the output characteristics of the laser are deteriorated due to the difference in the coefficient of thermal expansion between the heat sink and the LD. There was a problem.
【０００６】この発明は、上記のようなＧａＡｓやＩｎ
ＰのＬＤなどの発熱量の大きな半導体素子１５に使用す
る場合に生じる課題を解決するためになされたもので、
その目的は、温度上昇してもＬＤをはじめとする半導体
素子１５の特性を維持できるよう半導体素子１５の種類
に対応した熱膨張率を有するだけでなく、放熱特性にも
優れたヒートシンクを提供することである。[0006] The present invention relates to GaAs or In as described above.
The purpose of the present invention is to solve a problem that occurs when the semiconductor device 15 having a large calorific value such as an LD of P is used.
The object is to provide a heat sink that not only has a coefficient of thermal expansion corresponding to the type of the semiconductor element 15 so that the characteristics of the semiconductor element 15 including the LD can be maintained even when the temperature rises, but also has excellent heat radiation characteristics. That is.
【０００７】[0007]
【課題を解決するための手段】請求項１に記載のヒート
シンクは、上下主表面を有し、この上下主表面間の厚さ
が２００μｍ〜６００μｍである、金属材料からなる基
板母材を備える。また、基板母材の少なくとも上下主表
面の１方上に形成された、厚さが５μｍ〜６０μｍであ
る多結晶ダイヤモンド層を備える。そして、多結晶ダイ
ヤモンド層表面上に半導体素子が設けられる。According to a first aspect of the present invention, there is provided a heat sink having a substrate base material made of a metal material having upper and lower main surfaces, and having a thickness between the upper and lower main surfaces of 200 μm to 600 μm. Also, a polycrystalline diamond layer having a thickness of 5 μm to 60 μm is formed on at least one of the upper and lower main surfaces of the substrate base material. Then, a semiconductor element is provided on the surface of the polycrystalline diamond layer.
【０００８】このように構成されているため、基板母材
の厚みは２００μｍ以上であり、強度が確保される。ま
た、基板母材の厚みが６００μｍ以下なので、放熱特性
も確保される。その結果、温度上昇が著しいＬＤ等を使
用しても、強度面において使用に耐え、かつ、放熱特性
の面において、半導体素子を良好に動作させるヒートシ
ンクを提供することができる。With this configuration, the thickness of the substrate base material is 200 μm or more, and the strength is secured. Further, since the thickness of the substrate base material is 600 μm or less, heat radiation characteristics are also ensured. As a result, it is possible to provide a heat sink that can withstand use in terms of strength and operate the semiconductor element satisfactorily in terms of heat radiation characteristics even when an LD or the like whose temperature rises significantly is used.
【０００９】請求項２に記載のヒートシンクは、請求項
１に記載のヒートシンクであって、多結晶ダイヤモンド
層を基板母材の上下主表面の両方上に備える。A heat sink according to a second aspect is the heat sink according to the first aspect, wherein the polycrystalline diamond layer is provided on both the upper and lower main surfaces of the substrate base material.
【００１０】このように構成されることによって、請求
項１に記載のヒートシンクよりもさらに、１層多く、ま
た、基板母材の対向する２表面にダイヤモンド層を有し
ている。そのため、一方のみに多結晶ダイヤモンド層を
有するときに比べて熱膨張率の相違による延びの相違が
あった場合に、２表面でその熱膨張による面方向の伸び
が相違することによって発生する応力を吸収する。それ
により、１表面のみに多結晶ダイヤモンド層がある場合
よりも、ヒートシンクの反りが発生しにくくなる。その
結果、半導体素子に亀裂等の悪影響を及ぼしにくいヒー
トシンクを提供することができる。With this configuration, the heat sink according to the first aspect further has one more layer and a diamond layer on two opposing surfaces of the substrate base material. Therefore, when there is a difference in elongation due to a difference in the coefficient of thermal expansion as compared with the case where only one of the layers has a polycrystalline diamond layer, the stress generated due to the difference in elongation in the plane direction due to the thermal expansion on the two surfaces is reduced Absorb. Thereby, the warpage of the heat sink is less likely to occur than when the polycrystalline diamond layer is provided only on one surface. As a result, it is possible to provide a heat sink that does not easily adversely affect the semiconductor element such as a crack.
【００１１】請求項３に記載のヒートシンクは、請求項
１または２に記載のヒートシンクであって、多結晶ダイ
ヤモンド層の表面上の所定領域に形成され、Ａｕ，Ａ
ｇ，Ｓｉ，Ｇｅ，Ｓｎ，ＰｄおよびＩｎの群から選ばれ
た少なくとも１種類の金属からなる厚さ２μｍ〜５μｍ
の金属接合層を備える。A heat sink according to a third aspect is the heat sink according to the first or second aspect, wherein the heat sink is formed in a predetermined region on the surface of the polycrystalline diamond layer, and wherein Au, A
g, Si, Ge, Sn, Pd, and at least one metal selected from the group consisting of In and having a thickness of 2 μm to 5 μm.
A metal bonding layer.
【００１２】このように構成することによって、金属接
合層は、厚みが２μｍ〜５μｍの範囲に規定される。こ
れにより、基板と半導体素子との間の熱膨張率の差を許
容範囲内とすることができる。そのため、熱膨張率の相
違による応力の発生を低減できる。その結果、半導体素
子と多結晶ダイヤモンド層との間の熱膨張率の相違によ
る伸びの相違のために発生する応力が許容範囲内である
ヒートシンクを提供することができる。With this configuration, the thickness of the metal bonding layer is defined in the range of 2 μm to 5 μm. Thereby, the difference in the coefficient of thermal expansion between the substrate and the semiconductor element can be set within an allowable range. Therefore, generation of stress due to a difference in the coefficient of thermal expansion can be reduced. As a result, it is possible to provide a heat sink in which the stress generated due to the difference in elongation due to the difference in the coefficient of thermal expansion between the semiconductor element and the polycrystalline diamond layer is within an allowable range.
【００１３】請求項４に記載のヒートシンクは、請求項
１または２に記載のヒートシンクであって、多結晶ダイ
ヤモンド層の表面上の所定領域に形成され、Ｔｉ，Ｚ
ｒ，Ｈｆ，Ｎｂ，Ｔａ，Ｃｒ，Ｍｏ，Ｗ，Ａｕ，Ｎｉお
よびＶの群から選ばれた少なくとも１種類の物質の酸化
物、炭化物、窒化物および炭窒化物のうちから選ばれた
少なくとも１種類からなる厚さ１μｍ〜４μｍの第１中
間接合層を備える。また、第１中間接合層上に形成さ
れ、Ｍｏ，Ｎｉ，Ｐｄ，Ｐｔ，Ａｕの群から選ばれた少
なくとも１種類の物質からなる厚さ２μｍ〜５μｍの第
２中間接合層を備える。さらに、第２中間接合層の表面
上に形成され、その表面上に半導体素子が取付けられ
る、Ａｕ，Ａｇ，Ｓｉ，Ｇｅ，Ｓｎ，ＰｄおよびＩｎの
群から選ばれた少なくとも１種類の金属からなる厚さ２
μｍ〜５μｍの金属接合層を備える。A heat sink according to a fourth aspect is the heat sink according to the first or second aspect, wherein the heat sink is formed in a predetermined region on the surface of the polycrystalline diamond layer, and the Ti, Z
At least one selected from oxides, carbides, nitrides and carbonitrides of at least one substance selected from the group consisting of r, Hf, Nb, Ta, Cr, Mo, W, Au, Ni and V A first intermediate bonding layer having a thickness of 1 μm to 4 μm of various types is provided. The semiconductor device further includes a second intermediate bonding layer formed on the first intermediate bonding layer and made of at least one material selected from the group consisting of Mo, Ni, Pd, Pt, and Au and having a thickness of 2 μm to 5 μm. Furthermore, it is formed of at least one metal selected from the group consisting of Au, Ag, Si, Ge, Sn, Pd, and In, which is formed on the surface of the second intermediate bonding layer and on which the semiconductor element is mounted. Thickness 2
It has a metal bonding layer of μm to 5 μm.
【００１４】このように構成することにより、結晶ダイ
ヤモンド層と金属接合層との接合強度が高められる。そ
のため、金属接合層が亀裂等を生じることなく熱膨張に
より発生した応力を吸収することができる。それによ
り、熱膨張係数に相違があっても、熱膨張によって生じ
る伸びの差のために発生する応力を吸収し、半導体素子
が発生する熱を逃がすことができる亀裂等を生じる可能
性の低いヒートシンクを提供することができる。With this configuration, the bonding strength between the crystalline diamond layer and the metal bonding layer can be increased. Therefore, the stress generated by the thermal expansion can be absorbed without causing a crack or the like in the metal bonding layer. As a result, even if there is a difference in the coefficient of thermal expansion, the heat sink that absorbs the stress generated due to the difference in elongation caused by the thermal expansion and has a low possibility of generating a crack or the like that can release the heat generated by the semiconductor element. Can be provided.
【００１５】請求項５に記載のヒートシンクは、請求項
１〜４に記載のヒートシンクであって、基板母材は、Ｍ
ｏ，Ｗ，Ｃｕ，Ｃｕ−Ｗ焼結体，Ｃｕ−Ｍｏ焼結体，Ｃ
ｕ−Ｍｏ−Ｗ焼結体の群から選ばれた金属によって形成
されている。A heat sink according to a fifth aspect is the heat sink according to the first to fourth aspects, wherein the base material of the substrate is M
o, W, Cu, Cu-W sintered body, Cu-Mo sintered body, C
It is formed of a metal selected from the group of u-Mo-W sintered bodies.
【００１６】このように構成することにより、Ｍｏ，
Ｗ，Ｃｕ，Ｃｕ−Ｗ焼結体，Ｃｕ−Ｍｏ焼結体，Ｃｕ−
Ｍｏ−Ｗ焼結体の群から選ばれた金属は熱伝導率が高い
ため、放熱特性が向上する。また、上記の基板母材は、
半導体素子の熱膨張率に近い値をとる。そのため、ヒー
トシンクは発生する熱を有効に吸収し、かつ、接合面に
対して非対称な変形をしにくくなる。その結果、半導体
素子に対して熱膨張特性が近似し、かつ、熱吸収特性に
優れたヒートシンクを提供することができる。With this configuration, Mo,
W, Cu, Cu-W sintered body, Cu-Mo sintered body, Cu-
Since the metal selected from the group of the Mo—W sintered bodies has high thermal conductivity, the heat radiation characteristics are improved. In addition, the substrate base material is
It takes a value close to the coefficient of thermal expansion of the semiconductor element. Therefore, the heat sink effectively absorbs the generated heat, and is less likely to be asymmetrically deformed with respect to the bonding surface. As a result, it is possible to provide a heat sink whose thermal expansion characteristics are close to those of the semiconductor element and which have excellent heat absorption characteristics.
【００１７】請求項６に記載のヒートシンクは、請求項
１〜５のいずれかに記載のヒートシンクであって、多結
晶ダイヤモンド層が、その熱伝導率が室温〜４００℃の
範囲内で５００Ｗ／ｍ・Ｋ〜２０００Ｗ／ｍ・Ｋの範囲
内の所定の値である。A heat sink according to a sixth aspect is the heat sink according to any one of the first to fifth aspects, wherein the polycrystalline diamond layer has a thermal conductivity of 500 W / m in a range of room temperature to 400 ° C. It is a predetermined value within the range of K to 2000 W / mK.
【００１８】このように構成することによりヒートシン
クの放熱特性が向上する。そのため半導体素子の発熱を
有効に逃がすことができる。その結果、半導体素子に熱
による亀裂等の悪影響を与えることのないヒートシンク
を提供することができる。With this configuration, the heat radiation characteristics of the heat sink are improved. Therefore, heat generated by the semiconductor element can be effectively released. As a result, it is possible to provide a heat sink that does not adversely affect the semiconductor element such as cracks due to heat.
【００１９】請求項７に記載のヒートシンクは、請求項
１〜６のいずれかに記載のヒートシンクであって、半導
体素子側に凸に撓みを有し、任意の部分で曲率半径が
２．５ｍ以上である。A heat sink according to a seventh aspect is the heat sink according to any one of the first to sixth aspects, wherein the heat sink has a convex bending on the semiconductor element side and a radius of curvature of 2.5 m or more at an arbitrary portion. It is.
【００２０】このように構成することにより、多結晶ダ
イヤモンド層が一方にある場合に、その多結晶ダイヤモ
ンド層の熱による延びが基板の伸びよりも大きく、ヒー
トシンクが撓んだとしても、元の反りがその撓みを吸収
する。そのため、ヒートシンクは、内部応力の発生が生
じにくくなる。その結果、半導体素子に悪影響を与えな
いヒートシンクを提供することができる。With this configuration, when the polycrystalline diamond layer is on one side, the polycrystalline diamond layer expands due to heat more than the elongation of the substrate. Absorbs the deflection. Therefore, the heat sink is less likely to generate internal stress. As a result, a heat sink that does not adversely affect the semiconductor element can be provided.
【００２１】請求項８に記載のヒートシンクは、請求項
１〜７のいずれかに記載のヒートシンクであって、多結
晶ダイヤモンド層および基板母材の材質と厚みをそれぞ
れ所定の材質と厚みとに設定することにより、多結晶ダ
イヤモンド層の主表面の面内方向の熱膨張率が室温〜４
００℃の範囲で２．３×１０-6〜４．０×１０-6／℃の
範囲内の所定の値に設定されている。The heat sink according to claim 8 is the heat sink according to any one of claims 1 to 7, wherein the material and thickness of the polycrystalline diamond layer and the base material of the substrate are set to predetermined materials and thicknesses, respectively. By doing so, the coefficient of thermal expansion in the in-plane direction of the main surface of the polycrystalline diamond layer is from room temperature to 4
It is set to a predetermined value within the range of 2.3 × 10 −6 to 4.0 × 10 −6 / ° C. in the range of 00 ° C.
【００２２】このようにすることにより、ヒートシンク
は多結晶ダイヤモンド層、金属接合層、第１の中間接合
層および第２の中間接合層の構成材の熱膨張率の差によ
る伸びの差を許容範囲内にすることができ、かつ、放熱
特性を確保することができる。そのため、半導体素子は
発熱による亀裂等の悪影響を受けにくくなる。その結
果、半導体素子の発熱を吸収し、かつ、熱膨張に耐え得
るヒートシンクを提供することができる。By doing so, the heat sink can tolerate a difference in elongation due to a difference in thermal expansion coefficient between the constituent materials of the polycrystalline diamond layer, the metal bonding layer, the first intermediate bonding layer and the second intermediate bonding layer. And heat dissipation characteristics can be secured. Therefore, the semiconductor element is less susceptible to adverse effects such as cracks due to heat generation. As a result, it is possible to provide a heat sink that can absorb heat generated by the semiconductor element and withstand thermal expansion.
【００２３】請求項９に記載のヒートシンクの製造方法
は、請求項１から８のヒートシンクであって、多結晶ダ
イヤモンド層が気相合成法により形成される。このよう
に気相合成法により多結晶ダイヤモンド層が基板上に形
成されることにより、厚さ５μｍ〜６０μｍの多結晶ダ
イヤモンド層を容易に形成することができる。そのた
め、放熱特性および熱膨張特性が有効な値の多結晶ダイ
ヤモンド層を得ることができる。その結果、半導体素子
の熱膨張および放熱に適用し得るヒートシンクを提供す
ることができる。According to a ninth aspect of the present invention, in the heat sink, the polycrystalline diamond layer is formed by a vapor phase synthesis method. By forming the polycrystalline diamond layer on the substrate by the vapor phase synthesis method, a polycrystalline diamond layer having a thickness of 5 μm to 60 μm can be easily formed. Therefore, it is possible to obtain a polycrystalline diamond layer having effective values of heat radiation characteristics and thermal expansion characteristics. As a result, it is possible to provide a heat sink applicable to thermal expansion and heat radiation of the semiconductor element.
【００２４】[0024]
【発明の実施の形態】以下、本発明の実施の形態につい
て図を用いて説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００２５】（実施の形態１）実施の形態１のヒートシ
ンクを図１〜図４に基づいて説明する。Embodiment 1 A heat sink according to Embodiment 1 will be described with reference to FIGS.
【００２６】本実施の形態に記載のヒートシンクは、図
１に示すように、パッケージ１の中に半導体素子５、半
導体素子５に接続されるボンディングワイヤ７およびボ
ンディングワイヤ７に接続されるリードフレーム６が設
けられている。そして、半導体素子５の土台となるため
下から順番に、金属基板母材２、多結晶ダイヤモンド層
３、第１中間接合層８ａ、第２中間接合層８ｂおよび金
属接合層４が設けられている。As shown in FIG. 1, the heat sink according to the present embodiment includes a semiconductor element 5, a bonding wire 7 connected to the semiconductor element 5, and a lead frame 6 connected to the bonding wire 7 in the package 1. Is provided. Then, a metal substrate base material 2, a polycrystalline diamond layer 3, a first intermediate bonding layer 8a, a second intermediate bonding layer 8b, and a metal bonding layer 4 are provided in order from the bottom to serve as a base for the semiconductor element 5. .
【００２７】また、本実施の形態によるヒートシンクは
以下の状態で製造される。厚さが０．６ｍｍで１５×１
５ｍｍのＣｕ−Ｗ焼結体（Ｃｕ１０％）基板上に脱脂洗
浄、酸洗浄、粒子ダイヤを用いた前処理を施した後、熱
フィラメントＣＶＤ法により、ダイヤモンドを４０時間
成膜する。The heat sink according to the present embodiment is manufactured in the following state. 15 × 1 with 0.6mm thickness
After performing a degreasing cleaning, an acid cleaning, and a pretreatment using a particle diamond on a 5 mm Cu-W sintered body (Cu10%) substrate, a diamond film is formed by a hot filament CVD method for 40 hours.
【００２８】 （条件） 原料ガス 水素：１０００ｓｃｃｍ メタン：２０ｓｃｃｍ ガス圧力 ６０Ｔｏｒｒ Ｗフィラメント温度：２０００℃〜２１００℃ 上記のような条件で多結晶ダイヤモンドを合成すること
で厚さ約４０μｍの多結晶ダイヤモンドが被覆できる。
そして、被覆した多結晶ダイヤモンドは、表面が荒れて
いるため２５μｍまで研磨することで荒れをなくし、そ
の後第１中間接合層としてＴｉを、第２中間接合層とし
てＰｔを、金属接合層としてＡｕ−Ｓｎを被覆し、Ｇａ
ＡｓとＩｎＰのＬＤを実装する。このような状態で、Ｌ
Ｄは問題なく作動し、レーザを発振することが確認でき
る。(Conditions) Source gas Hydrogen: 1000 sccm Methane: 20 sccm Gas pressure 60 Torr W filament temperature: 2000 ° C. to 2100 ° C. Polycrystalline diamond having a thickness of about 40 μm is coated by synthesizing polycrystalline diamond under the above conditions. it can.
The coated polycrystalline diamond has a rough surface and is polished to 25 μm to eliminate the roughness. Thereafter, Ti is used as the first intermediate bonding layer, Pt is used as the second intermediate bonding layer, and Au− is used as the metal bonding layer. Sn coating, Ga
The LD of As and InP is mounted. In such a state, L
It can be confirmed that D operates without any problem and oscillates the laser.
【００２９】このような構成および条件にすることによ
って、基板母材の厚みは２００μｍ以上であり、強度が
確保される。また、多結晶ダイヤモンド層の厚みが６０
０μｍ以下なので、放熱特性も確保される。また、金属
接合層は、厚みが２μｍ〜５μｍの範囲に規定される。
これにより、基板と半導体素子との間の熱膨張率の差を
許容範囲内とすることができる。そのため、熱膨張率の
相違による応力の発生を低減できる。また、結晶ダイヤ
モンド層と金属接合層との接合強度が高められる。その
ため、金属接合層が亀裂等を生じることなく熱膨張によ
り発生した応力を吸収することができる。また、多結晶
ダイヤモンド層が、その熱伝導率が室温〜４００℃の範
囲内で５００Ｗ／ｍ・Ｋ〜２０００Ｗ／ｍ・Ｋの範囲内
の所定の値である。そのため、ヒートシンクの放熱特性
が向上する。そのため半導体素子の発熱を有効に逃がす
ことができる。さらに、多結晶ダイヤモンド層、金属接
合層、第１の中間接合層および第２の中間接合層の構成
材の熱膨張率の差による伸びの差を許容範囲内にするこ
とができ、かつ、放熱特性を確保することができる。そ
のため、半導体素子は発熱による亀裂等の悪影響を受け
にくくなる。その結果、半導体素子の発熱を吸収し、か
つ、熱膨張に耐え得るヒートシンクを提供することがで
きる。By adopting such a configuration and conditions, the thickness of the substrate base material is 200 μm or more, and the strength is secured. The thickness of the polycrystalline diamond layer is 60
Since it is 0 μm or less, heat radiation characteristics are also ensured. The thickness of the metal bonding layer is defined in the range of 2 μm to 5 μm.
Thereby, the difference in the coefficient of thermal expansion between the substrate and the semiconductor element can be set within an allowable range. Therefore, generation of stress due to a difference in the coefficient of thermal expansion can be reduced. Further, the bonding strength between the crystalline diamond layer and the metal bonding layer is increased. Therefore, the stress generated by the thermal expansion can be absorbed without causing a crack or the like in the metal bonding layer. The thermal conductivity of the polycrystalline diamond layer has a predetermined value in the range of room temperature to 400 ° C. and in the range of 500 W / m · K to 2000 W / m · K. Therefore, the heat radiation characteristics of the heat sink are improved. Therefore, heat generated by the semiconductor element can be effectively released. Furthermore, the difference in elongation due to the difference in the coefficient of thermal expansion between the constituent materials of the polycrystalline diamond layer, the metal bonding layer, the first intermediate bonding layer, and the second intermediate bonding layer can be kept within an allowable range, and the heat radiation Characteristics can be secured. Therefore, the semiconductor element is less susceptible to adverse effects such as cracks due to heat generation. As a result, it is possible to provide a heat sink that can absorb heat generated by the semiconductor element and withstand thermal expansion.
【００３０】なお、図２に示すように、第１中間接合層
８ａおよび第２中間接合層８ｂを含まない構造としても
同様に、半導体素子の発熱を吸収し、かつ、熱膨張に耐
え得るヒートシンクを提供することができる。As shown in FIG. 2, even if the structure does not include the first intermediate bonding layer 8a and the second intermediate bonding layer 8b, a heat sink capable of absorbing heat generated by the semiconductor element and withstanding thermal expansion is similarly provided. Can be provided.
【００３１】また、図３および図４に示すように、多結
晶ダイヤモンド層３を基板母材２の上下面に設けた場
合、１表面のみに設けた場合よりも、基板母材２および
多結晶ダイヤモンド層２の伸びの違いによる応力を上下
面で吸収し、撓みが生じにくくさらに安定した基板とな
る。As shown in FIGS. 3 and 4, when the polycrystalline diamond layer 3 is provided on the upper and lower surfaces of the substrate base material 2, the substrate base material 2 and the polycrystalline diamond layer are provided more than when only one surface is provided. The stress caused by the difference in the elongation of the diamond layer 2 is absorbed by the upper and lower surfaces, so that the substrate is less likely to be bent and more stable.
【００３２】また、図５および図６に示すように、撓み
が生じにくくさらに安定した基板とするために、当初か
らヒートシンクに、長さｌが１０ｍｍに対して最大撓み
量δが５μｍ以下、つまり曲率半径が２．５ｍ以上であ
る半導体素子５に対して凸となる元撓みを設けておいて
もよい。それにより、基板母材２の方が多結晶ダイヤモ
ンド層３よりも熱膨張率が大きいので、熱膨張率の相違
により基板母材２の伸びが多結晶ダイヤモンド層３の伸
びよりも大きくなる。そのため、半導体素子５に対して
凸となる元撓みに対して逆方向の半導体素子５に対して
凹となる撓みが発生する。その結果、熱膨張による変形
が生じても半導体素子１５に悪影響を与える可能性の少
ないヒートシンクとなる。なお、曲率半径を２．５ｍ以
上に規定したのは、曲率半径が２．５ｍより小さいと、
その影響により多結晶ダイヤモンド層３の厚みが部分的
に相違する状態となり、熱伝導特性に部分的な相違を生
じ、放熱特性に相違を生じるからである。As shown in FIG. 5 and FIG. 6, in order to obtain a more stable substrate that is unlikely to be bent, the maximum amount of bending δ is 5 μm or less for a length l of 10 mm from the beginning. An original deflection that becomes convex with respect to the semiconductor element 5 having a radius of curvature of 2.5 m or more may be provided. As a result, the substrate base material 2 has a higher coefficient of thermal expansion than the polycrystalline diamond layer 3, so that the difference in the coefficient of thermal expansion causes the substrate base material 2 to expand more than the polycrystalline diamond layer 3. For this reason, a bending that is concave with respect to the semiconductor element 5 in a direction opposite to the original bending that is convex with respect to the semiconductor element 5 occurs. As a result, a heat sink that is less likely to adversely affect the semiconductor element 15 even if deformation due to thermal expansion occurs. The reason for defining the radius of curvature to be 2.5 m or more is that if the radius of curvature is smaller than 2.5 m,
This is because, due to the influence, the thickness of the polycrystalline diamond layer 3 is partially different, causing a partial difference in heat conduction characteristics and a difference in heat radiation characteristics.
【００３３】（実施の形態２）実施の形態２によるヒー
トシンクの構造は実施の形態１と同様に、図１に示され
る構造であり、以下の状態で製造される。(Second Embodiment) The structure of a heat sink according to a second embodiment is the same as that of the first embodiment shown in FIG. 1, and is manufactured in the following state.
【００３４】厚さが０．６ｍｍで１５×１５ｍｍのＣｕ
−Ｗ焼結体（Ｃｕ１０％）基板上に脱脂洗浄、酸洗浄、
微粒ダイヤを用いた前処理を施した後マイクロ波プラズ
マＣＶＤ法により、多結晶ダイヤモンドを４５時間成膜
した。Cu having a thickness of 0.6 mm and a size of 15 × 15 mm
-Degreasing cleaning, acid cleaning on a W sintered body (Cu10%) substrate,
After pretreatment using a fine diamond, a polycrystalline diamond film was formed by microwave plasma CVD for 45 hours.
【００３５】（条件） 原料ガス 水素：３００ｓｃｃｍ メタン：８ｓｃｃｍ ガス圧力 １００Ｔｏｒｒ マイクロ波発振出力 ５００Ｗ 上記のような条件で多結晶ダイヤモンドを合成すること
で厚さ約３８μｍの多結晶ダイヤモンドが被覆できる。
そして、被覆した多結晶ダイヤモンドは、表面が荒れて
いるため２５μｍまで研磨することで荒れをなくし、そ
の後第１中間接合層としてＴｉを、第２中間接合層とし
てＰｔを、金属接合層としてＡｕ−Ｓｎを被覆し、Ｇａ
ＡｓとＩｎＰのＬＤを実装する。このような状態で、Ｌ
Ｄは問題なく作動し、レーザを発振することが確認でき
る。(Conditions) Source gas Hydrogen: 300 sccm Methane: 8 sccm Gas pressure 100 Torr Microwave oscillation output 500 W By synthesizing polycrystalline diamond under the above conditions, a polycrystalline diamond having a thickness of about 38 μm can be coated.
The coated polycrystalline diamond has a rough surface and is polished to 25 μm to eliminate the roughness. Thereafter, Ti is used as the first intermediate bonding layer, Pt is used as the second intermediate bonding layer, and Au− is used as the metal bonding layer. Sn coating, Ga
The LD of As and InP is mounted. In such a state, L
It can be confirmed that D operates without any problem and oscillates the laser.
【００３６】このような構成および条件にすることによ
って、基板母材の厚みは２００μｍ以上であり、強度が
確保される。また、多結晶ダイヤモンド層の厚みが６０
０μｍ以下なので、放熱特性も確保される。また、金属
接合層は、厚みが２μｍ〜５μｍの範囲に規定される。
これにより、基板と半導体素子との間の熱膨張率の差を
許容範囲内とすることができる。そのため、熱膨張率の
相違による応力の発生を低減できる。また、結晶ダイヤ
モンド層と金属接合層との接合強度が高められる。その
ため、金属接合層が亀裂等を生じることなく熱膨張によ
り発生した応力を吸収することができる。また、多結晶
ダイヤモンド層が、その熱伝導率が室温〜４００℃の範
囲内で５００Ｗ／ｍ・Ｋ〜２０００Ｗ／ｍ・Ｋの範囲内
の所定の値である。そのため、ヒートシンクの放熱特性
が向上する。そのため半導体素子の発熱を有効に逃がす
ことができる。さらに、多結晶ダイヤモンド層、金属接
合層、第１の中間接合層および第２の中間接合層の構成
材の熱膨張率の差による伸びの差を許容範囲内にするこ
とができ、かつ、放熱特性を確保することができる。そ
のため、半導体素子は発熱による亀裂等の悪影響を受け
にくくなる。その結果、半導体素子の発熱を吸収し、か
つ、熱膨張に耐え得るヒートシンクを提供することがで
きる。By adopting such a configuration and conditions, the thickness of the substrate base material is 200 μm or more, and the strength is secured. The thickness of the polycrystalline diamond layer is 60
Since it is 0 μm or less, heat radiation characteristics are also ensured. The thickness of the metal bonding layer is defined in the range of 2 μm to 5 μm.
Thereby, the difference in the coefficient of thermal expansion between the substrate and the semiconductor element can be set within an allowable range. Therefore, generation of stress due to a difference in the coefficient of thermal expansion can be reduced. Further, the bonding strength between the crystalline diamond layer and the metal bonding layer is increased. Therefore, the stress generated by the thermal expansion can be absorbed without causing a crack or the like in the metal bonding layer. The thermal conductivity of the polycrystalline diamond layer has a predetermined value in the range of room temperature to 400 ° C. and in the range of 500 W / m · K to 2000 W / m · K. Therefore, the heat radiation characteristics of the heat sink are improved. Therefore, heat generated by the semiconductor element can be effectively released. Furthermore, the difference in elongation due to the difference in the coefficient of thermal expansion between the constituent materials of the polycrystalline diamond layer, the metal bonding layer, the first intermediate bonding layer, and the second intermediate bonding layer can be kept within an allowable range, and the heat radiation Characteristics can be secured. Therefore, the semiconductor element is less susceptible to adverse effects such as cracks due to heat generation. As a result, it is possible to provide a heat sink that can absorb heat generated by the semiconductor element and withstand thermal expansion.
【００３７】なお、図２に示すように、第１中間接合層
８ａおよび第２中間接合層８ｂを含まない構造としても
同様に、半導体素子の発熱を吸収し、かつ、熱膨張に耐
え得るヒートシンクを提供することができる。As shown in FIG. 2, even if the structure does not include the first intermediate bonding layer 8a and the second intermediate bonding layer 8b, the heat sink capable of absorbing the heat generated by the semiconductor element and withstanding the thermal expansion is similarly provided. Can be provided.
【００３８】また、図３および図４に示すように、多結
晶ダイヤモンド層３を基板母材２の上下面に設けた場
合、１表面のみに設けた場合よりも、基板母材２および
多結晶ダイヤモンド層２の伸びの違いによる応力を上下
面で吸収し、撓みが生じにくくさらに安定した基板とな
る。As shown in FIGS. 3 and 4, when the polycrystalline diamond layer 3 is provided on the upper and lower surfaces of the substrate base material 2, the substrate base material 2 and the polycrystalline diamond layer are provided more than when only one surface is provided. The stress caused by the difference in the elongation of the diamond layer 2 is absorbed by the upper and lower surfaces, so that the substrate is less likely to be bent and more stable.
【００３９】また、図５および図６に示すように、撓み
が生じにくくさらに安定した基板とするために、当初か
らヒートシンクに、長さｌが１０ｍｍに対して最大撓み
量δが５μｍ以下、つまり曲率半径が２．５ｍ以上であ
る半導体素子５に対して凸となる元撓みを設けておいて
もよい。それにより、基板母材２の方が多結晶ダイヤモ
ンド層３よりも熱膨張率が大きいので、熱膨張率の相違
により基板母材２の伸びが多結晶ダイヤモンド層３の伸
びよりも大きくなる。そのため、半導体素子５に対して
凸となる元撓みに対して逆方向の半導体素子５に対して
凹となる撓みが発生する。その結果、熱膨張による変形
が生じても半導体素子１５に悪影響を与える可能性の少
ないヒートシンクとなる。なお、曲率半径を２．５ｍ以
上に規定したのは、曲率半径が２．５ｍより小さいと、
その影響により多結晶ダイヤモンド層３の厚みが部分的
に相違する状態となり、熱伝導特性に部分的な相違を生
じ、放熱特性に相違を生じるからである。As shown in FIG. 5 and FIG. 6, in order to obtain a more stable substrate which is unlikely to be bent, the heat sink is provided with a maximum bending amount δ of 5 μm or less for a length l of 10 mm from the beginning. An original deflection that becomes convex with respect to the semiconductor element 5 having a radius of curvature of 2.5 m or more may be provided. As a result, the substrate base material 2 has a higher coefficient of thermal expansion than the polycrystalline diamond layer 3, so that the difference in the coefficient of thermal expansion causes the substrate base material 2 to expand more than the polycrystalline diamond layer 3. For this reason, a bending that is concave with respect to the semiconductor element 5 in a direction opposite to the original bending that is convex with respect to the semiconductor element 5 occurs. As a result, a heat sink that is less likely to adversely affect the semiconductor element 15 even if deformation due to thermal expansion occurs. The reason for defining the radius of curvature to be 2.5 m or more is that if the radius of curvature is smaller than 2.5 m,
This is because, due to the influence, the thickness of the polycrystalline diamond layer 3 is partially different, causing a partial difference in heat conduction characteristics and a difference in heat radiation characteristics.
【００４０】（実施の形態３）実施の形態３によるヒー
トシンクの構造は実施の形態１と同様に、図１に示され
る構造であり、以下の状態で製造される。(Third Embodiment) The structure of a heat sink according to a third embodiment is the same as that of the first embodiment shown in FIG. 1, and is manufactured in the following state.
【００４１】厚さが０．６ｍｍで１５×１５ｍｍのＣｕ
−Ｗ焼結体（Ｃｕ１０％）基板上に脱脂洗浄、酸洗浄、
微粒ダイヤを用いた前処理を施した後、熱フィラメント
ＣＶＤ法により、多結晶ダイヤモンドを４０時間成膜し
た。Cu having a thickness of 0.6 mm and a size of 15 × 15 mm
-Degreasing cleaning, acid cleaning on a W sintered body (Cu10%) substrate,
After performing a pretreatment using a fine diamond, polycrystalline diamond was formed into a film by a hot filament CVD method for 40 hours.
【００４２】 （条件） 原料ガス 水素：１０００ｓｃｃｍ メタン：２０ｓｃｃｍ ガス圧力 ６０Ｔｏｒｒ Ｗフィラメント温度 ２０００℃〜２１００℃ 上記のような条件で多結晶ダイヤモンドを合成すること
で厚さ約３５μｍの多結晶ダイヤモンドが被覆できてい
た。このときの基板の撓みは、６２ｍｍに対してダイヤ
膜側に凸状に１２０μｍ、つまり曲率半径が４．０ｍで
あった。その後、一度基板母材を合成装置から取り出
し、裏返してもう一度上記条件にして４０時間合成を行
ない、厚さ約３５μｍの多結晶ダイヤモンドが得られ
た。この段階での基板の撓みは６２ｍｍに対して初めて
ダイヤ膜をつけた側に凸状に８０μｍ、つまり曲率半径
が６．０ｍであった。被覆した多結晶ダイヤモンド層
は、表面が荒れているため両面とも２８μｍまで研磨す
ることで荒れをなくし、その後、第１中間接合層として
Ｔｉを、第２中間接合層としてＰｔを、金属接合層とし
てＡｕ−Ｓｎを被覆し、ＧａＡｓとＩｎＰのＬＤを実装
する。このような状態で、ＬＤは問題なく作動し、レー
ザを発振することが確認できる。(Conditions) Source gas Hydrogen: 1000 sccm Methane: 20 sccm Gas pressure 60 Torr W filament temperature 2000 ° C. to 2100 ° C. Polycrystalline diamond having a thickness of about 35 μm can be coated by synthesizing polycrystalline diamond under the above conditions. I was The deflection of the substrate at this time was 120 μm in a convex shape on the diamond film side with respect to 62 mm, that is, the curvature radius was 4.0 m. Thereafter, the substrate base material was once taken out of the synthesizing apparatus, turned upside down, and again synthesized under the above conditions for 40 hours to obtain a polycrystalline diamond having a thickness of about 35 μm. At this stage, the deflection of the substrate was 80 μm in a convex shape on the side where the diamond film was formed for the first time with respect to 62 mm, that is, the radius of curvature was 6.0 m. Since the coated polycrystalline diamond layer has a rough surface, both surfaces are polished to 28 μm to eliminate the roughness. Then, Ti is used as the first intermediate bonding layer, Pt is used as the second intermediate bonding layer, and the metal bonding layer is used as the second intermediate bonding layer. Au-Sn is coated and LD of GaAs and InP is mounted. In such a state, it can be confirmed that the LD operates without any problem and oscillates the laser.
【００４３】このような構成および条件にすることによ
って、基板母材の厚みは２００μｍ以上であり、強度が
確保される。また、多結晶ダイヤモンド層の厚みが６０
０μｍ以下なので、放熱特性も確保される。また、金属
接合層は、厚みが２μｍ〜５μｍの範囲に規定される。
これにより、基板と半導体素子との間の熱膨張率の差を
許容範囲内とすることができる。そのため、熱膨張率の
相違による応力の発生を低減できる。また、結晶ダイヤ
モンド層と金属接合層との接合強度が高められる。その
ため、金属接合層が亀裂等を生じることなく熱膨張によ
り発生した応力を吸収することができる。また、多結晶
ダイヤモンド層が、その熱伝導率が室温〜４００℃の範
囲内で５００Ｗ／ｍ・Ｋ〜２０００Ｗ／ｍ・Ｋの範囲内
の所定の値である。そのため、ヒートシンクの放熱特性
が向上する。そのため半導体素子の発熱を有効に逃がす
ことができる。さらに、多結晶ダイヤモンド層、金属接
合層、第１の中間接合層および第２の中間接合層の構成
材の熱膨張率の差による伸びの差を許容範囲内にするこ
とができ、かつ、放熱特性を確保することができる。そ
のため、半導体素子は発熱による亀裂等の悪影響を受け
にくくなる。その結果、半導体素子の発熱を吸収し、か
つ、熱膨張に耐え得るヒートシンクを提供することがで
きる。By adopting such a configuration and conditions, the thickness of the substrate base material is 200 μm or more, and the strength is secured. The thickness of the polycrystalline diamond layer is 60
Since it is 0 μm or less, heat radiation characteristics are also ensured. The thickness of the metal bonding layer is defined in the range of 2 μm to 5 μm.
Thereby, the difference in the coefficient of thermal expansion between the substrate and the semiconductor element can be set within an allowable range. Therefore, generation of stress due to a difference in the coefficient of thermal expansion can be reduced. Further, the bonding strength between the crystalline diamond layer and the metal bonding layer is increased. Therefore, the stress generated by the thermal expansion can be absorbed without causing a crack or the like in the metal bonding layer. The thermal conductivity of the polycrystalline diamond layer has a predetermined value in the range of room temperature to 400 ° C. and in the range of 500 W / m · K to 2000 W / m · K. Therefore, the heat radiation characteristics of the heat sink are improved. Therefore, heat generated by the semiconductor element can be effectively released. Furthermore, the difference in elongation due to the difference in the coefficient of thermal expansion between the constituent materials of the polycrystalline diamond layer, the metal bonding layer, the first intermediate bonding layer, and the second intermediate bonding layer can be kept within an allowable range, and the heat radiation Characteristics can be secured. Therefore, the semiconductor element is less susceptible to adverse effects such as cracks due to heat generation. As a result, it is possible to provide a heat sink that can absorb heat generated by the semiconductor element and withstand thermal expansion.
【００４４】なお、図２に示すように、第１中間接合層
８ａおよび第２中間接合層８ｂを含まない構造としても
同様に、半導体素子の発熱を吸収し、かつ、熱膨張に耐
え得るヒートシンクを提供することができる。As shown in FIG. 2, even if the structure does not include the first intermediate bonding layer 8a and the second intermediate bonding layer 8b, a heat sink capable of absorbing the heat generated by the semiconductor element and resisting thermal expansion is similarly provided. Can be provided.
【００４５】また、図３および図４に示すように、多結
晶ダイヤモンド層３を基板母材２の上下面に設けた場
合、１表面のみに設けた場合よりも、基板母材２および
多結晶ダイヤモンド層２の伸びの違いによる応力を上下
面で吸収し、撓みが生じにくくさらに安定した基板とな
る。As shown in FIGS. 3 and 4, when the polycrystalline diamond layer 3 is provided on the upper and lower surfaces of the substrate base material 2, the substrate base material 2 and the polycrystalline diamond layer are more provided than when only one surface is provided. The stress caused by the difference in the elongation of the diamond layer 2 is absorbed by the upper and lower surfaces, so that the substrate is less likely to be bent and more stable.
【００４６】また、図５および図６に示すように、撓み
が生じにくくさらに安定した基板とするために、当初か
らヒートシンクに、長さｌが１０ｍｍに対して最大撓み
量δが５μｍ以下、つまり曲率半径が２．５ｍ以上であ
る半導体素子５に対して凸となる元撓みを設けておいて
もよい。それにより、基板母材２の方が多結晶ダイヤモ
ンド層３よりも熱膨張率が大きいので、熱膨張率の相違
により基板母材２の伸びが多結晶ダイヤモンド層３の伸
びよりも大きくなる。そのため、半導体素子５に対して
凸となる元撓みに対して逆方向の半導体素子５に対して
凹となる撓みが発生する。その結果、熱膨張による変形
が生じても半導体素子１５に悪影響を与える可能性の少
ないヒートシンクとなる。なお、曲率半径を２．５ｍ以
上に規定したのは、曲率半径が２．５ｍより小さいと、
その影響により多結晶ダイヤモンド層３の厚みが部分的
に相違する状態となり、熱伝導特性に部分的な相違を生
じ、放熱特性に相違を生じるからである。As shown in FIG. 5 and FIG. 6, in order to obtain a more stable substrate which is unlikely to be bent, the heat sink is provided with a maximum bending amount δ of 5 μm or less for a length l of 10 mm from the beginning. An original deflection that becomes convex with respect to the semiconductor element 5 having a radius of curvature of 2.5 m or more may be provided. As a result, the substrate base material 2 has a higher coefficient of thermal expansion than the polycrystalline diamond layer 3, so that the difference in the coefficient of thermal expansion causes the substrate base material 2 to expand more than the polycrystalline diamond layer 3. For this reason, a bending that is concave with respect to the semiconductor element 5 in a direction opposite to the original bending that is convex with respect to the semiconductor element 5 occurs. As a result, a heat sink that is less likely to adversely affect the semiconductor element 15 even if deformation due to thermal expansion occurs. The reason for defining the radius of curvature to be 2.5 m or more is that if the radius of curvature is smaller than 2.5 m,
This is because, due to the influence, the thickness of the polycrystalline diamond layer 3 is partially different, causing a partial difference in heat conduction characteristics and a difference in heat radiation characteristics.
【００４７】[0047]
【発明の効果】請求項１〜９に記載の発明によれば、比
較的熱伝導率の良好な金属母材基板の少なくとも１表面
上の全面に厚さ５μｍ〜６０μｍの多結晶ダイヤモンド
層が被覆されていることにより、ヒートシンク全体とし
ての熱伝導特性が良好となる。加えて、半導体素子に比
べて熱膨張率の大きな金属基板母材に、熱膨張率の小さ
い多結晶ダイヤモンド層を被覆しているため、ヒートシ
ンク全体の熱膨張率は、基板と多結晶ダイヤモンド層と
の厚みを調整することで金属母材基板とダイヤモンド層
との中間の値である半導体素子の熱膨張率に揃えること
ができ、半導体素子の特性低下を抑制することができ
る。その結果、熱膨張率を一定に保ち、かつ、放熱性を
備え、半導体素子の特性の低下を防止し得ることができ
るヒートシンクを提供することができる。According to the first to ninth aspects of the present invention, a polycrystalline diamond layer having a thickness of 5 μm to 60 μm is coated on at least one entire surface of a metal base material substrate having relatively good thermal conductivity. By doing so, the heat conduction characteristics of the entire heat sink are improved. In addition, the metal substrate base material having a larger coefficient of thermal expansion than the semiconductor element is covered with a polycrystalline diamond layer having a smaller coefficient of thermal expansion. By adjusting the thickness of the semiconductor element, the coefficient of thermal expansion of the semiconductor element, which is an intermediate value between the metal base material substrate and the diamond layer, can be made uniform, and a decrease in the characteristics of the semiconductor element can be suppressed. As a result, it is possible to provide a heat sink that has a constant coefficient of thermal expansion, has heat radiation properties, and can prevent a decrease in the characteristics of the semiconductor element.
【００４８】また、基板母材２の材質は、Ｃｕ−Ｗ（Ｃ
ｕ１０％）焼結体である。また、半導体素子としてＧａ
ＡｓやＩｎＰのＬＤを搭載する場合、その基板母材の厚
みが、具体的には０．５ｍｍであるなら多結晶ダイヤモ
ンド層の厚みが２５μｍ〜５０μｍの範囲のときにダイ
ヤモンド表面の面内方向の熱膨張率が室温〜４００℃の
範囲で３．０〜４．０×１０-6／℃となり、放熱と熱膨
張率の差による半導体素子への応力値が半導体素子とし
ての性能低下を生じさせない組合せとなる。基板母材と
して厚さ０．５ｍｍのＣｕ−Ｗ（Ｃｕ１５％）焼結体を
用いた場合は、多結晶ダイヤモンド層の厚みが２７μｍ
〜５３μｍの範囲でダイヤモンド表面の熱膨張率が室温
〜４００℃の範囲で３．０〜４．０×１０-6／℃とな
り、適した構成となる。さらに、基板母材として厚さ
０．５ｍｍのＣｕ−Ｗ（Ｃｕ２０％）焼結体を用いた場
合は、多結晶ダイヤモンド層の厚みが３０μｍ〜５６μ
ｍの範囲でダイヤモンド表面の熱膨張率が室温〜４００
℃の範囲で３．０〜４．０×１０-6／℃となり、適した
構成となる。The material of the substrate base material 2 is Cu-W (C
u10%) is a sintered body. Ga as a semiconductor element
When mounting an LD of As or InP, if the thickness of the substrate base material is specifically 0.5 mm, the thickness of the polycrystalline diamond layer is in the in-plane direction of the diamond surface when the thickness is in the range of 25 μm to 50 μm. The coefficient of thermal expansion is 3.0 to 4.0 × 10 −6 / ° C. in the range of room temperature to 400 ° C., and the stress value applied to the semiconductor element due to the difference between the heat radiation and the coefficient of thermal expansion does not cause a decrease in the performance of the semiconductor element It becomes a combination. When a Cu—W (Cu 15%) sintered body having a thickness of 0.5 mm is used as the substrate base material, the thickness of the polycrystalline diamond layer is 27 μm.
~53μm next coefficient of thermal expansion of the diamond surface in the range of 3.0~4.0 × 10 -6 / ℃ in the range of room temperature to 400 ° C., a suitable configuration. Furthermore, when a Cu—W (Cu 20%) sintered body having a thickness of 0.5 mm is used as the substrate base material, the thickness of the polycrystalline diamond layer is 30 μm to 56 μm.
m, the coefficient of thermal expansion of the diamond surface is from room temperature to 400.
The range is 3.0 to 4.0 × 10 −6 / ° C. in the range of ° C., which is a suitable configuration.
【図１】本発明の半導体装置に用いる、第１中間接合
層、第２中間接合層を有するヒートシンクの構造を示す
断面図である。FIG. 1 is a cross-sectional view illustrating a structure of a heat sink having a first intermediate bonding layer and a second intermediate bonding layer used in a semiconductor device of the present invention.
【図２】本発明の半導体装置に用いる、第１中間接合
層、第２中間接合層を有しないヒートシンクの構造を示
す断面図である。FIG. 2 is a cross-sectional view showing a structure of a heat sink having no first intermediate bonding layer and no second intermediate bonding layer used in the semiconductor device of the present invention.
【図３】本発明の半導体装置に用いる、第１中間接合
層、第２中間接合層を有し、多結晶ダイヤモンド層が２
層のヒートシンクの構造を示す断面図である。FIG. 3 shows a semiconductor device according to the present invention, having a first intermediate bonding layer and a second intermediate bonding layer, wherein the polycrystalline diamond layer has a thickness of 2 mm;
FIG. 4 is a cross-sectional view showing the structure of a layer heat sink.
【図４】本発明の半導体装置に用いる、第１中間接合
層、第２中間接合層を有せず、多結晶ダイヤモンド層が
２層のヒートシンクの構造を示す断面図である。FIG. 4 is a cross-sectional view showing the structure of a heat sink having no first intermediate bonding layer and no second intermediate bonding layer and having two polycrystalline diamond layers, which is used in the semiconductor device of the present invention.
【図５】本発明の半導体装置に用いる、第１中間接合
層、第２中間接合層を有し、かつ、撓みを有するヒート
シンクの構造を示す断面図である。FIG. 5 is a cross-sectional view showing a structure of a heat sink having a first intermediate bonding layer and a second intermediate bonding layer and having a flexure used in the semiconductor device of the present invention.
【図６】本発明の半導体装置に用いる、第１中間接合
層、第２中間接合層を有せず、撓みを有するヒートシン
クの構造を示す断面図である。FIG. 6 is a cross-sectional view showing a structure of a heat sink having a first intermediate bonding layer and a second intermediate bonding layer and having a flexure, which is used for the semiconductor device of the present invention.
【図７】従来の半導体装置のヒートシンクの構造を示す
断面図である。FIG. 7 is a cross-sectional view illustrating a structure of a heat sink of a conventional semiconductor device.
１ パッケージ ２ 基板母材 ３ 多結晶ダイヤモンド層 ４ 金属接合層 ５ 半導体素子 ６ リードフレーム ７ ボンディングワイヤ ８ａ 第１中間接合層 ８ｂ 第２中間接合層 DESCRIPTION OF SYMBOLS 1 Package 2 Substrate base material 3 Polycrystalline diamond layer 4 Metal bonding layer 5 Semiconductor element 6 Lead frame 7 Bonding wire 8a First intermediate bonding layer 8b Second intermediate bonding layer
Claims (9)
さが２００μｍ〜６００μｍである、金属材料からなる
基板母材と、 前記基板母材の少なくとも前記上下主表面の１方上に形
成された、厚さが５μｍ〜６０μｍである多結晶ダイヤ
モンド層とを備え、 前記多結晶ダイヤモンド層表面上に半導体素子が設けら
れる、ヒートシンク。1. A substrate base made of a metal material having upper and lower main surfaces and having a thickness between the upper and lower main surfaces of 200 μm to 600 μm, and at least one of the upper and lower main surfaces of the substrate base material A polycrystalline diamond layer having a thickness of 5 μm to 60 μm, the semiconductor element being provided on the surface of the polycrystalline diamond layer.
材の前記上下主表面の両方上に備える、請求項１に記載
のヒートシンク。2. The heat sink according to claim 1, wherein the polycrystalline diamond layer is provided on both the upper and lower main surfaces of the substrate base material.
定領域に形成され、Ａｕ，Ａｇ，Ｓｉ，Ｇｅ，Ｓｎ，Ｐ
ｄおよびＩｎの群から選ばれた少なくとも１種類の金属
からなる厚さ２μｍ〜５μｍの金属接合層をさらに備え
る、請求項１または２に記載のヒートシンク。3. An Au, Ag, Si, Ge, Sn, P formed in a predetermined region on the surface of the polycrystalline diamond layer.
The heat sink according to claim 1, further comprising a metal bonding layer having a thickness of 2 μm to 5 μm made of at least one metal selected from the group consisting of d and In.
定領域に形成され、Ｔｉ，Ｚｒ，Ｈｆ，Ｎｂ，Ｔａ，Ｃ
ｒ，Ｍｏ，Ｗ，Ａｕ，ＮｉおよびＶの群から選ばれた少
なくとも１種類の物質の酸化物、炭化物、窒化物および
炭窒化物の群から選ばれた少なくとも１種類の物質から
なる厚さ１μｍ〜４μｍの第１中間接合層と、 前記第１中間接合層上に形成され、Ｍｏ，Ｎｉ，Ｐｄ，
Ｐｔ，Ａｕの群から選ばれた少なくとも１種類からなる
厚さ２μｍ〜５μｍの第２中間接合層と、 前記第２中間接合層の表面上に形成され、その表面上に
半導体素子が取付けられる、Ａｕ，Ａｇ，Ｓｉ，Ｇｅ，
Ｓｎ，ＰｄおよびＩｎの群から選ばれた少なくとも１種
類の金属からなる厚さ２μｍ〜５μｍの金属接合層とを
さらに備える、請求項１または２に記載のヒートシン
ク。4. A method for forming a Ti, Zr, Hf, Nb, Ta, C
1 μm thick made of at least one material selected from the group consisting of oxides, carbides, nitrides and carbonitrides of at least one material selected from the group consisting of r, Mo, W, Au, Ni and V A first intermediate bonding layer having a thickness of ４4 μm, and Mo, Ni, Pd,
A second intermediate bonding layer of at least one selected from the group consisting of Pt and Au and having a thickness of 2 μm to 5 μm, formed on a surface of the second intermediate bonding layer, and a semiconductor element mounted on the surface; Au, Ag, Si, Ge,
The heat sink according to claim 1, further comprising a metal bonding layer having a thickness of 2 μm to 5 μm and made of at least one metal selected from the group consisting of Sn, Pd, and In.
−Ｗ焼結体，Ｃｕ−Ｍｏ焼結体，Ｃｕ−Ｍｏ−Ｗ焼結体
の群から選ばれた少なくとも１種類の金属材料によって
形成されている、請求項１〜４のいずれかに記載のヒー
トシンク。5. The substrate base material is made of Mo, W, Cu, Cu.
The method according to any one of claims 1 to 4, which is formed of at least one metal material selected from the group consisting of a -W sintered body, a Cu-Mo sintered body, and a Cu-Mo-W sintered body. heatsink.
００Ｗ／ｍ・Ｋの範囲内の所定の値である、請求項１〜
５のうちいずれかに記載のヒートシンク。6. The polycrystalline diamond layer has a thermal conductivity in the range of room temperature to 400.degree.
A predetermined value within a range of 00 W / m · K.
5. The heat sink according to any one of 5.
に撓みを有し、任意の部分で曲率半径が２．５ｍ以上で
ある、請求項１〜６のいずれかに記載のヒートシンク。7. The heat sink according to claim 1, wherein the heat sink has a convex bending on the semiconductor element side, and has a radius of curvature of 2.5 m or more at an arbitrary portion.
モンド層および前記基板母材の材質と厚みをそれぞれ所
定の材質と厚みとに設定することにより、多結晶ダイヤ
モンド層の主表面の面内方向の熱膨張率が室温〜４００
℃の範囲で２．３×１０-6〜４．０×１０-6／℃の範囲
内の所定の値に設定されている、請求項１〜７のいずれ
かに記載のヒートシンク。8. The heat sink according to claim 1, wherein the material and thickness of the polycrystalline diamond layer and the base material of the substrate are set to predetermined materials and thicknesses, respectively, so that heat in an in-plane direction of a main surface of the polycrystalline diamond layer is obtained. Expansion coefficient from room temperature to 400
The heat sink according to claim 1, wherein the heat sink is set to a predetermined value within a range of 2.3 × 10 −6 to 4.0 × 10 −6 / ° C. in a range of ° C. 9.
法により形成された多結晶ダイヤモンド層である、請求
項１〜８のいずれかに記載のヒートシンク。9. The heat sink according to claim 1, wherein said polycrystalline diamond layer is a polycrystalline diamond layer formed by a vapor phase synthesis method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10042424A JPH11243167A (en) | 1998-02-24 | 1998-02-24 | Heat sink |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10042424A JPH11243167A (en) | 1998-02-24 | 1998-02-24 | Heat sink |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH11243167A true JPH11243167A (en) | 1999-09-07 |
Family
ID=12635689
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10042424A Withdrawn JPH11243167A (en) | 1998-02-24 | 1998-02-24 | Heat sink |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH11243167A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019036566A (en) * | 2017-08-10 | 2019-03-07 | 富士通株式会社 | Semiconductor device and method of manufacturing the same |
| EP4190554A4 (en) * | 2020-08-25 | 2024-04-10 | Huawei Technologies Co., Ltd. | Electronic device, rotary shaft, layered composite material and preparation method therefor |
-
1998
- 1998-02-24 JP JP10042424A patent/JPH11243167A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2019036566A (en) * | 2017-08-10 | 2019-03-07 | 富士通株式会社 | Semiconductor device and method of manufacturing the same |
| EP4190554A4 (en) * | 2020-08-25 | 2024-04-10 | Huawei Technologies Co., Ltd. | Electronic device, rotary shaft, layered composite material and preparation method therefor |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20050510 |