JPH11112489A - Frame synchronization circuit - Google Patents

Frame synchronization circuit

Info

Publication number
JPH11112489A
JPH11112489A JP9281087A JP28108797A JPH11112489A JP H11112489 A JPH11112489 A JP H11112489A JP 9281087 A JP9281087 A JP 9281087A JP 28108797 A JP28108797 A JP 28108797A JP H11112489 A JPH11112489 A JP H11112489A
Authority
JP
Japan
Prior art keywords
synchronization point
synchronization
range
candidate
true
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9281087A
Other languages
Japanese (ja)
Other versions
JP3318243B2 (en
Inventor
Yasuyoshi Kamata
容好 鎌田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Electric Corp
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Priority to JP28108797A priority Critical patent/JP3318243B2/en
Publication of JPH11112489A publication Critical patent/JPH11112489A/en
Application granted granted Critical
Publication of JP3318243B2 publication Critical patent/JP3318243B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce an erroneous synchronization when a synchronization point is deviated backward from a true synchronization point due to fading in the frame synchronization circuit where the correlation between orthogonal detection data and a unique word UW is taken in each frame and a timing (position) of a maximum value is used as the synchronization point. SOLUTION: A synchronization point range setting device 22 sets a fluctuation allowable range of a synchronization point, uses a position of a maximum correlation value within the range as a 1st synchronization point candidate and uses a position of a maximum correlation value within a frame as a 2nd synchronization point candidate. Equalization processing in a UW period is conducted about the respective candidates and the candidate having a smaller equalization error is discriminated to be a true synchronization point. Furthermore, in the case that the 2nd synchronization point candidate deviated backward from the fluctuation range is discriminated to be the synchronization point, the fluctuation range is change into a range including the position to discriminate about a succeeding frame.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、移動通信システム
の受信機に用いられるフレーム同期回路の改良に関する
ものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a frame synchronization circuit used for a receiver of a mobile communication system.

【0002】[0002]

【従来の技術】移動無線通信の伝搬路においては、遅延
波の影響による周波数選択性フェージングが発生し受信
電力が大きく変動するため、このフェージングによる変
動を補償する技術が必要となってくる。周波数選択性フ
ェージングを補償する手段の一つとして、適応等化器が
用いられている。この適応等化器の性能は、同期点の検
出の正確さによって大きく左右される。
2. Description of the Related Art In a propagation path of mobile radio communication, frequency-selective fading due to the influence of a delayed wave occurs and the received power fluctuates greatly. Therefore, a technique for compensating the fluctuation due to the fading is required. As one of means for compensating for frequency selective fading, an adaptive equalizer is used. The performance of this adaptive equalizer largely depends on the accuracy of the synchronization point detection.

【0003】図面により、従来技術を説明する。図4は
本発明の対象とするフレーム同期回路2を含む受信機の
部分ブロック図である。図において、1は直交検波器で
あり、受信信号を互いに直交するI相データとQ相デー
タとに変換する。2は本発明の対象とするフレーム同期
回路であり、受信信号とユニークワードUWとの相互相
関をとることによりフレームの同期位置を検出する。3
は適応等化器であり、周波数選択性フェージングによる
歪みを補償する。4は復調器であり等化出力の復調を行
う。
The prior art will be described with reference to the drawings. FIG. 4 is a partial block diagram of a receiver including the frame synchronization circuit 2 according to the present invention. In the figure, reference numeral 1 denotes a quadrature detector, which converts a received signal into I-phase data and Q-phase data that are orthogonal to each other. Reference numeral 2 denotes a frame synchronization circuit which is an object of the present invention, and detects a frame synchronization position by cross-correlating a received signal with a unique word UW. 3
Is an adaptive equalizer that compensates for distortion due to frequency selective fading. A demodulator 4 demodulates an equalized output.

【0004】図5は図4に示した従来のフレーム同期回
路2のブロック図である。図において、21はUW相関
器であり、前回までの同期点を基に設定した範囲の受信
データとUWとの相関計算を行う。28は同期点検出器
であり、最大相関値(相関ピーク)の位置を検出し同期
点位置情報を検波出力とともに出力する。
FIG. 5 is a block diagram of the conventional frame synchronization circuit 2 shown in FIG. In the figure, reference numeral 21 denotes a UW correlator, which performs a correlation calculation between received data in a range set based on a synchronization point up to the previous time and UW. Reference numeral 28 denotes a synchronization point detector which detects the position of the maximum correlation value (correlation peak) and outputs synchronization point position information together with a detection output.

【0005】[0005]

【発明が解決しようとする課題】しかし、上記従来のフ
レーム同期回路では、次のような問題が生じる。適応等
化器3は、そのタップ数によって同期点の移動に対する
許容範囲が決まる。例えば、同期点が真の同期点より前
方に移動した場合で、移動幅が等化器に設けられたタッ
プ数より小さいときは、真の同期点の信号は遅延波とし
て取扱われるため、等化性能はほとんど劣化しない。し
かし、真の同期点より後方に移動した場合は、真の同期
点の信号は見失われるため、全く追従できなくなる。こ
のため、従来の回路の場合、予め設定した範囲内で、フ
ェージングによる遅延波の影響を受けて真の同期点より
後方に同期位置(相関ピーク位置)を検出した場合、そ
のフレームは等化不能になってしまうという問題があ
る。
However, the above-mentioned conventional frame synchronization circuit has the following problems. In the adaptive equalizer 3, an allowable range for moving the synchronization point is determined by the number of taps. For example, when the synchronization point moves forward from the true synchronization point, and the movement width is smaller than the number of taps provided in the equalizer, the signal at the true synchronization point is treated as a delayed wave. The performance is hardly degraded. However, when moving behind the true synchronization point, the signal at the true synchronization point is lost and cannot be tracked at all. For this reason, in the case of the conventional circuit, if the synchronization position (correlation peak position) is detected behind the true synchronization point due to the influence of the delay wave due to fading within the preset range, the frame cannot be equalized. There is a problem that it becomes.

【0006】本発明の目的は、上記の同期点が真の同期
点より後方に移動して追従できなくなるという問題点を
解決し、バーストの先頭位置を判定するためのフレーム
同期回路の信頼性向上を図り、適応等化器をより有効に
活用することのできるフレーム同期回路を提供すること
にある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problem that the synchronization point moves behind the true synchronization point and cannot follow the synchronization point, and to improve the reliability of the frame synchronization circuit for determining the start position of the burst. Accordingly, it is an object of the present invention to provide a frame synchronization circuit capable of utilizing an adaptive equalizer more effectively.

【0007】[0007]

【課題を解決するための手段】本発明のフレーム同期回
路は、フェージングによる同期点のゆらぎの範囲を、直
前フレームの同期位置情報により更新設定し、2つの仮
の同期点候補を定め、フレーム同期回路内にUW適応等
化器を設けてそれぞれUWの等化処理を行い、2つの等
化誤差の小さい方を判定基準として同期点の判定と検出
を行うように構成したことを特徴とするものである。
SUMMARY OF THE INVENTION A frame synchronization circuit according to the present invention updates a synchronization point fluctuation range due to fading based on synchronization position information of the immediately preceding frame, determines two temporary synchronization point candidates, and performs frame synchronization. UW adaptive equalizers are provided in a circuit to perform UW equalization processing, and the synchronization point is determined and detected based on the smaller of two equalization errors as a criterion. It is.

【0008】すわなち、受信信号の直交検波データと既
知のUWパターンとの相関値をUW相関器によって求
め、最大相関値の時間的位置を検出してフレームの先頭
位置を示す同期点位置情報を出力するフレーム同期回路
において、前回の同期点情報によって同期点の存在位置
の範囲を推定した同期点範囲を設定し、前記UW相関器
からの相関値とともに出力する同期点範囲設定器と、該
同期点範囲設定器によって設定された同期点範囲におけ
る最大相関値を得るタイミングを第1の同期点候補とし
て出力するとともに、1フレームの中における最大相関
値を得るタイミングを第2の同期点候補として出力する
同期点候補検出器と、前記第1,第2の同期点候補を仮
の同期点としてそれぞれUW区間の適応等化処理を行っ
て等化誤差を出力するUW適応等化器と、前記2つの等
化誤差を比較し、等化誤差の小さい方の同期点候補を真
の同期点と判定する同期点判定器と、前記第1の同期点
候補が真の同期点と判定されたとき該第1の同期点候補
を真の同期点として出力し、前記第2の同期点候補が真
の同期点と判定されかつ前記同期点範囲内にあるとき該
第2の同期点候補を真の同期点として出力し、前記第2
の同期点候補が真の同期点と判定されかつ前記同期点範
囲から外れているとき、同期点範囲が移動したものとみ
なして前記同期点範囲設定器に対して前回の同期点情報
を現在の同期点情報に更新して次フレームの第1の同期
点候補を検出するための同期点範囲を設定する同期点情
報とする同期点移動判定器とを備えたことを特徴とする
ものである。
That is, the correlation value between the orthogonal detection data of the received signal and the known UW pattern is obtained by the UW correlator, the time position of the maximum correlation value is detected, and the synchronization point position information indicating the head position of the frame is obtained. A synchronization point range setting unit that sets a synchronization point range in which a range of the existing position of the synchronization point is estimated based on previous synchronization point information, and outputs the synchronization point range together with a correlation value from the UW correlator. The timing for obtaining the maximum correlation value in the synchronization point range set by the synchronization point range setting device is output as a first synchronization point candidate, and the timing for obtaining the maximum correlation value in one frame is defined as a second synchronization point candidate. A synchronous point candidate detector to be output, and an adaptive equalization process in a UW section are performed by using the first and second synchronous point candidates as tentative synchronous points to output an equalization error. A UW adaptive equalizer, a synchronization point determiner that compares the two equalization errors, and determines a synchronization point candidate with a smaller equalization error as a true synchronization point; When the first synchronization point candidate is determined as a true synchronization point, the first synchronization point candidate is output as a true synchronization point, and when the second synchronization point candidate is determined as a true synchronization point and within the synchronization point range, the second synchronization point candidate is output. The second synchronization point candidate is output as a true synchronization point,
When the synchronization point candidate is determined to be a true synchronization point and deviates from the synchronization point range, the synchronization point range is regarded as having been moved, and the previous synchronization point information is sent to the synchronization point range setting device to the current synchronization point information. A synchronization point movement determiner that updates the synchronization point information and sets the synchronization point range for detecting a first synchronization point candidate of the next frame as synchronization point information.

【0009】[0009]

【発明の実施の形態】図面により、本発明を詳細に説明
する。図1は、本発明の実施例を示すフレーム同期回路
のブロック図である。図において、21はUW相関器で
あり、直交検波器から得られる検波出力(I相データ,
Q相データ)が入力され、フレーム単位に受信データと
UWとの相互相関値を算出する。22は同期点範囲設定
器であり、第一の同期点候補を検出するため、前回まで
の同期点のタイミング位置(位置情報)を、同期点移動
判定器26または同期点平均化器27から受けて、同期
点の存在が予想される位置の範囲を設定する。
BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of a frame synchronization circuit showing an embodiment of the present invention. In the figure, reference numeral 21 denotes a UW correlator, and a detection output (I-phase data,
(Q-phase data), and calculates a cross-correlation value between the received data and the UW for each frame. Reference numeral 22 denotes a synchronization point range setting device, which receives a synchronization point timing position (position information) up to the previous time from the synchronization point movement determination device 26 or the synchronization point averaging device 27 in order to detect a first synchronization point candidate. Then, the range of the position where the existence of the synchronization point is expected is set.

【0010】23は同期点候補検出器であり、同期点範
囲設定器22で設定した範囲内で最大相関値を得るタイ
ミングを検出して第一の同期点候補とし、また、UW相
関器21で検出した1フレーム分の全相互相関値のうち
最大相関値(相関ピーク)を得るタイミングを検出して
第二の同期点候補として出力する。24はUW適応等化
器であり、同期点候補検出器23で検出した2つの同期
点候補を仮の同期点とし、それぞれの同期点位置を先頭
としてUW長分の等化処理を行う。25は同期点判定器
であり、2つの同期点候補をそれぞれ等化処理すること
で得られる2つの等化誤差の大きさを比較し、誤差の小
さい同期点候補を真の同期点と判定した同期点位置情報
を出力する。
Reference numeral 23 denotes a synchronization point candidate detector, which detects a timing at which a maximum correlation value is obtained within the range set by the synchronization point range setting unit 22 and sets it as a first synchronization point candidate. The timing at which the maximum correlation value (correlation peak) is obtained from all the detected cross-correlation values for one frame is detected and output as a second synchronization point candidate. Reference numeral 24 denotes a UW adaptive equalizer, which sets two synchronization point candidates detected by the synchronization point candidate detector 23 as provisional synchronization points, and performs an equalization process for the UW length with each of the synchronization point positions at the top. Reference numeral 25 denotes a synchronization point determiner which compares two equalization errors obtained by performing equalization processing on the two synchronization point candidates, and determines a synchronization point candidate having a small error as a true synchronization point. Outputs synchronization point position information.

【0011】26は同期点移動判定器であり、同期点判
定器25で第一の同期点候補が真の同期点と判定された
とき、及び第二の同期点候補が真の同期点と判定され、
かつ同期点範囲内のときは真の同期点として出力し、第
二の同期点候補が真の同期点と判定され、その同期点が
同期点範囲設定器22で設定した範囲内に存在しない場
合は、同期点範囲が移動したものとして、過去の同期点
情報を全クリアし、現時点での第二の同期点候補を真の
同期点であるとみなし、その同期点位置情報を次回の同
期点位置情報として同期点範囲設定器22に対して出力
する。
Reference numeral 26 denotes a synchronization point movement judging unit. When the synchronization point judgment unit 25 judges that the first synchronization point candidate is a true synchronization point, and when the second synchronization point candidate is a true synchronization point. And
And when it is within the synchronization point range, it is output as a true synchronization point, the second synchronization point candidate is determined as a true synchronization point, and the synchronization point does not exist within the range set by the synchronization point range setting unit 22. Assuming that the synchronization point range has moved, all past synchronization point information is cleared, the second synchronization point candidate at the current time is regarded as a true synchronization point, and the synchronization point position information is used as the next synchronization point The position information is output to the synchronization point range setting unit 22 as position information.

【0012】27は同期点を統計的に推定する場合に用
いられる同期点平均化器であり、本発明の構成,要素と
しなくてもよいが、次回の第一の同期点候補検出範囲を
求めるため、同期点判定器25で検出された現時点の同
期点の時間位置と前回までの同期点の時間位置とを平均
化した同期点位置情報を出力するとともに同期点範囲設
定器22にも与える。
Reference numeral 27 denotes a synchronization point averaging device used for statistically estimating a synchronization point. The synchronization point averaging device may be omitted from the configuration and elements of the present invention. Therefore, the synchronization point position information obtained by averaging the time position of the current synchronization point detected by the synchronization point determination unit 25 and the time position of the synchronization point up to the previous time is output, and is also provided to the synchronization point range setting unit 22.

【0013】図1に示した本発明のフレーム同期回路の
作用を、図2の本発明の同期処理を説明するタイムチャ
ートと、図3の本発明の動作を示すフローチャートによ
り詳細に説明する。
The operation of the frame synchronization circuit of the present invention shown in FIG. 1 will be described in detail with reference to the time chart of FIG. 2 for explaining the synchronization processing of the present invention and the flowchart of FIG. 3 showing the operation of the present invention.

【0014】図2において、A1〜A2は、UWの先頭
位置(同期点)のゆらぎ許容範囲であり、同期点移動な
しのときの同期点存在領域である。Ph(n)は平均化
された同期点位置情報である。Pm1(n)は第一の同
期点候補であり、ゆらぎ許容範囲A1〜A2間での最大
相関値を得るタイミングを示す。Pm2(n)は第二の
同期点候補であり、1フレームの受信データ長A1〜A
3間での最大相関値を得るタイミングを示す。受信デー
タ長は1フレーム長のゆらぎを含めた時間長になってい
る。図2(a)は第二の同期点候補Pm2(n)がゆら
ぎの範囲A1〜A2内にあるときを示し、同図(b)は
それより後方に移動したときの例である。
In FIG. 2, A1 and A2 are allowable fluctuation ranges of the start position (synchronization point) of the UW, and are synchronization point existence areas when the synchronization point is not moved. Ph (n) is averaged synchronization point position information. Pm1 (n) is the first synchronization point candidate, and indicates the timing at which the maximum correlation value between the fluctuation allowable ranges A1 and A2 is obtained. Pm2 (n) is a second synchronization point candidate, and the received data lengths A1 to A of one frame
The timing for obtaining the maximum correlation value among the three is shown. The reception data length is a time length including fluctuation of one frame length. FIG. 2A shows a case where the second synchronization point candidate Pm2 (n) is within the fluctuation range A1 to A2, and FIG. 2B shows an example of a case where the second synchronization point candidate moves backward.

【0015】図3において、31〜42はステップ番号
を示し、〔A1〜A3〕はPm2(n)の検出範囲、
〔A1〜A2〕はPm1(n)の検出範囲、Ph(n)
は現在の同期点情報を示す。ステップ41,42のPh
(n+1)は次回の同期点情報、Pm(n)は現在の真
の同期点、Pm1(n)は同期点情報により設定された
ゆらぎ許容範囲〔A1〜A2〕内の最大相関値を得るタ
イミング、Pm2(n)は受信データ(1フレーム)中
〔A1〜A3〕の最大相関値を得るタイミングである。
ステップ36のER(Pm1(n))はPm1のタイミ
ングから等化処理したときの誤差、ER(Pm2
(n))はPm2のタイミングから等化処理したときの
誤差、ステップ42のλは忘却係数を示す。
In FIG. 3, reference numerals 31 to 42 denote step numbers, [A1 to A3] are detection ranges of Pm2 (n),
[A1 to A2] is the detection range of Pm1 (n), Ph (n)
Indicates the current synchronization point information. Ph of steps 41 and 42
(N + 1) is the next synchronization point information, Pm (n) is the current true synchronization point, and Pm1 (n) is the timing for obtaining the maximum correlation value within the fluctuation tolerance [A1 to A2] set by the synchronization point information. , Pm2 (n) are timings for obtaining the maximum correlation value of [A1 to A3] in the received data (one frame).
ER (Pm1 (n)) in step 36 is an error when the equalization processing is performed from the timing of Pm1, ER (Pm2
(N)) denotes an error when the equalization processing is performed from the timing of Pm2, and λ in step 42 denotes a forgetting coefficient.

【0016】図3のステップ31では、UW相関器21
が今回受信したフレーム(A1〜A3の範囲)の全デー
タについてUWとの相互相関値を求める。ステップ32
では、現在記憶している前回までの同期点情報から同期
点移動が発生していない場合の同期点が存在すると推定
できる範囲(A1〜A2)を限定し、その範囲(A1〜
A2)の中で最大相関値Pm1(n)を得るタイミング
を第一の同期点候補とし、ステップ31で求めた1フレ
ームの範囲(A1〜A3)の中での最大相関値Pm2
(n)の位置を見つけ、これを得るタイミングを第二の
同期点候補とする。
In step 31 of FIG. 3, the UW correlator 21
Calculates the cross-correlation value with the UW for all the data of the frame (the range of A1 to A3) received this time. Step 32
In the present embodiment, the range (A1 to A2) in which it is possible to presume that a synchronization point exists when no synchronization point movement has occurred from the currently stored synchronization point information is limited, and the range (A1 to A2) is limited.
The timing at which the maximum correlation value Pm1 (n) is obtained in A2) is set as the first synchronization point candidate, and the maximum correlation value Pm2 in the range of one frame (A1 to A3) obtained in step 31 is determined.
The position of (n) is found, and the timing of obtaining it is defined as a second synchronization point candidate.

【0017】ステップ33では、検出した最大相関値P
m1(n)とPm2(n)のタイミングが一致するかど
うかを判定する。一致しているときはそのまま真の同期
点となるため、同期点判定処理を必要とせずステップ3
7にジャンプする。一致しないときはステップ34,ス
テップ35に進み、UW適応等化器24で、最大相関値
Pm1(n),Pm2(n)の位置をそれぞれ処理の先
頭位置としてUW長分の受信データを既知のUWパター
ンを参照信号として等化処理を行う。
In step 33, the detected maximum correlation value P
It is determined whether or not the timings of m1 (n) and Pm2 (n) match. If they match, the true synchronization point is used as it is.
Jump to 7. If they do not match, the process proceeds to steps 34 and 35, where the UW adaptive equalizer 24 uses the positions of the maximum correlation values Pm1 (n) and Pm2 (n) as the head positions of the processing, and the received data for the UW length is known. Equalization processing is performed using the UW pattern as a reference signal.

【0018】ステップ36では、UW適応等化器24に
よって、2つの同期点候補のタイミングからそれぞれU
W長分の等化処理をして得られた等化誤差ER(Pm1
(n))とER(Pm2(n))を、同期点判定器25
に入力して比較し、誤差が小さい同期点候補を真の同期
点として検出し、同期点位置情報として出力する。比較
結果、第一の同期点候補Pm1(n)が検出されたとき
は、ステップ37でPm1(n)を真の同期点Pm
(n)とする。また、比較結果、Pm2(n)が検出さ
れたときは、ステップ38でその位置がPm1(n)を
検出する際の検索範囲(図2のA1〜A2)に存在する
かどうかを調査する。調査結果、Pm2(n)が〔A1
〜A2〕の範囲内に存在する(Pm2(n)が図2
(a)のタイミングで検出されたとき)ならば、ステッ
プ39でPm2(n)を真の同期点Pm(n)とする。
In step 36, the UW adaptive equalizer 24 calculates U
Equalization error ER (Pm1
(N)) and ER (Pm2 (n)) are converted to a synchronization point determiner 25.
, And a synchronization point candidate having a small error is detected as a true synchronization point and output as synchronization point position information. As a result of the comparison, when the first synchronization point candidate Pm1 (n) is detected, in step 37, Pm1 (n) is set to the true synchronization point Pm.
(N). If Pm2 (n) is detected as a result of the comparison, it is checked in step 38 whether or not the position exists in a search range (A1 to A2 in FIG. 2) for detecting Pm1 (n). As a result of the investigation, Pm2 (n) was changed to [A1
~ A2] (Pm2 (n) corresponds to that in FIG.
If it is detected at the timing of (a)), Pm2 (n) is set as the true synchronization point Pm (n) in step 39.

【0019】ステップ42は、平均化器27を設けた場
合であり、現在の同期点情報Ph(n)と現在の真の同
期点Pm(n)を重み付けする忘却係数λを用いて平均
化し、次回の同期点情報Ph(n+1)を導く。
Step 42 is a case where the averaging unit 27 is provided. The averaging unit 27 averages the current synchronization point information Ph (n) and the current true synchronization point Pm (n) using the forgetting coefficient λ for weighting. The next synchronization point information Ph (n + 1) is derived.

【0020】ステップ38で、Pm1(n)を検出する
際の検索範囲〔A1〜A2〕外にPm2(n)が存在す
る(Pm2(n)が図2(b)のタイミングで検出され
とき)ならば、ステップ40で真の同期点が移動したも
のとし、現在の同期点情報をクリアする。これより次回
の同期点情報は現在の同期点情報のみとなるため、ステ
ップ41でPm2(n)の位置を次回の同期点位置情報
Pn(n+1)として、同期点移動判定器26から同期
点範囲設定器22に与える。
In step 38, Pm2 (n) exists outside the search range [A1 to A2] for detecting Pm1 (n) (when Pm2 (n) is detected at the timing of FIG. 2B). If so, it is assumed in step 40 that the true synchronization point has moved, and the current synchronization point information is cleared. Since the next synchronization point information is only the current synchronization point information, the position of Pm2 (n) is set as the next synchronization point position information Pn (n + 1) in step 41 and the synchronization point movement determination unit 26 sends the synchronization point range information. This is given to the setting device 22.

【0021】ステップ41に至る場合というのは、今ま
で同期点が存在すると考えていた区間〔A1〜A2〕に
信頼性がなくなったと判断したときである。そのため、
次回からは新たに「Pm2」の同期点を真であると決定
し、同期点が存在するであろう区間を「Pm2」を基に
設定しなおす。今までの「Pm1」を基にした過去の情
報は全クリアし、「Pm2」が次フレームからの新しい
「Pm1」となる。
The case where step 41 is reached is when it is determined that the section [A1 to A2] where it has been considered that a synchronization point exists has lost reliability. for that reason,
From the next time, the synchronization point of “Pm2” is newly determined to be true, and the section where the synchronization point will exist is reset based on “Pm2”. All past information based on “Pm1” up to now is cleared, and “Pm2” becomes new “Pm1” from the next frame.

【0022】このように、上記の処理により、同期のゆ
らぎが大きい環境下で同期位置が安定しないときも、複
数の同期点候補を捉え、過去の同期点位置情報や等化誤
差を監視することで真の同期点位置を捕捉することがで
きるので、誤同期が著しく減少し同期の追従も速くな
る。
As described above, even when the synchronization position is not stable under the environment where the synchronization fluctuation is large, a plurality of synchronization point candidates are captured and the past synchronization point position information and the equalization error are monitored by the above processing. , The true synchronization point position can be captured, so that erroneous synchronization is significantly reduced and the tracking of the synchronization is accelerated.

【0023】[0023]

【発明の効果】以上詳細に説明したように、本発明を実
施することにより、等化器の性能劣化の原因となる後方
への同期点移動のときの誤同期を減少させることがで
き、また、同期点の揺らぎが生じる環境下において同期
の追従が速くなるので、従来の方式に比べ等化器の性能
を著しく向上させることができるため、実用上極めて大
きな効果がある。
As described in detail above, by implementing the present invention, it is possible to reduce false synchronization when the synchronization point is moved backward, which causes deterioration of the equalizer performance. In an environment in which the fluctuation of the synchronization point occurs, the tracking speed of the synchronization becomes faster, so that the performance of the equalizer can be remarkably improved as compared with the conventional system.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施例を示すブロック図である。FIG. 1 is a block diagram showing an embodiment of the present invention.

【図2】本発明の同期処理を説明するタイムチャートで
ある。
FIG. 2 is a time chart illustrating a synchronization process of the present invention.

【図3】本発明の同期処理を示すフローチャートであ
る。
FIG. 3 is a flowchart showing a synchronization process of the present invention.

【図4】受信機の部分ブロック図である。FIG. 4 is a partial block diagram of a receiver.

【図5】従来の同期回路のブロック図である。FIG. 5 is a block diagram of a conventional synchronous circuit.

【符号の説明】[Explanation of symbols]

1 直交検波器 2 同期回路 3 適応等化器 4 復調器 21 UW相関器 22 同期点範囲設定器 23 同期点候補検出器 24 UW適応等化器 25 同期点判定器 26 同期点移動判定器 27 同期点平均化器 28 同期点検出器 31〜42 ステップ番号 DESCRIPTION OF SYMBOLS 1 Quadrature detector 2 Synchronous circuit 3 Adaptive equalizer 4 Demodulator 21 UW correlator 22 Synchronization point range setting device 23 Synchronization point candidate detector 24 UW adaptive equalizer 25 Synchronization point judgment device 26 Synchronization point movement judgment device 27 Synchronization Point averager 28 Synchronization point detector 31-42 Step number

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 受信信号の直交検波データと既知のUW
パターンとの相関値をUW相関器によって求め、最大相
関値の時間的位置を検出してフレームの先頭位置を示す
同期点位置情報を出力するフレーム同期回路において、 前回の同期点情報によって同期点の存在位置の範囲を推
定した同期点範囲を設定し、前記UW相関器からの相関
値とともに出力する同期点範囲設定器と、 該同期点範囲設定器によって設定された同期点範囲にお
ける最大相関値を得るタイミングを第1の同期点候補と
して出力するとともに、1フレームの中における最大相
関値を得るタイミングを第2の同期点候補として出力す
る同期点候補検出器と、 前記第1,第2の同期点候補を仮の同期点としてそれぞ
れUW区間の適応等化処理を行って等化誤差を出力する
UW適応等化器と、 前記2つの等化誤差を比較し、等化誤差の小さい方の同
期点候補を真の同期点と判定する同期点判定器と、 前記第1の同期点候補が真の同期点と判定されたとき該
第1の同期点候補を真の同期点として出力し、前記第2
の同期点候補が真の同期点と判定されかつ前記同期点範
囲内にあるとき該第2の同期点候補を真の同期点として
出力し、前記第2の同期点候補が真の同期点と判定され
かつ前記同期点範囲から外れているとき、同期点範囲が
移動したものとみなして前記同期点範囲設定器に対して
前回の同期点情報を現在の同期点情報に更新して次フレ
ームの第1の同期点候補を検出するための同期点範囲を
設定する同期点情報とする同期点移動判定器とを備えた
ことを特徴とするフレーム同期回路。
An orthogonal detection data of a received signal and a known UW
A UW correlator obtains a correlation value with the pattern, detects a temporal position of the maximum correlation value, and outputs synchronization point position information indicating a head position of the frame. A synchronization point range setting unit that sets a synchronization point range in which the range of the existence position is estimated, and outputs the synchronization point range together with the correlation value from the UW correlator; and a maximum correlation value in the synchronization point range set by the synchronization point range setting unit. A synchronization point candidate detector that outputs a timing at which the maximum correlation value is obtained in one frame as a second synchronization point candidate, and outputs the timing at which the maximum correlation value in one frame is obtained, and the first and second synchronizations A UW adaptive equalizer that performs an adaptive equalization process in a UW section and outputs an equalization error with each of the point candidates as a temporary synchronization point, and compares the two equalization errors with each other. A synchronization point determiner for determining a smaller synchronization point candidate as a true synchronization point; and determining that the first synchronization point candidate is a true synchronization point when the first synchronization point candidate is determined to be a true synchronization point. And outputs the second
Is determined as a true synchronization point and is within the synchronization point range, the second synchronization point candidate is output as a true synchronization point, and the second synchronization point candidate is determined as a true synchronization point. When it is determined and out of the synchronization point range, the synchronization point range is regarded as having moved, and the synchronization point range setting unit updates the previous synchronization point information to the current synchronization point information and updates the next frame. A frame synchronization circuit comprising: a synchronization point movement determiner that sets synchronization point information for setting a synchronization point range for detecting a first synchronization point candidate.
【請求項2】 前記同期点移動判定器から得られる現在
の同期点情報と真の同期点情報を、重み付けのための忘
却係数λを用いて平均化する下記の数1によって求めた
同期点の時間位置Ph(n+1)を次フレームの第1の
同期点候補を検出するための同期点範囲を設定する同期
点情報として前記同期点範囲設定器に与える同期点平均
化器を備えたことを特徴とする請求項1記載のフレーム
同期回路。 【数1】Ph(n)=Ph(n−1)×λ+Pm(n)
×(1−λ) 但し,Ph(n−1):前回の同期点情報 Ph(n):現在の同期点情報 Pm(n):現在の真の同期点
2. The synchronization point information obtained by the following equation 1 in which the current synchronization point information and the true synchronization point information obtained from the synchronization point movement determiner are averaged using a forgetting coefficient λ for weighting. A synchronization point averaging unit for providing a time position Ph (n + 1) to the synchronization point range setting unit as synchronization point information for setting a synchronization point range for detecting a first synchronization point candidate of the next frame. The frame synchronization circuit according to claim 1, wherein ## EQU1 ## Ph (n) = Ph (n-1) .times..lambda. + Pm (n)
× (1-λ) where Ph (n−1): previous synchronization point information Ph (n): current synchronization point information Pm (n): current true synchronization point
JP28108797A 1997-09-30 1997-09-30 Frame synchronization circuit and receiver using the same Expired - Fee Related JP3318243B2 (en)

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Application Number Priority Date Filing Date Title
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