JPH10303066A - Cr element - Google Patents
Cr elementInfo
- Publication number
- JPH10303066A JPH10303066A JP10597797A JP10597797A JPH10303066A JP H10303066 A JPH10303066 A JP H10303066A JP 10597797 A JP10597797 A JP 10597797A JP 10597797 A JP10597797 A JP 10597797A JP H10303066 A JPH10303066 A JP H10303066A
- Authority
- JP
- Japan
- Prior art keywords
- electrode layer
- layer
- multilayer ceramic
- capacitor
- ceramic capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はコンデンサ機能と抵
抗機能とを有するＣＲ素子に係り、特に、小型で、静電
容量の大きいＣＲ素子に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CR device having a capacitor function and a resistance function, and more particularly, to a small CR device having a large capacitance.
【０００２】[0002]
【従来の技術】コンピュータの集積回路とアースとの間
には、信号中のノイズを除去するために、ＣＲ素子が挿
入される。2. Description of the Related Art A CR element is inserted between an integrated circuit of a computer and ground to remove noise in a signal.
【０００３】図２は、従来このような用途に用いられて
いるＣＲ素子の構造を示す断面図であり、基板１１上に
誘電体セラミックスよりなるコンデンサ１２と、抵抗１
３とが並列に設けられ、これらが導電膜１４により直列
に接続されている。１５はガラス保護層、１６は端子電
極である。FIG. 2 is a cross-sectional view showing the structure of a CR device conventionally used for such an application. A capacitor 12 made of dielectric ceramic and a resistor 1 are provided on a substrate 11.
3 are provided in parallel, and these are connected in series by a conductive film 14. Reference numeral 15 denotes a glass protective layer, and reference numeral 16 denotes a terminal electrode.
【０００４】[0004]
【発明が解決しようとする課題】上記従来のＣＲ素子で
は、コンデンサと抵抗とを基板上に並設するため、素子
面積が大きく、従って、大きな実装面積を必要とすると
いう欠点がある。また、コンデンサが単層であるため、
大きな静電容量が得られないという欠点もある。The above-mentioned conventional CR element has a drawback that the capacitor and the resistor are juxtaposed on the substrate, so that the element area is large and therefore a large mounting area is required. Also, since the capacitor is a single layer,
There is also a disadvantage that a large capacitance cannot be obtained.
【０００５】本発明は上記従来の問題点を解決し、小さ
な素子面積で、かつ、大きな静電容量が得られるＣＲ素
子を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned conventional problems and to provide a CR element having a small element area and a large capacitance.
【０００６】[0006]
【課題を解決するための手段】本発明のＣＲ素子は、内
部電極が形成された積層セラミックコンデンサ素体と、
該コンデンサ素体の内部電極が表出する端面に、該内部
電極と導通するように設けられた下地電極層と、該下地
電極層上に設けられた抵抗層と、該抵抗層上に設けら
れ、該下地電極層に対して非接触となっている端子電極
層とを備えてなることを特徴とする。A CR element according to the present invention comprises: a multilayer ceramic capacitor body having internal electrodes formed thereon;
On the end face where the internal electrodes of the capacitor body are exposed, a base electrode layer provided so as to be electrically connected to the internal electrodes, a resistance layer provided on the base electrode layer, and a resistance layer provided on the resistance layer And a terminal electrode layer that is not in contact with the base electrode layer.
【０００７】本発明のＣＲ素子は、積層セラミックコン
デンサの外部電極部分に抵抗体を埋め込んだ構造である
ため、コンデンサほぼ１個分の大きさでＣＲ素子を構成
することができる。The CR element of the present invention has a structure in which a resistor is buried in the external electrode portion of the multilayer ceramic capacitor, so that the CR element can be constituted by almost one capacitor.
【０００８】しかも、コンデンサとして内部電極を有す
る積層セラミックコンデンサを用いるため、大きな静電
容量を実現できる。Further, since a multilayer ceramic capacitor having internal electrodes is used as the capacitor, a large capacitance can be realized.
【０００９】[0009]
【発明の実施の形態】以下に、図面を参照して本発明の
ＣＲ素子を詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a CR device according to the present invention will be described in detail with reference to the drawings.
【００１０】図１は本発明のＣＲ素子の実施の形態を示
す図であって、（ａ）図は断面図，（ｂ）図は側面図
（ただし、端子電極層は図示されていない。），（ｃ）
図は等価回路図を示す。FIG. 1 is a view showing an embodiment of a CR element according to the present invention. FIG. 1 (a) is a sectional view, and FIG. 1 (b) is a side view (however, a terminal electrode layer is not shown). , (C)
The figure shows an equivalent circuit diagram.
【００１１】このＣＲ素子は、図１（ｃ）に示す如く、
コンデンサＣと抵抗Ｒとが直列に接続されたものであ
り、内部電極１が形成された直方体形状の積層セラミッ
クコンデンサ素体２の一端面に、この端面に表出した内
部電極２を覆うように下地電極層３が形成され、更に、
この下地電極層３を覆うように、抵抗層４が形成されて
いる。更に、積層セラミックコンデンサ素体２の端面全
体を覆うようにＮｉ層５ａ及び半田層５ｂとからなる端
子電極層５Ａが形成されている。This CR element is, as shown in FIG.
A capacitor C and a resistor R are connected in series, and one end surface of a rectangular parallelepiped multilayer ceramic capacitor body 2 on which an internal electrode 1 is formed so as to cover the internal electrode 2 exposed on this end surface. A base electrode layer 3 is formed.
The resistance layer 4 is formed so as to cover the base electrode layer 3. Further, a terminal electrode layer 5A including a Ni layer 5a and a solder layer 5b is formed so as to cover the entire end face of the multilayer ceramic capacitor body 2.
【００１２】積層セラミックコンデンサ素体２の他端面
には、外部電極層６が形成され、この外部電極層６上に
Ｎｉ層５ａ及び半田層５ｂとからなる端子電極層５Ｂが
形成されている。An external electrode layer 6 is formed on the other end surface of the multilayer ceramic capacitor body 2, and a terminal electrode layer 5B composed of a Ni layer 5a and a solder layer 5b is formed on the external electrode layer 6.
【００１３】このＣＲ素子１０において、下地電極層３
は、積層セラミックコンデンサ素体２の外部電極として
の機能と、積層セラミックコンデンサ素体２と抵抗層４
とを導通する導線としての機能を担うため、両端の端子
電極層５Ａ，５Ｂを回路に接続することにより、図１
（ｃ）に示すようなＣＲ素子となる。In the CR device 10, the base electrode layer 3
Are the functions of the multilayer ceramic capacitor body 2 as external electrodes, and the multilayer ceramic capacitor body 2 and the resistance layer 4
By connecting the terminal electrode layers 5A and 5B at both ends to a circuit in order to perform a function as a conducting wire that conducts between FIG.
A CR element as shown in FIG.
【００１４】このようなＣＲ素子を製造するには、ま
ず、Ａｇ，Ｐｄ，Ｐｔ，Ａｕ，Ａｇ／Ｐｄ等の貴金属又
はＮｉ，Ｃｕ等の卑金属粉末を含む導電性ペーストを、
積層セラミックコンデンサ素体２の一方の端面に、表出
した内部電極１を覆うように所定の領域に塗布すると共
に、他方の端面に導電性ペーストを塗布した後、６００
〜８５０℃程度で焼き付けて下地電極層３及び外部電極
層６を形成する。その後、Ｎｉ−Ｃｒ，Ｃｒ−Ｓｉ，Ｔ
ａなどの金属や、Ｃｒ−ＳｉＯなどのサーメット、或い
は、Ａｇ−Ｐｄ−ガラス系、ＲｕＯ2 −ガラス系などの
抵抗材料のペーストを下地電極層３を完全に覆いつくす
ように塗布した後６００〜８５０℃で焼き付けて抵抗層
４を形成する。その後、常法に従って、電解メッキ法に
よりＮｉ層５ａ及び半田層５ｂを順次形成して、端子電
極層５Ａ，５Ｂを形成する。In order to manufacture such a CR device, first, a conductive paste containing a noble metal such as Ag, Pd, Pt, Au, and Ag / Pd or a base metal powder such as Ni and Cu is used.
On one end face of the multilayer ceramic capacitor body 2, a predetermined area is applied so as to cover the exposed internal electrode 1, and a conductive paste is applied on the other end face.
By baking at about 850 ° C., the underlying electrode layer 3 and the external electrode layer 6 are formed. Then, Ni-Cr, Cr-Si, T
metals and such a, cermet such as Cr-SiO, or, Ag-Pd-glass system, RuO 2 - after applying the paste resistance materials such as glass system as the underlying electrode layer 3 consuming completely covers 600 The resistive layer 4 is formed by baking at 850 ° C. Thereafter, according to a conventional method, the Ni layer 5a and the solder layer 5b are sequentially formed by the electrolytic plating method, and the terminal electrode layers 5A and 5B are formed.
【００１５】本発明において、抵抗層４を形成する積層
セラミックコンデンサ素体２の端面の下地電極層３の厚
さは２０〜３０μｍ程度とするのが好ましい。また、こ
の下地電極層３を覆う抵抗層４の厚さは、下地電極層３
上の部分で１０〜３０μｍ程度、積層セラミックコンデ
ンサ素体２に接触する部分で３０〜６０μｍ程度である
ことが好ましい。In the present invention, the thickness of the base electrode layer 3 on the end face of the multilayer ceramic capacitor body 2 forming the resistance layer 4 is preferably about 20 to 30 μm. The thickness of the resistance layer 4 covering the base electrode layer 3 is
It is preferable that the upper part has a thickness of about 10 to 30 μm, and the part which contacts the multilayer ceramic capacitor body 2 has a thickness of about 30 to 60 μm.
【００１６】なお、下地電極層３は接着強度の理由から
ガラス成分を含むことが好ましく、従って、下地電極層
３を形成する導電性ペーストは、前記金属粉末とガラス
フリットを含むことが望ましい。導電性ペーストとして
は通常の市販品を使用できる。The base electrode layer 3 preferably contains a glass component for the reason of adhesive strength. Therefore, the conductive paste forming the base electrode layer 3 preferably contains the metal powder and glass frit. As the conductive paste, an ordinary commercial product can be used.
【００１７】外部電極層６も上記導電性ペーストを用い
て形成することができ、外部電極層６の好ましい厚さは
１００〜２００μｍである。The external electrode layer 6 can also be formed using the above-mentioned conductive paste, and the preferable thickness of the external electrode layer 6 is 100 to 200 μm.
【００１８】このような本発明のＣＲ素子は、両端の端
子電極層５Ａ，５Ｂに配線するのみで容易に回路に接続
することができる。このＣＲ素子自体の大きさは、通常
の積層セラミックコンデンサ素体よりも抵抗層の厚さ分
大きい程度であり、従来のＣＲ素子に比べて著しく小さ
い。しかも、コンデンサとして内部電極を有する積層セ
ラミックコンデンサを用いているため、大きな静電容量
を得ることができる。Such a CR element of the present invention can be easily connected to a circuit simply by wiring the terminal electrode layers 5A and 5B at both ends. The size of the CR element itself is about the same as the thickness of the resistive layer than a normal multilayer ceramic capacitor element, and is significantly smaller than that of a conventional CR element. Moreover, since a multilayer ceramic capacitor having internal electrodes is used as the capacitor, a large capacitance can be obtained.
【００１９】[0019]
【実施例】以下に実施例を挙げて本発明をより具体的に
説明する。The present invention will be described more specifically with reference to the following examples.
【００２０】実施例１ 図１に示す本発明のＣＲ素子を製造した。Example 1 A CR device according to the present invention shown in FIG. 1 was manufactured.
【００２１】積層セラミックコンデンサ素体２として、
鉛ペロブスカイト化合物を主成分とするセラミック誘電
体を用いた、層間１０μｍの０．１μＦ品で、寸法：長
さ２．０ｍｍ×幅１．２５ｍｍのものを用い、まず、こ
のチップの両端面に市販の導電性ペーストを塗布し、１
２０℃で１５分乾燥後、８５０℃で５分保持して焼き付
けを行い、厚さ１２０μｍの下地電極層３と厚さ２０μ
ｍの外部電極層６を形成した。As the multilayer ceramic capacitor body 2,
A 0.1 μF product with a 10 μm interlayer and a size of 2.0 mm long × 1.25 mm wide using a ceramic dielectric mainly composed of a lead perovskite compound. Apply the conductive paste of 1
After drying at 20 ° C. for 15 minutes, baking was carried out at 850 ° C. for 5 minutes, and a base electrode layer 3 having a thickness of 120 μm and a thickness of 20 μm were formed.
m of the external electrode layers 6 were formed.
【００２２】次に、抵抗ペーストを、積層セラミックコ
ンデンサ素体２の下地電極層３形成端面に印刷した後、
１５０℃で１５分乾燥後、８５０℃で１０分保持して焼
き付けを行い、厚さ２０μｍの抵抗層４を形成した。Next, after the resistance paste is printed on the end surface of the multilayer ceramic capacitor body 2 where the base electrode layer 3 is formed,
After drying at 150 ° C. for 15 minutes, baking was performed while maintaining the temperature at 850 ° C. for 10 minutes to form a resistance layer 4 having a thickness of 20 μm.
【００２３】その後、積層セラミックコンデンサ素体２
の両端面に電解メッキ法によりＮｉ層５ａ（厚さ１μ
ｍ）及び半田層５ｂ（厚さ３μｍ）を順次形成し、表１
に示す実装面積のＣＲ素子を得た。Thereafter, the multilayer ceramic capacitor element 2
Layers 5a (1 μm thick) on both end surfaces
m) and a solder layer 5b (thickness: 3 μm) are sequentially formed.
A CR element having a mounting area shown in FIG.
【００２４】このＣＲ素子について、下記方法により特
性の評価を行い、結果を表１に示した。The characteristics of this CR device were evaluated by the following methods, and the results are shown in Table 1.
【００２５】評価方法 静電容量はＬＣＲメータを用い１ｋＨｚ，１Ｖｒｍｓで
測定した。抵抗は、インピーダンスアナライザーを用い
１００ＭＨｚで測定した。 Evaluation method The capacitance was measured at 1 kHz and 1 Vrms using an LCR meter. The resistance was measured at 100 MHz using an impedance analyzer.
【００２６】実施例２〜３ 実施例１において、表１に示す条件変更を行ったこと以
外は同様にして表１に示す実装面積のＣＲ素子を製造
し、同様にその評価を行って結果を表１に示した。Examples 2-3 A CR device having a mounting area shown in Table 1 was manufactured in the same manner as in Example 1 except that the conditions shown in Table 1 were changed, and the results were similarly evaluated. The results are shown in Table 1.
【００２７】[0027]
【表１】 [Table 1]
【００２８】表１より本発明によれば良好な特性のＣＲ
素子が提供されることが明らかである。According to Table 1, according to the present invention, CR having good characteristics was obtained.
It is clear that a device is provided.
【００２９】なお、図２に示すような構成の従来のＣＲ
素子は、静電容量は高々１００ｐＦ程度であり、大きい
静電容量を実現することはできない。A conventional CR having a configuration as shown in FIG.
The element has a capacitance of at most about 100 pF, and cannot achieve a large capacitance.
【００３０】[0030]
【発明の効果】以上詳述した通り、本発明のＣＲ素子に
よれば、素子面積が小さく、従って、小さな実装面積で
足り、しかも、静電容量の大きい高特性ＣＲ素子が提供
される。As described in detail above, according to the CR element of the present invention, a high-performance CR element having a small element area, a small mounting area, and a large capacitance is provided.
【図１】本発明のＣＲ素子の実施の形態を示す図であっ
て、（ａ）図は断面図，（ｂ）図は側面図，（ｃ）図は
等価回路図を示す。1A and 1B are diagrams showing an embodiment of a CR element of the present invention, wherein FIG. 1A is a sectional view, FIG. 1B is a side view, and FIG. 1C is an equivalent circuit diagram.
【図２】従来のＣＲ素子を示す断面図である。FIG. 2 is a cross-sectional view showing a conventional CR element.
１ 内部電極 ２ 積層セラミックコンデンサ素体 ３ 下地電極層 ４ 抵抗層 ５ａ Ｎｉ層 ５ｂ 半田層 ５Ａ，５Ｂ 端子電極層 ６ 外部電極層 １０ ＣＲ素子 DESCRIPTION OF SYMBOLS 1 Internal electrode 2 Multilayer ceramic capacitor body 3 Base electrode layer 4 Resistance layer 5a Ni layer 5b Solder layer 5A, 5B Terminal electrode layer 6 External electrode layer 10 CR element
Claims (1)
ンデンサ素体と、 該コンデンサ素体の内部電極が表出する端面に、該内部
電極と導通するように設けられた下地電極層と、 該下地電極層上に設けられた抵抗層と、 該抵抗層上に設けられ、該下地電極層に対して非接触と
なっている端子電極層とを備えてなるＣＲ素子。1. A multilayer ceramic capacitor body having an internal electrode formed thereon, a base electrode layer provided on an end surface of the capacitor body where the internal electrode is exposed so as to be electrically connected to the internal electrode, and A CR element comprising: a resistance layer provided on an electrode layer; and a terminal electrode layer provided on the resistance layer and not in contact with the base electrode layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10597797A JPH10303066A (en) | 1997-04-23 | 1997-04-23 | Cr element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10597797A JPH10303066A (en) | 1997-04-23 | 1997-04-23 | Cr element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10303066A true JPH10303066A (en) | 1998-11-13 |
Family
ID=14421825
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10597797A Pending JPH10303066A (en) | 1997-04-23 | 1997-04-23 | Cr element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10303066A (en) |
Cited By (13)
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|---|---|---|---|---|
| KR100368494B1 (en) * | 2000-05-09 | 2003-01-24 | 주식회사 이노칩테크놀로지 | Complex chip of combining with resistor and capacitor for high frequency and fabricating method therefor |
| JP2006237234A (en) * | 2005-02-24 | 2006-09-07 | Murata Mfg Co Ltd | Laminated compound electronic component |
| JP2006287063A (en) * | 2005-04-01 | 2006-10-19 | Murata Mfg Co Ltd | Electronic part |
| WO2007039983A1 (en) * | 2005-09-30 | 2007-04-12 | Murata Manufacturing Co., Ltd. | Multilayer electronic component |
| JP2008159966A (en) * | 2006-12-26 | 2008-07-10 | Tdk Corp | Electronic component and manufacturing method thereof |
| JP2008282891A (en) * | 2007-05-09 | 2008-11-20 | Murata Mfg Co Ltd | Multilayer electronic component |
| JP2009111422A (en) * | 2009-01-23 | 2009-05-21 | Tdk Corp | Multilayer capacitor and manufacturing method therefor |
| US7646586B2 (en) | 2006-03-01 | 2010-01-12 | Tdk Corporation | Multilayer capacitor and method of manufacturing same |
| JP2012151397A (en) * | 2011-01-21 | 2012-08-09 | Murata Mfg Co Ltd | Laminated ceramic electronic component |
| US20130240366A1 (en) * | 2002-04-15 | 2013-09-19 | Avx Corporation | Plated terminations |
| JP2015122933A (en) * | 2013-12-20 | 2015-07-02 | サムソン エレクトロ−メカニックス カンパニーリミテッド． | Power supply device and composite electronic component, and mounting substrate therefor |
| JP2017168746A (en) * | 2016-03-17 | 2017-09-21 | 株式会社村田製作所 | Electronic component and method of manufacturing electronic component |
| US11183333B2 (en) | 2019-12-31 | 2021-11-23 | Samsung Electro-Mechanics Co., Ltd. | Multilayered electronic component |
-
1997
- 1997-04-23 JP JP10597797A patent/JPH10303066A/en active Pending
Cited By (19)
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|---|---|---|---|---|
| KR100368494B1 (en) * | 2000-05-09 | 2003-01-24 | 주식회사 이노칩테크놀로지 | Complex chip of combining with resistor and capacitor for high frequency and fabricating method therefor |
| US11195659B2 (en) * | 2002-04-15 | 2021-12-07 | Avx Corporation | Plated terminations |
| US10366835B2 (en) | 2002-04-15 | 2019-07-30 | Avx Corporation | Plated terminations |
| US20130240366A1 (en) * | 2002-04-15 | 2013-09-19 | Avx Corporation | Plated terminations |
| JP4600082B2 (en) * | 2005-02-24 | 2010-12-15 | 株式会社村田製作所 | Multilayer composite electronic components |
| JP2006237234A (en) * | 2005-02-24 | 2006-09-07 | Murata Mfg Co Ltd | Laminated compound electronic component |
| JP2006287063A (en) * | 2005-04-01 | 2006-10-19 | Murata Mfg Co Ltd | Electronic part |
| WO2007039983A1 (en) * | 2005-09-30 | 2007-04-12 | Murata Manufacturing Co., Ltd. | Multilayer electronic component |
| US7605683B2 (en) | 2005-09-30 | 2009-10-20 | Murata Manufacturing Co., Ltd. | Monolithic electronic component |
| KR100939987B1 (en) * | 2005-09-30 | 2010-02-03 | 가부시키가이샤 무라타 세이사쿠쇼 | Multilayer electronic component |
| US7646586B2 (en) | 2006-03-01 | 2010-01-12 | Tdk Corporation | Multilayer capacitor and method of manufacturing same |
| JP2008159966A (en) * | 2006-12-26 | 2008-07-10 | Tdk Corp | Electronic component and manufacturing method thereof |
| JP2008282891A (en) * | 2007-05-09 | 2008-11-20 | Murata Mfg Co Ltd | Multilayer electronic component |
| JP2009111422A (en) * | 2009-01-23 | 2009-05-21 | Tdk Corp | Multilayer capacitor and manufacturing method therefor |
| JP2012151397A (en) * | 2011-01-21 | 2012-08-09 | Murata Mfg Co Ltd | Laminated ceramic electronic component |
| US9111682B2 (en) | 2011-01-21 | 2015-08-18 | Murata Manufacturing Co., Ltd. | Multilayer ceramic electronic component |
| JP2015122933A (en) * | 2013-12-20 | 2015-07-02 | サムソン エレクトロ−メカニックス カンパニーリミテッド． | Power supply device and composite electronic component, and mounting substrate therefor |
| JP2017168746A (en) * | 2016-03-17 | 2017-09-21 | 株式会社村田製作所 | Electronic component and method of manufacturing electronic component |
| US11183333B2 (en) | 2019-12-31 | 2021-11-23 | Samsung Electro-Mechanics Co., Ltd. | Multilayered electronic component |
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