JPH10270853A - Manufacture of printed wiring board - Google Patents

Manufacture of printed wiring board

Info

Publication number
JPH10270853A
JPH10270853A JP7248097A JP7248097A JPH10270853A JP H10270853 A JPH10270853 A JP H10270853A JP 7248097 A JP7248097 A JP 7248097A JP 7248097 A JP7248097 A JP 7248097A JP H10270853 A JPH10270853 A JP H10270853A
Authority
JP
Japan
Prior art keywords
plating
metal film
printed wiring
wiring board
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7248097A
Other languages
Japanese (ja)
Inventor
Naohito Fukuya
直仁 福家
Junji Kaneko
醇治 兼子
Kazunobu Morioka
一信 盛岡
Daisuke Kanetani
大介 金谷
Hiroki Tamiya
裕記 田宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP7248097A priority Critical patent/JPH10270853A/en
Publication of JPH10270853A publication Critical patent/JPH10270853A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board manufacturing method by which such a printed wiring board that the joints between conductive layers and a plated metallic film have high heating-time connection reliability and the plated metallic film adheres to an opening in an excellent state. SOLUTION: A first plated metallic film 3 is formed on the exposed surface of a conductor layer 2b exposed on the internal surface of an opening 6. Then plating core bodies 8 are imparted to the internal surface of the opening 6 on which the metallic film 3 is formed and the conductor layer 2b is exposed and the core bodies 8 imparted to the surface of the metallic film 3 are removed by etching the film 3. Thereafter, a second plated metallic film 4 is formed on the internal surface of the opening 6 to which the plating core bodies 8 are imparted.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電気・電子機器等
に使用されるプリント配線板の製造方法に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board used for electric and electronic equipment.

【0002】[0002]

【従来の技術】電子部品や半導体素子等を実装するため
のプリント配線板として、その壁面に形成されたメッキ
金属皮膜により、プリント配線板の表層及び内層に形成
された導体層を電気的に接続する、スルホールや部品収
納部等の、開口部を有するプリント配線板が用いられて
いる。そして、このような開口部を有するプリント配線
板は、例えば以下のような工程で製造されている。
2. Description of the Related Art As a printed wiring board for mounting electronic parts, semiconductor elements, etc., a conductive layer formed on a surface layer and an inner layer of the printed wiring board is electrically connected by a plated metal film formed on a wall surface thereof. Printed wiring boards having openings, such as through holes and component storage sections, are used. And the printed wiring board which has such an opening is manufactured by the following processes, for example.

【0003】図2(a)に示すような、表層に導体層1
1aを有すると共に、内層に導体層11bを有する有機
系の積層板10を用いる。そして、図2(b)に示すよ
うに、積層板10を貫通する開口部15を形成して、表
層に形成された導体層11a及び内層に形成された導体
層11bの端面を開口部15の壁面に露出させると共
に、絶縁部12を開口部15の壁面に露出させる。
[0003] As shown in FIG.
1a and an organic laminate 10 having a conductor layer 11b as an inner layer. Then, as shown in FIG. 2B, an opening 15 penetrating through the laminated plate 10 is formed, and the end faces of the conductor layer 11a formed on the surface layer and the conductor layer 11b formed on the inner layer are formed in the opening 15. The insulating portion 12 is exposed on the wall surface of the opening 15 while being exposed on the wall surface.

【0004】次いで、図2(c)に示すように、開口部
15の壁面及び積層板10の表面等にパラジウム化合物
等のメッキ核体16を付着させた後、そのメッキ核体1
6を核として無電解メッキを行い、図2(d)に示すよ
うに、開口部15の壁面及び積層板10の表面にメッキ
金属皮膜17を形成して、表層に形成された導体層11
a及び内層に形成された導体層11bを電気的に接続す
る。次いで、必要に応じて更にそのメッキ金属皮膜17
の表面に電解メッキを行って、メッキ金属皮膜17の厚
みを厚くする。
Next, as shown in FIG. 2C, a plating nucleus 16 such as a palladium compound is adhered to the wall surface of the opening 15 and the surface of the laminate 10 and the like.
2 is used as a nucleus to perform electroless plating, and as shown in FIG. 2D, a plating metal film 17 is formed on the wall surface of the opening 15 and on the surface of the laminate 10 to form the conductor layer 11 formed on the surface layer.
a and the conductor layer 11b formed in the inner layer is electrically connected. Next, if necessary, the plated metal film 17 is further added.
Is subjected to electrolytic plating to increase the thickness of the plated metal film 17.

【0005】次いで、図2(e)に示すように、開口部
15の端面や、積層板10の表面にシート状のレジスト
皮膜18を形成した後、積層板10のレジスト皮膜18
で覆われていない部分のメッキ金属皮膜17や導体層1
1aをエッチングして除去し、次いでレジスト皮膜18
を除去することにより、図2(f)に示すように、絶縁
部12を積層板10の表面に露出させて外層の導体回路
13を形成し、プリント配線板は製造されている。
[0005] Next, as shown in FIG. 2 (e), after forming a sheet-like resist film 18 on the end face of the opening 15 and the surface of the laminate 10, the resist film 18 of the laminate 10 is formed.
Plating metal film 17 and conductor layer 1 not covered with
1a is removed by etching, and then the resist film 18 is removed.
As shown in FIG. 2 (f), the insulating portion 12 is exposed on the surface of the laminate 10 to form an outer layer conductive circuit 13, thereby manufacturing a printed wiring board.

【0006】しかし、導体層11a,11bとメッキ金
属皮膜17が接続する部分の間に、メッキ核体16を多
量に存在させた状態でメッキ金属皮膜17を形成した場
合、得られたプリント配線板を用いて熱衝撃試験やはん
だ耐熱試験を行うと、導体層11a,11bとメッキ金
属皮膜17の接続部分が剥がれる場合があり、熱時接続
信頼性が低いという問題があった。そのため、図3
(a)に示すように、開口部15の壁面にメッキ核体1
6を付着させた後、図3(b)に示すように、開口部1
5の壁面に露出する導体層11a,11bの、その露出
する部分を多少エッチングして付着したメッキ核体16
を減少させ、次いで、図3(c)に示すように、メッキ
金属皮膜17を形成することが行われている。
However, when the plating metal film 17 is formed between the portions where the conductor layers 11a and 11b and the plating metal film 17 are connected to each other in a state where the plating nucleus 16 is present in a large amount, the resulting printed wiring board is obtained. When a thermal shock test or a solder heat resistance test is performed using the method described above, the connection between the conductor layers 11a and 11b and the plated metal film 17 may be peeled off, and there has been a problem that the connection reliability under heat is low. Therefore, FIG.
As shown in (a), the plating nucleus 1
6 is applied, as shown in FIG.
Of the conductor layers 11a and 11b exposed on the wall of the plating core body 16 which are slightly etched and adhered to the exposed portions.
Then, as shown in FIG. 3C, a plating metal film 17 is formed.

【0007】この方法の場合、導体層11a,11bの
部分はメッキ核体16が無くても無電解メッキによって
メッキ金属皮膜17が形成されるため、開口部15の壁
面に露出する導体層11a,11bの部分にメッキ金属
皮膜17が形成される。また、開口部15の壁面に露出
する絶縁部12の部分に付着したメッキ核体16は上記
エッチングでは除去されないため、そのメッキ核体16
を核として絶縁部12にもメッキ金属皮膜17が形成さ
れる。
In this method, since the plated metal film 17 is formed on the portions of the conductor layers 11a and 11b by electroless plating even without the plating nucleus 16, the conductor layers 11a and 11b exposed on the wall surface of the opening 15 are formed. A plating metal film 17 is formed on the portion 11b. Further, since the plating nucleus 16 attached to the portion of the insulating portion 12 exposed on the wall surface of the opening 15 is not removed by the above-described etching, the plating nucleus 16
As a nucleus, a plated metal film 17 is also formed on the insulating portion 12.

【0008】しかし、開口部15の壁面に露出する導体
層11a,11bのエッチング量が過剰になると、図4
(a)に示すように、メッキ核体16が付着していない
絶縁部12aが、導体層11a,11bとメッキ核体1
6が付着した絶縁部12bの間に形成される。そのた
め、図4(b)に示すように、無電解メッキによってメ
ッキ金属皮膜17を形成しても、上記メッキ核体(1
6)が付着していない絶縁部12aの部分にはメッキ金
属皮膜17が形成されない場合があり、メッキ金属皮膜
17の付きまわり性が低いという問題があった。
However, if the etching amount of the conductor layers 11a and 11b exposed on the wall surface of the opening 15 becomes excessive, FIG.
As shown in (a), the insulating portion 12a to which the plating nucleus 16 is not attached is formed by the conductor layers 11a and 11b and the plating nucleus 1
6 are formed between the insulating portions 12b to which the adhesive 6 is attached. Therefore, as shown in FIG. 4B, even if the plating metal film 17 is formed by electroless plating, the plating nucleus (1) is formed.
In some cases, the plated metal film 17 is not formed on the portion of the insulating portion 12a where 6) is not attached, and there is a problem that the throwing power of the plated metal film 17 is low.

【0009】そのため、熱時接続信頼性及び付きまわり
性が共に優れたプリント配線板を得るために、開口部1
5の壁面に露出する導体層11a,11bのエッチング
量を精密に制御することが検討されているが、管理範囲
が狭いため管理が非常に困難であるという問題があり、
熱時接続信頼性及び付きまわり性が共に優れたプリント
配線板を、広い管理範囲で得ることが可能な、プリント
配線板の製造方法が望まれている。
[0009] Therefore, in order to obtain a printed wiring board having both excellent connection reliability and throwing power during heating, the opening 1 is required.
Although precise control of the etching amount of the conductor layers 11a and 11b exposed on the wall surface of No. 5 has been considered, there is a problem that the management range is very difficult because the management range is narrow.
There is a demand for a method of manufacturing a printed wiring board that can obtain a printed wiring board excellent in both the connection reliability under heat and the throwing power in a wide management range.

【0010】[0010]

【発明が解決しようとする課題】本発明は、上記問題点
を改善するために成されたもので、その目的とするとこ
ろは、導体層とメッキ金属皮膜が接続する部分の熱時接
続信頼性が優れると共に、開口部へのメッキ金属皮膜の
付きまわり性が優れたプリント配線板を、広い管理範囲
で得ることが可能な、プリント配線板の製造方法を提供
することにある。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a hot-connection reliability at a portion where a conductor layer and a plated metal film are connected. It is another object of the present invention to provide a method for manufacturing a printed wiring board, which is capable of obtaining a printed wiring board having excellent spreadability of a plated metal film to an opening in a wide control range.

【0011】[0011]

【課題を解決するための手段】本発明の請求項1に係る
プリント配線板の製造方法は、壁面に導体層が露出する
開口部を有する有機系積層板の、その開口部の壁面にメ
ッキ金属皮膜を形成して製造するプリント配線板の製造
方法であって、下記の[ア]〜[エ]の工程を有するこ
とを特徴とする。 [ア]開口部の壁面に露出する導体層の、その露出する
部分の表面に、第一のメッキ金属皮膜を形成する工程
と、[イ]その第一のメッキ金属皮膜を形成した導体層
が露出する開口部の壁面に、メッキ核体を付与する工程
と、[ウ]第一のメッキ金属皮膜をエッチングして、第
一のメッキ金属皮膜の表面に付与されたメッキ核体を除
去する工程と、[エ]上記メッキ核体を付与した開口部
の壁面に、第二のメッキ金属皮膜を形成する工程。
According to a first aspect of the present invention, there is provided a method for manufacturing a printed wiring board, comprising the steps of: providing an organic laminate having an opening on a wall surface where a conductive layer is exposed; A method for producing a printed wiring board, which is produced by forming a film, comprising the following steps (A) to (D). [A] a step of forming a first plated metal film on the surface of the exposed portion of the conductor layer exposed on the wall surface of the opening, and [A] a conductor layer formed with the first plated metal film. A step of applying a plating nucleus to the exposed wall surface of the opening, and [c] a step of etching the first plating metal film to remove the plating nucleus applied to the surface of the first plating metal film And [d] a step of forming a second plating metal film on the wall surface of the opening provided with the plating core.

【0012】本発明の請求項2に係るプリント配線板の
製造方法は、請求項1記載のプリント配線板の製造方法
において、第一のメッキ金属皮膜をエッチングする方法
が、逆電解によりエッチングする方法であることを特徴
とする。
According to a second aspect of the present invention, in the method of manufacturing a printed wiring board according to the first aspect, the method of etching the first plated metal film is a method of etching by reverse electrolysis. It is characterized by being.

【0013】本発明の請求項3に係るプリント配線板の
製造方法は、請求項1又は請求項2記載のプリント配線
板の製造方法において、第一のメッキ金属皮膜を形成す
る方法が、電解メッキにより形成する方法であることを
特徴とする。
According to a third aspect of the present invention, there is provided a method for manufacturing a printed wiring board according to the first or second aspect, wherein the method for forming the first plated metal film comprises electrolytic plating. The method is characterized by being formed by:

【0014】本発明の請求項4に係るプリント配線板の
製造方法は、請求項1から請求項3のいずれかに記載の
プリント配線板の製造方法において、メッキ核体が、ダ
イレクトプレーティング用のメッキ核体であると共に、
第二のメッキ金属皮膜を形成する方法が、電解メッキに
より形成する方法であることを特徴とする。
According to a fourth aspect of the present invention, there is provided a method of manufacturing a printed wiring board according to any one of the first to third aspects, wherein the plating nucleus is used for direct plating. Along with the plating core,
The method of forming the second plated metal film is a method of forming by electrolytic plating.

【0015】本発明によると、導体層の表面に第一のメ
ッキ金属皮膜が形成されているため、エッチング量がば
らついて多くなっても、開口部に形成された第一のメッ
キ金属皮膜の部分で吸収して、メッキ核体が付着してい
ない絶縁部が、導体層とメッキ核体が付着した絶縁部の
間に形成され難くなり、その後メッキを行って、導体層
の表面に第二のメッキ金属皮膜を形成して得られたプリ
ント配線板は、メッキ金属皮膜の付きまわり性が優れた
プリント配線板となる。そのため、エッチング量のばら
つきに強く、広い管理範囲でメッキ金属皮膜の付きまわ
り性が優れたプリント配線板を得ることが可能となる。
また、第一のメッキ金属皮膜のエッチングによって、第
一のメッキ金属皮膜の表面に付与されたメッキ核体の一
部又は全部が除去されるため、導体層の表面に第二のメ
ッキ金属皮膜を形成して得られたプリント配線板は、熱
時接続信頼性が優れたプリント配線板となる。
According to the present invention, since the first plating metal film is formed on the surface of the conductor layer, even if the etching amount varies and increases, the portion of the first plating metal film formed in the opening is formed. Absorbed in the insulating portion where the plating nucleus does not adhere, it becomes difficult to form between the conductor layer and the insulating portion where the plating nucleus adheres, and thereafter plating is performed, and the second surface is formed on the surface of the conductor layer. A printed wiring board obtained by forming a plated metal film becomes a printed wiring board having excellent throwing power of the plated metal film. For this reason, it is possible to obtain a printed wiring board that is resistant to variations in the etching amount and has excellent throwing power of the plated metal film in a wide management range.
Further, by etching the first plating metal film, a part or all of the plating nucleus provided on the surface of the first plating metal film is removed, so that the second plating metal film is formed on the surface of the conductor layer. The printed wiring board obtained by the formation becomes a printed wiring board having excellent connection reliability under heat.

【0016】[0016]

【発明の実施の形態】本発明に係るプリント配線板の製
造方法を図面に基づいて説明する。図1は本発明のプリ
ント配線板の製造方法に係る一実施の形態を説明する工
程図である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a printed wiring board according to the present invention will be described with reference to the drawings. FIG. 1 is a process diagram illustrating an embodiment of the method for manufacturing a printed wiring board according to the present invention.

【0017】本発明に係るプリント配線板の製造方法
は、その壁面に、導体層が露出する開口部を有する積層
板の、その開口部の壁面にメッキ金属皮膜を形成して製
造するプリント配線板の製造方法である。
A method of manufacturing a printed wiring board according to the present invention is a printed wiring board manufactured by forming a plated metal film on a wall surface of a laminate having an opening on the wall surface where a conductor layer is exposed. It is a manufacturing method of.

【0018】そして、その製造に当たっては、例えば、
図1(a)に示すような、表層に導体層2aを有すると
共に、内層に導体層2bを有する有機系の積層板1を用
いる。なお、この積層板1には、積層板1を貫通する開
口部6を有しており、その開口部6の壁面には、表層に
形成された導体層2a及び内層に形成された導体層2b
の端面が露出していると共に、絶縁部5が露出してい
る。
In the production, for example,
As shown in FIG. 1A, an organic laminate 1 having a conductor layer 2a on the surface and a conductor layer 2b on the inner layer is used. The laminated plate 1 has an opening 6 penetrating the laminated plate 1, and the wall of the opening 6 has a conductor layer 2 a formed on the surface layer and a conductor layer 2 b formed on the inner layer.
Are exposed, and the insulating portion 5 is exposed.

【0019】本発明に用いる積層板1としては、有機系
の板であれば特に限定するものではなく、例えば、エポ
キシ樹脂系、フェノール樹脂系、ポリイミド樹脂系、不
飽和ポリエステル樹脂系、ポリフェニレンエーテル樹脂
系等の熱硬化性樹脂や、これらの熱硬化性樹脂に無機充
填材等を配合したものの板や、ガラス等の無機質繊維や
ポリエステル、ポリアミド、木綿等の有機質繊維のクロ
ス、ペーパー等の基材を、上記熱硬化性樹脂等で接着し
た板等が挙げられる。
The laminate 1 used in the present invention is not particularly limited as long as it is an organic board. For example, epoxy resin, phenol resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin -Based thermosetting resins, boards made of these thermosetting resins mixed with inorganic fillers, and base materials such as cloth of inorganic fibers such as glass, organic fibers such as polyester, polyamide, and cotton, and paper. Are bonded with the above-mentioned thermosetting resin or the like.

【0020】また、導体層2a,2bとしては、銅、ア
ルミニウム、真鍮、ニッケル等の単独、合金等が挙げら
れるが、電気的信頼性より銅や、銅の表面にニッケルメ
ッキ皮膜等を形成したものが好ましい。なお、表層の導
体層2aは、積層板1の表面全体に形成されていてもよ
く、回路形状に形成されていてもよい。なお、積層板1
は、表層及び内層の両方に導体層2a,2bを形成した
積層板1に限定するものではなく、両表層に導体層2a
を有する場合には、内層には無くてもよく、また、内層
に複数の導体層2bを有する場合には、表層には無くて
もよい。
The conductor layers 2a and 2b may be made of copper, aluminum, brass, nickel or the like alone or an alloy. However, copper or a nickel plating film is formed on the surface of copper from the viewpoint of electrical reliability. Are preferred. The surface conductor layer 2a may be formed on the entire surface of the laminate 1 or may be formed in a circuit shape. In addition, the laminated board 1
Is not limited to the laminate 1 in which the conductor layers 2a and 2b are formed on both the surface layer and the inner layer.
In the case where the inner layer has a plurality of conductor layers 2b, it may not be provided in the surface layer.

【0021】また、開口部6は、積層板1を貫通するも
のに限定するものではなく、その壁面に導体層2a,2
bが露出していれば、貫通していなくてもよい。この開
口部6を形成する方法としては、ドリル等で穴をあけた
り、ルーターエンドミル等で削って形成する。なお、予
め開口部6を形成した複数の材料を積層して、開口部6
を有する積層板1を形成したものでもよい。
The opening 6 is not limited to the one penetrating through the laminate 1, but the conductor layers 2a, 2
If b is exposed, it does not have to penetrate. The opening 6 is formed by drilling a hole with a drill or the like, or by shaving with a router end mill or the like. Note that a plurality of materials in which the openings 6 are formed in advance are stacked, and the openings 6 are formed.
May be formed.

【0022】次いで、図1(b)に示すように、開口部
6の壁面に露出する導体層2a,2bの、その露出する
部分の表面に、第一のメッキ金属皮膜3を形成する(工
程[ア])。
Next, as shown in FIG. 1B, a first plated metal film 3 is formed on the exposed surfaces of the conductor layers 2a and 2b exposed on the wall surface of the opening 6 (step). [A]).

【0023】メッキ核体を付与しない状態でメッキを行
うと、絶縁部5には第一のメッキ金属皮膜3は形成され
ずに、導体層2a,2bの部分に選択的に第一のメッキ
金属皮膜3が形成され、第一のメッキ金属皮膜3が開口
部6に突出して形成される。この第一のメッキ金属皮膜
3を形成する方法としては、一般に無電解メッキが行わ
れるが、開口部6の壁面に露出する導体層2a,2bに
電気が供給可能な場合には、電解メッキで形成すること
もできる。なお、電解メッキで形成すると、短時間で所
望の厚みの第一のメッキ金属皮膜3が得られ好ましい。
When plating is performed in a state where the plating nucleus is not applied, the first plating metal film 3 is not formed on the insulating portion 5, and the first plating metal is selectively formed on the conductor layers 2a and 2b. The coating 3 is formed, and the first plated metal coating 3 is formed to protrude from the opening 6. As a method of forming the first plated metal film 3, electroless plating is generally performed. However, when electricity can be supplied to the conductor layers 2 a and 2 b exposed on the wall surface of the opening 6, electrolytic plating is performed. It can also be formed. In addition, when it forms by electroplating, the 1st plating metal film 3 of desired thickness is obtained in a short time, and it is preferable.

【0024】なお、壁面にメッキ金属皮膜の形成を予定
しない、部品収納部等の開口部を積層板1に有している
場合には、その開口部の端面をシート状のレジストで覆
った後、第一のメッキ金属皮膜3を形成する工程以後の
処理を行うと、後工程でその開口部のなかに形成された
メッキ金属皮膜を除去する作業が不要となり好ましい。
In the case where the laminated board 1 has an opening such as a component housing portion where no plating metal film is to be formed on the wall surface, the end surface of the opening is covered with a sheet-like resist. If the treatment after the step of forming the first plated metal film 3 is performed, the work of removing the plated metal film formed in the opening in the subsequent step is unnecessary, which is preferable.

【0025】次いで、図1(c)に示すように、開口部
6の壁面に露出する絶縁部5、第一のメッキ金属皮膜3
の表面及び積層板1の表面等にメッキ核体8を付与する
(工程[イ])。なお、メッキ核体8を付与する方法と
しては、メッキ核体8を含有する液に、積層板1全体を
浸漬して付与する方法が一般的である。
Next, as shown in FIG. 1C, the insulating portion 5 exposed on the wall surface of the opening 6 and the first plated metal film 3
The plating nucleus 8 is applied to the surface of the laminate 1 and the surface of the laminate 1 (step [A]). As a method of applying the plating core 8, a method of applying the plating core 8 by immersing the entire laminate 1 in a liquid containing the plating core 8 is generally used.

【0026】メッキ核体8は、メッキの触媒として働
き、そのメッキ核体8の周囲に金属を析出することによ
りメッキ核体8間を接続して絶縁部に金属皮膜を形成す
るものや、絶縁部に沈着することにより絶縁部に導電性
を与え、その導電性を用いて絶縁部に金属皮膜を形成す
る、一般にダイレクトプレーティング(直接メッキ)と
呼ばれる方法に用いられる導電性を有するものであり、
例えばパラジウムを含有するものや、パラジウム及びス
ズを含有するものや、カーボン、グラファイト等の炭素
を含有するものや、銅の錯体を含有するものや、導電性
ポリマーを含有するもの等が挙げられる。なお、一般に
ダイレクトプレーティングと呼ばれる方法に用いられる
メッキ核体8を用いると、メッキの回数を減らすことが
でき、生産性が優れ好ましい。
The plating nucleus 8 functions as a plating catalyst and deposits metal around the plating nucleus 8 to connect the plating nuclei 8 to each other to form a metal film on an insulating portion. It gives conductivity to the insulating part by depositing on the part, and forms a metal film on the insulating part using the conductivity, and has conductivity used in a method generally called direct plating (direct plating). ,
For example, those containing palladium, those containing palladium and tin, those containing carbon such as carbon and graphite, those containing a copper complex, those containing a conductive polymer, and the like can be given. The use of the plating nucleus 8, which is generally used in a method called direct plating, can reduce the number of times of plating, and is preferable because of excellent productivity.

【0027】次いで、図1(d)に示すように、第一の
メッキ金属皮膜3をエッチングして、第一のメッキ金属
皮膜3の表面に付与されたメッキ核体8を除去する(工
程[ウ])。
Next, as shown in FIG. 1D, the first plating metal film 3 is etched to remove the plating nucleus 8 applied to the surface of the first plating metal film 3 (Step [ C)).

【0028】第一のメッキ金属皮膜3をエッチングする
方法は、第一のメッキ金属皮膜3を溶解可能であり、か
つ、メッキ核体8を溶解しない液でエッチングして除去
する方法や、逆電解で除去する方法が挙げられる。逆電
解で除去する方法の場合、電流値と時間を設定すること
によりエッチング量を制御できるため、エッチング量を
制御しやすく好ましい。なお、液に浸漬してエッチング
する方法に用いる液としては、硫酸−過酸化水素系や過
硫酸塩系の液が挙げられる。
The first plating metal film 3 can be etched by a method in which the first plating metal film 3 can be dissolved and the plating nucleus 8 is removed by etching with a solution which does not dissolve the reverse plating. And a method of removing it. In the case of the method of removing by reverse electrolysis, the amount of etching can be controlled by setting the current value and time, so that the amount of etching is easily controlled, which is preferable. In addition, as a liquid used for the method of immersing in a liquid and performing etching, a sulfuric acid-hydrogen peroxide-based liquid or a persulfate-based liquid can be used.

【0029】このエッチングによって、第一のメッキ金
属皮膜3の表面に付与されたメッキ核体8の一部又は全
部が除去されるため、その後メッキを行って、導体層2
a,2bの表面に第二のメッキ金属皮膜(4)を形成し
て得られたプリント配線板は、熱衝撃試験やはんだ耐熱
試験を行っても、導体層2a,2bと第二のメッキ金属
皮膜の接続部分が剥がれ難くなり、熱時接続信頼性が優
れたプリント配線板となる。なおエッチングする量は、
第一のメッキ金属皮膜3が多少残るようにエッチングし
てもよく、第一のメッキ金属皮膜3全体をエッチングし
てもよく、更に導体層2a,2bを多少エッチングする
程度までエッチングしてもよい。
Since part or all of the plating nucleus 8 applied to the surface of the first plating metal film 3 is removed by this etching, plating is performed thereafter to form the conductor layer 2.
The printed wiring board obtained by forming the second plating metal film (4) on the surfaces of the conductor layers 2a, 2b and the second plating metal, even after performing a thermal shock test or a soldering heat test. The connection part of the film is hardly peeled off, and a printed wiring board having excellent connection reliability under heat is obtained. The amount to be etched is
The first plated metal film 3 may be etched so as to remain to some extent, the first plated metal film 3 may be entirely etched, and the conductor layers 2a and 2b may be etched to a degree that is slightly etched. .

【0030】更に、導体層2a,2bの表面に第一のメ
ッキ金属皮膜3が形成されているため、エッチング量が
ばらついて多くなっても、開口部6に突出する第一のメ
ッキ金属皮膜3の部分で吸収して、メッキ核体8が付着
していない絶縁部5が、導体層2a,2bとメッキ核体
8が付着した絶縁部5の間に形成され難くなり、その後
メッキを行って、導体層2a,2bの表面に第二のメッ
キ金属皮膜(4)を形成して得られたプリント配線板
は、メッキ金属皮膜(第二のメッキ金属皮膜)の付きま
わり性が優れたプリント配線板となる。そのため、エッ
チング量のばらつきに強く、広い管理範囲で付きまわり
性が優れたプリント配線板を得ることが可能となる。
Further, since the first plating metal film 3 is formed on the surfaces of the conductor layers 2a and 2b, even if the etching amount varies and increases, the first plating metal film 3 projecting into the opening 6 is formed. And the insulating portion 5 to which the plating nucleus 8 does not adhere becomes difficult to be formed between the conductor layers 2a and 2b and the insulating portion 5 to which the plating nucleus 8 adheres. The printed wiring board obtained by forming the second plating metal film (4) on the surfaces of the conductor layers 2a and 2b is a printed wiring having excellent coverage with the plating metal film (second plating metal film). It becomes a board. Therefore, it is possible to obtain a printed wiring board that is resistant to variations in the etching amount and has excellent throwing power over a wide management range.

【0031】なお、第一のメッキ金属皮膜3をエッチン
グした後、スプレー水洗、スプレー酸洗又は超音波水洗
等を行うと、第一のメッキ金属皮膜3の表面に付与され
たメッキ核体8の除去がより確実に行え、特に熱時接続
信頼性が優れたプリント配線板が得られ好ましい。
After the first plating metal film 3 is etched, spray water washing, spray pickling, ultrasonic water washing, or the like is performed to remove the plating nucleus 8 provided on the surface of the first plating metal film 3. The removal is more reliable, and a printed wiring board having particularly excellent connection reliability under heat is obtained, which is preferable.

【0032】次いで、図1(e)に示すように、無電解
メッキ及び電解メッキを行って、開口部6の壁面及び積
層板1の表面に第二のメッキ金属皮膜4を形成して、表
層に形成された導体層2a及び内層に形成された導体層
2bを電気的に接続する。
Next, as shown in FIG. 1E, electroless plating and electrolytic plating are performed to form a second plated metal film 4 on the wall surface of the opening 6 and on the surface of the laminate 1 to form a surface layer. Is electrically connected to the conductor layer 2a formed on the inner layer and the conductor layer 2b formed on the inner layer.

【0033】なお、導体層2a,2bの部分はメッキ核
体(8)が無くても無電解メッキによってメッキ金属皮
膜4が形成されるため、開口部6の壁面に露出する導体
層2a,2bの部分にメッキ金属皮膜4が形成される。
また、開口部6の壁面に露出する絶縁部5の部分に付着
したメッキ核体は上記エッチングでは除去されないた
め、そのメッキ核体を核として絶縁部5にもメッキ金属
皮膜4が形成される。更に、メッキ核体が付着していな
い絶縁部5が、導体層2a,2bとメッキ核体が付着し
た絶縁部5の間に形成され難くなっているため、導体層
2a,2bと絶縁部5の間にメッキ金属皮膜4が形成さ
れない部分が生じ難くなっており、付きまわり性が優れ
たメッキ金属皮膜4が形成される。更に、第一のメッキ
金属皮膜3の表面に付与されたメッキ核体の一部又は全
部が除去されているため、熱時接続信頼性が優れたプリ
ント配線板となる。
The portions of the conductor layers 2a and 2b are formed by the electroless plating without the plating nucleus (8), so that the conductor layers 2a and 2b exposed on the wall surface of the opening 6 are formed. The plated metal film 4 is formed in the portion.
Further, since the plating nucleus adhered to the portion of the insulating portion 5 exposed on the wall surface of the opening 6 is not removed by the etching, the plating metal film 4 is formed also on the insulating portion 5 using the plating nucleus as a nucleus. Further, since it is difficult for the insulating portion 5 to which the plating nucleus does not adhere to be formed between the conductor layers 2a and 2b and the insulating portion 5 to which the plating nucleus has adhered, the conductor layers 2a and 2b and the insulating portion The portion where the plated metal film 4 is not formed is less likely to be formed between them, and the plated metal film 4 having excellent throwing power is formed. Furthermore, since a part or all of the plating nucleus applied to the surface of the first plating metal film 3 is removed, a printed wiring board having excellent connection reliability under heat is obtained.

【0034】なお、メッキ核体としてダイレクトプレー
ティング用のメッキ核体を用いた場合には、無電解メッ
キを行わずに、直接電解メッキを行ってもよい。なお、
無電解メッキや電解メッキとしては、一般に銅のメッキ
が行われるが、金属メッキであれば特に限定するもので
はない。
When a plating nucleus for direct plating is used as the plating nucleus, electrolytic plating may be performed directly without performing electroless plating. In addition,
As electroless plating or electrolytic plating, copper plating is generally performed, but there is no particular limitation as long as it is metal plating.

【0035】次いで、特に限定するものではないが(以
下図示せず)、開口部6の端面や、積層板1の表面にシ
ート状のレジスト皮膜を形成した後、積層板1のレジス
ト皮膜で覆われていない部分のメッキ金属皮膜4や導体
層2aをエッチングして除去し、次いでレジスト皮膜を
除去することにより、絶縁部5を積層板1の表面に露出
させて外層の導体回路を形成したり、必要に応じて、電
子部品と接続を予定する部分以外の積層板1表面に、ハ
ンダが付着しないようにソルダーレジスト皮膜を形成す
る等の後加工を行い、プリント配線板は製造される。
Next, although not particularly limited (not shown), a sheet-like resist film is formed on the end face of the opening 6 or on the surface of the laminate 1, and then covered with the resist film of the laminate 1. By removing the unplated portions of the plated metal film 4 and the conductor layer 2a by etching and then removing the resist film, the insulating portion 5 is exposed on the surface of the laminate 1 to form an outer conductor circuit. If necessary, the printed wiring board is manufactured by performing post-processing such as forming a solder resist film on the surface of the laminated board 1 other than the portion to be connected to the electronic component so that solder does not adhere.

【0036】[0036]

【実施例】【Example】

(実施例1)厚み0.035mmの銅の層を内層に有す
ると共に、両表層に厚み0.018mmの銅の層を有す
る、大きさ25×25cm、厚み1.2mmのガラス基
材ポリイミド樹脂多層積層板を、5枚用いた。なお、こ
の積層板には、電子部品収納用の凹部を有しており、こ
の凹部の底面に上記内層の銅の層が露出するように形成
されている。
(Example 1) A glass substrate polyimide resin multilayer having a size of 25 × 25 cm and a thickness of 1.2 mm, having a copper layer of a thickness of 0.035 mm as an inner layer and a copper layer of a thickness of 0.018 mm on both surface layers. Five laminated plates were used. The laminate has a recess for accommodating an electronic component, and is formed such that the inner copper layer is exposed on the bottom surface of the recess.

【0037】そして、この積層板の両表層及び内層共に
銅の層を有する位置に、貫通するφ0.9mmの穴をあ
けて、その穴の壁面に表層及び内層の銅の層を露出させ
た。次いでこの積層板の両表面に、アルカリ現像型のシ
ート状のレジスト[日本合成化学工業社製、品番411
Y−50]を圧着して、積層板表面にレジスト皮膜を形
成した。次いで、上記凹部の部分にUV光を照射して露
光し、次いで炭酸ナトリウム水溶液で現像して、上記凹
部の部分を硬化したレジスト皮膜で覆うと共に、上記穴
の部分が露出した積層板を得た。
A hole having a diameter of 0.9 mm was formed at a position where both the surface layer and the inner layer of the laminate had a copper layer, and the surface layer and the inner copper layer were exposed on the wall surface of the hole. Next, an alkali developing type sheet-like resist [manufactured by Nippon Synthetic Chemical Industry Co., Ltd., product no.
Y-50] was pressure-bonded to form a resist film on the surface of the laminate. Next, the concave portion was exposed to UV light and exposed, and then developed with an aqueous solution of sodium carbonate, and the concave portion was covered with a cured resist film, and a laminate having the hole exposed was obtained. .

【0038】次いで、その積層板を硫酸銅メッキ液に浸
漬した後、穴の壁面に露出する両表層及び内層の銅の層
に電流を流して電解メッキを行い、穴の壁面に露出する
導体層の、その露出する部分の表面に、厚み2μmの銅
メッキ皮膜(第一のメッキ金属皮膜)を形成した。
Next, after immersing the laminate in a copper sulfate plating solution, a current is applied to both the surface layer and the inner copper layer exposed on the wall surface of the hole to perform electrolytic plating, and the conductor layer exposed on the wall surface of the hole is exposed. A copper plating film (first plating metal film) having a thickness of 2 μm was formed on the surface of the exposed portion.

【0039】次いで、その穴の壁面や、積層板の表面
に、コロイドパラジウム系のメッキ核体[アトテックジ
ャパン社製、商品名ネオパクトシステム]を付与した
後、パラジウムを被覆しているポリマーを除去してパラ
ジウムを活性化した。
Next, a colloidal palladium-based plating nucleus [manufactured by Atotech Japan Co., Ltd., Neopact System] is applied to the wall surface of the hole or the surface of the laminate, and the polymer covering the palladium is removed. To activate the palladium.

【0040】次いで、積層板のうち4枚は、硫酸−過酸
化水素系エッチング液に浸漬して、第一のメッキ金属皮
膜とそれにつながる表層及び内層の銅の層を、第一のメ
ッキ金属皮膜側から、各積層板毎に1,2,4,6μm
合計エッチングし、第一のメッキ金属皮膜の表面に付与
されたメッキ核体を除去した。また、積層板のうち1枚
は、エッチングせずに用いた。
Next, four of the laminates were immersed in a sulfuric acid-hydrogen peroxide-based etchant to convert the first plated metal film and the surface and inner copper layers connected thereto to the first plated metal film. From the side, 1, 2, 4, 6 μm for each laminate
The total etching was performed to remove plating nuclei applied to the surface of the first plating metal film. One of the laminates was used without etching.

【0041】次いで、各積層板を希硫酸で洗浄した後、
液温80℃、pH1の硫酸銅メッキ液に浸漬し、上記メ
ッキ核体を付与した穴の壁面等に、厚み20μmの銅メ
ッキ皮膜(第二のメッキ金属皮膜)を形成した。
Next, after washing each laminate with dilute sulfuric acid,
It was immersed in a copper sulfate plating solution having a liquid temperature of 80 ° C. and a pH of 1 to form a 20 μm-thick copper plating film (second plating metal film) on the wall surfaces of the holes provided with the plating nuclei.

【0042】次いで、上記凹部の部分を覆ったレジスト
を剥離した後、再度上記と同様にシート状のレジスト皮
膜を各積層板の両表層に形成し、次いで導体回路を形成
しようとする部分及び上記凹部の部分にUV光を照射し
て露光した後、現像、エッチング、剥離して、表層に導
体回路を形成してプリント配線板を5枚得た。
Next, after removing the resist covering the concave portion, a sheet-like resist film is formed again on both surface layers of each laminate in the same manner as described above, and then a portion where a conductor circuit is to be formed and The concave portion was exposed to UV light and exposed, and then developed, etched, and peeled to form a conductive circuit on the surface layer, thereby obtaining five printed wiring boards.

【0043】(実施例2)第一のメッキ金属皮膜を逆電
解法によりエッチングしたこと以外は実施例1と同様に
して、プリント配線板を得た。
(Example 2) A printed wiring board was obtained in the same manner as in Example 1 except that the first plated metal film was etched by a reverse electrolytic method.

【0044】(実施例3)電解メッキの条件を変更し
て、厚み5μmの第一のメッキ金属皮膜を形成したこと
以外は実施例1と同様にして、プリント配線板を得た。
Example 3 A printed wiring board was obtained in the same manner as in Example 1 except that the conditions of electrolytic plating were changed to form a first plated metal film having a thickness of 5 μm.

【0045】(実施例4)電解メッキの条件を変更し
て、厚み5μmの第一のメッキ金属皮膜を形成したこ
と、及び、第一のメッキ金属皮膜を逆電解法によりエッ
チングしたこと以外は実施例1と同様にして、プリント
配線板を得た。
Example 4 The procedure was carried out except that the conditions of electrolytic plating were changed to form a first plated metal film having a thickness of 5 μm and that the first plated metal film was etched by a reverse electrolytic method. A printed wiring board was obtained in the same manner as in Example 1.

【0046】(比較例1)第一のメッキ金属皮膜を形成
しないこと、及び、第一のメッキ金属皮膜とそれにつな
がる表層及び内層の銅の層に代えて、表層及び内層の銅
の層のみをエッチングしたこと以外は実施例1と同様に
して、プリント配線板を得た。
(Comparative Example 1) The first plated metal film was not formed, and only the surface layer and the inner copper layer were replaced with the first plated metal film and the surface copper layer and the inner copper layer connected thereto. A printed wiring board was obtained in the same manner as in Example 1 except that etching was performed.

【0047】(比較例2)第一のメッキ金属皮膜を形成
しないこと、及び、第一のメッキ金属皮膜とそれにつな
がる表層及び内層の銅の層に代えて、表層及び内層の銅
の層のみを逆電解法によりエッチングしたこと以外は実
施例1と同様にして、プリント配線板を得た。
(Comparative Example 2) The first plated metal film was not formed, and only the surface layer and the inner copper layer were replaced with the first plated metal film and the surface and inner copper layers connected to the first plated metal film. A printed wiring board was obtained in the same manner as in Example 1 except that etching was performed by the reverse electrolytic method.

【0048】(評価、結果)各実施例及び各比較例で得
られた各5枚のプリント配線板について、熱時接続信頼
性とメッキ金属皮膜の付きまわり性を評価し、熱時接続
信頼性及び付きまわり性が共に良好な範囲を求めた。
(Evaluation and Results) For each of the five printed wiring boards obtained in each of the examples and comparative examples, the connection reliability under heat and the throwing power of the plated metal film were evaluated. A good range was found for both the throwing power and the throwing power.

【0049】熱時接続信頼性の評価方法は、得られたプ
リント配線板を温度サイクル試験機で、(−65℃15
分及び室温5分及び150℃15分及び室温5分)の処
理を1サイクルとして、1000サイクル処理した後、
内層の銅の層と第二のメッキ金属皮膜の間の断線の有無
を評価し、断線していない場合は合格(○)とし、断線
している場合は不合格(×)とした。
The method for evaluating the reliability of connection under heat is as follows. The obtained printed wiring board is tested at (−65 ° C. 15
Min and room temperature 5 minutes, and 150 ° C. 15 minutes and room temperature 5 minutes) as one cycle, and after 1000 cycles of processing,
The presence / absence of disconnection between the inner copper layer and the second plated metal film was evaluated. If there was no disconnection, it was judged as pass ((), and if there was disconnection, it was judged as failed (×).

【0050】付きまわり性の評価方法は、積層板の両表
層及び内層共に銅の層を有する位置にあけた穴の断面を
研磨して露出させ、10倍の拡大鏡を用いて観察し、穴
の壁面全体にメッキ金属皮膜が形成されている場合は合
格(○)とし、形成されていない部分がある場合は不合
格(×)とした。
The evaluation method of the throwing power is performed by polishing and exposing the cross section of the hole formed at the position where both the surface layer and the inner layer of the laminate have the copper layer, observing the hole with a magnifying glass 10 times, and observing the hole. When the plated metal film was formed on the entire wall surface, the test was evaluated as pass (○), and when there was no formed metal film, the test was rejected (x).

【0051】結果は、表1に示すように、各実施例で得
られたプリント配線板は、各比較例で得られたプリント
配線板と比較して、熱時接続信頼性及びメッキ金属皮膜
の付きまわり性が共に良好な範囲が広く、熱時接続信頼
性が優れると共に、メッキ金属皮膜の付きまわり性が優
れたプリント配線板を、広い管理範囲で得ることが可能
であることが確認された。
The results show that, as shown in Table 1, the printed wiring boards obtained in the respective examples were compared with the printed wiring boards obtained in the respective comparative examples in terms of the connection reliability under heat and the plating metal film. It has been confirmed that it is possible to obtain a printed wiring board with excellent throwing power of a plated metal film in a wide range of control, as well as a wide range of good throwing power and excellent hot connection reliability. .

【0052】[0052]

【表1】 [Table 1]

【0053】[0053]

【発明の効果】本発明に係るプリント配線板の製造方法
によると、導体層とメッキ金属皮膜が接続する部分の熱
時接続信頼性が優れると共に、開口部へのメッキ金属皮
膜の付きまわり性が優れたプリント配線板を、広い管理
範囲で得ることが可能となる。
According to the method of manufacturing a printed wiring board according to the present invention, the reliability of the connection between the conductor layer and the plated metal film at the time of heating is excellent and the throwing power of the plated metal film to the opening is improved. An excellent printed wiring board can be obtained in a wide management range.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のプリント配線板の製造方法に係る一実
施の形態を説明する工程図である。
FIG. 1 is a process diagram illustrating one embodiment of a method for manufacturing a printed wiring board of the present invention.

【図2】従来のプリント配線板の製造方法を説明する工
程図である。
FIG. 2 is a process diagram illustrating a conventional method for manufacturing a printed wiring board.

【図3】従来の他のプリント配線板の製造方法を説明す
る工程図である。
FIG. 3 is a process diagram illustrating another conventional method for manufacturing a printed wiring board.

【図4】従来の更に他のプリント配線板の製造方法を説
明する工程図である。
FIG. 4 is a process chart for explaining still another conventional method for manufacturing a printed wiring board.

【符号の説明】[Explanation of symbols]

1,10 積層板 2a,2b,11a,11b 導体層 3 第一のメッキ金属皮膜 4 第二のメッキ金属皮膜 5,12 絶縁部 6,15 開口部 8,16 メッキ核体 13 導体回路 17 メッキ金属皮膜 18 レジスト皮膜 DESCRIPTION OF SYMBOLS 1,10 Laminated board 2a, 2b, 11a, 11b Conductive layer 3 First plating metal film 4 Second plating metal film 5,12 Insulating part 6,15 Opening 8,16 Plating core 13 Conductor circuit 17 Plating metal Coating 18 Resist coating

───────────────────────────────────────────────────── フロントページの続き (72)発明者 金谷 大介 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 田宮 裕記 大阪府門真市大字門真1048番地松下電工株 式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Daisuke Kanaya 1048 Kazumasa Kadoma, Osaka Prefecture Matsushita Electric Works, Ltd.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 壁面に導体層が露出する開口部を有する
有機系積層板の、その開口部の壁面にメッキ金属皮膜を
形成して製造するプリント配線板の製造方法であって、
下記の[ア]〜[エ]の工程を有することを特徴とする
プリント配線板の製造方法。 [ア]開口部の壁面に露出する導体層の、その露出する
部分の表面に、第一のメッキ金属皮膜を形成する工程
と、[イ]その第一のメッキ金属皮膜を形成した導体層
が露出する開口部の壁面に、メッキ核体を付与する工程
と、[ウ]第一のメッキ金属皮膜をエッチングして、第
一のメッキ金属皮膜の表面に付与されたメッキ核体を除
去する工程と、[エ]上記メッキ核体を付与した開口部
の壁面に、第二のメッキ金属皮膜を形成する工程。
1. A method of manufacturing a printed wiring board, comprising: forming an organic laminate having an opening on a wall surface where a conductor layer is exposed, by forming a plated metal film on the wall surface of the opening.
A method for manufacturing a printed wiring board, comprising the following steps [A] to [D]. [A] a step of forming a first plated metal film on the surface of the exposed portion of the conductor layer exposed on the wall surface of the opening, and [A] a conductor layer formed with the first plated metal film. A step of applying a plating nucleus to the exposed wall surface of the opening, and [c] a step of etching the first plating metal film to remove the plating nucleus applied to the surface of the first plating metal film And [d] a step of forming a second plating metal film on the wall surface of the opening provided with the plating core.
【請求項2】 第一のメッキ金属皮膜をエッチングする
方法が、逆電解によりエッチングする方法であることを
特徴とする請求項1記載のプリント配線板の製造方法。
2. The method for manufacturing a printed wiring board according to claim 1, wherein the method of etching the first plated metal film is a method of etching by reverse electrolysis.
【請求項3】 第一のメッキ金属皮膜を形成する方法
が、電解メッキにより形成する方法であることを特徴と
する請求項1又は請求項2記載のプリント配線板の製造
方法。
3. The method for manufacturing a printed wiring board according to claim 1, wherein the method for forming the first plated metal film is a method for forming the first plated metal film by electrolytic plating.
【請求項4】 メッキ核体が、ダイレクトプレーティン
グ用のメッキ核体であると共に、第二のメッキ金属皮膜
を形成する方法が、電解メッキにより形成する方法であ
ることを特徴とする請求項1から請求項3のいずれかに
記載のプリント配線板の製造方法。
4. The method according to claim 1, wherein the plating nucleus is a plating nucleus for direct plating, and the method of forming the second plating metal film is a method of forming by electroplating. A method for manufacturing a printed wiring board according to any one of claims 1 to 3.
JP7248097A 1997-03-25 1997-03-25 Manufacture of printed wiring board Pending JPH10270853A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7248097A JPH10270853A (en) 1997-03-25 1997-03-25 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7248097A JPH10270853A (en) 1997-03-25 1997-03-25 Manufacture of printed wiring board

Publications (1)

Publication Number Publication Date
JPH10270853A true JPH10270853A (en) 1998-10-09

Family

ID=13490536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7248097A Pending JPH10270853A (en) 1997-03-25 1997-03-25 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPH10270853A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010016334A (en) * 2008-07-02 2010-01-21 Samsung Electro-Mechanics Co Ltd Printed circuit board and method of manufacturing the same
WO2012029865A1 (en) * 2010-08-31 2012-03-08 富士フイルム株式会社 Method for manufacturing multilayer wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010016334A (en) * 2008-07-02 2010-01-21 Samsung Electro-Mechanics Co Ltd Printed circuit board and method of manufacturing the same
WO2012029865A1 (en) * 2010-08-31 2012-03-08 富士フイルム株式会社 Method for manufacturing multilayer wiring board

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