JPH10154783A - Resin sealed semiconductor device - Google Patents
Resin sealed semiconductor deviceInfo
- Publication number
- JPH10154783A JPH10154783A JP31440496A JP31440496A JPH10154783A JP H10154783 A JPH10154783 A JP H10154783A JP 31440496 A JP31440496 A JP 31440496A JP 31440496 A JP31440496 A JP 31440496A JP H10154783 A JPH10154783 A JP H10154783A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- lead frame
- semiconductor chip
- semiconductor device
- void
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、トランスファー
モールド成形した絶縁型の樹脂封止型半導体装置に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating resin-sealed semiconductor device formed by transfer molding.
【0002】[0002]
【従来の技術】リードフレームに半導体チップをはんだ
接合し、半導体チップのボンディングパッドと外部導出
端子(アウターリード)とをボンディングワイヤで接続
し、外部導出端子以外の部分を樹脂封止する樹脂封止型
半導体装置では、近年、半導体チップ搭載面とその裏面
および側面も樹脂で被覆した絶縁型の樹脂封止型半導体
装置が主流となって来ている。2. Description of the Related Art A semiconductor chip is soldered to a lead frame, a bonding pad of the semiconductor chip is connected to an external lead terminal (outer lead) by a bonding wire, and a portion other than the external lead terminal is resin-sealed. In recent years, an insulated resin-encapsulated semiconductor device in which a semiconductor chip mounting surface and its back surface and side surfaces are also covered with a resin has become mainstream.
【0003】図5は従来の絶縁型の樹脂封止型半導体装
置の要部構成図で、同図(a)および同図(b)は半導
体チップ搭載のリードフレームの平面図および側面図、
同図(c)は半導体チップを搭載したリードフレームを
樹脂成形金型に取り付けた状態の要部断面図である。図
5において、リードフレーム1の半導体チップ搭載面4
側の面は平坦であり、半導体チップ搭載面4はV溝6で
囲まれている(図5(a))。このリードフレーム1の
外部導出端子7を除く部分をトランスファーモールド
で、リードフレーム1の裏面5も含め樹脂封止する。こ
の場合、リードフレーム1の裏面5側の樹脂の厚みは熱
放散を良好に保つために薄くする必要がある。図5
(c)に樹脂成形金型21を示したが、樹脂注入口22
から樹脂が注入され、樹脂成形金型21と半導体チップ
3を搭載したリードフレーム1との隙間24を樹脂が矢
印Aおよび矢印Bのように流れ、隙間24を埋めて行
く。この隙間24が樹脂で充填された後で、樹脂成形金
型21を外す。この樹脂成形金型21とリードフレーム
1の裏面5との隙間24はこの部分の樹脂の厚みを薄く
する必要から極めて狭くなっている。FIGS. 5A and 5B are main part configuration diagrams of a conventional insulating resin-sealed semiconductor device. FIGS. 5A and 5B are a plan view and a side view of a lead frame on which a semiconductor chip is mounted.
FIG. 1C is a cross-sectional view of a main part in a state where a lead frame on which a semiconductor chip is mounted is attached to a resin molding die. In FIG. 5, the semiconductor chip mounting surface 4 of the lead frame 1 is shown.
The surface on the side is flat, and the semiconductor chip mounting surface 4 is surrounded by a V groove 6 (FIG. 5A). The portion of the lead frame 1 excluding the external lead-out terminals 7 is resin-sealed including the back surface 5 of the lead frame 1 by transfer molding. In this case, the thickness of the resin on the back surface 5 side of the lead frame 1 needs to be reduced in order to maintain good heat dissipation. FIG.
(C) shows the resin molding die 21,
The resin flows from the resin molding die 21 to the lead frame 1 on which the semiconductor chip 3 is mounted, as indicated by arrows A and B, and fills the gap 24. After the gap 24 is filled with the resin, the resin molding die 21 is removed. The gap 24 between the resin molding die 21 and the back surface 5 of the lead frame 1 is extremely narrow because the thickness of the resin in this portion needs to be reduced.
【0004】[0004]
【発明が解決しようとする課題】前記のように、樹脂成
形において、樹脂成形金型21とリードフレーム1の隙
間24が極めて狭いリードフレーム1の裏面5側では、
樹脂の流動性が悪く充填され難い。逆に半導体チップ搭
載面4側は樹脂成形金型21とリードフレーム1との隙
間は広く充填され易い。そのため、半導体チップ搭載面
4側の隙間を流れる樹脂(矢印A)がその反対のリード
フレーム1の裏面5側に流れ込み、このとき、樹脂に気
泡が混入し、樹脂の充填不良が発生する。この充填不良
箇所は、成形された半導体装置の樹脂の厚みが薄い部分
(半導体チップ搭載面4と反対の面)に発生するため、
電気的に絶縁不良を引き起こし、半導体装置の絶縁耐圧
が低下するという課題が生ずる。また、これを防ぐため
に、リードフレーム1の裏面4側の隙間を大きくする
と、この部分の樹脂の厚みが厚くなり、熱抵抗が大きく
なり、熱放散が悪くなるという課題が生ずる。As described above, in the resin molding, on the back surface 5 side of the lead frame 1 where the gap 24 between the resin molding die 21 and the lead frame 1 is extremely narrow,
The resin has poor fluidity and is difficult to fill. Conversely, the gap between the resin molding die 21 and the lead frame 1 is easily filled widely on the semiconductor chip mounting surface 4 side. Therefore, the resin (arrow A) flowing through the gap on the semiconductor chip mounting surface 4 side flows into the opposite back surface 5 side of the lead frame 1, and at this time, bubbles are mixed into the resin, and resin filling failure occurs. This defective filling portion occurs in a thin portion of the resin of the molded semiconductor device (the surface opposite to the semiconductor chip mounting surface 4),
There is a problem that an electrical insulation failure is caused and the dielectric strength of the semiconductor device is reduced. In order to prevent this, if the gap on the back surface 4 side of the lead frame 1 is increased, the thickness of the resin in this portion is increased, the thermal resistance is increased, and the heat dissipation is deteriorated.
【0005】この発明の目的は、前記の課題を解決し
て、絶縁耐圧を向上させた絶縁型の樹脂封止型半導体装
置を提供することにある。An object of the present invention is to solve the above-mentioned problems and to provide an insulating resin-sealed semiconductor device having an improved withstand voltage.
【0006】[0006]
【課題を解決するための手段】前記の目的を達成するた
めに、半導体チップを搭載したリードフレームを樹脂封
止した絶縁型の樹脂封止型半導体装置において、半導体
チップを搭載するリードフレームの表面で、且つ、半導
体チップを搭載する領域以外の表面に選択的に突起を設
ける構成とする。In order to achieve the above object, in an insulating resin-sealed semiconductor device in which a lead frame on which a semiconductor chip is mounted is resin-sealed, a surface of the lead frame on which the semiconductor chip is mounted is provided. In addition, the projections are selectively provided on the surface other than the region where the semiconductor chip is mounted.
【0007】前記の突起の形状が円形もしくは多角形と
すると効果的である。また、この突起の形状が編み目状
としてもとよい。。リードフレームの半導体チップ搭載
面のエリヤ外に突起を設けることで、この面側の樹脂流
動抵抗が大きくなる。そのため、半導体チップ搭載面側
の樹脂の流れ込みが遅くなり、リードフレームの裏面側
の樹脂の流れと同じになる。そのため、半導体チップ搭
載面側を流れる樹脂はリードフレームの裏面側に回り込
むことなしに、リードフレームの裏面側を流れる樹脂
と、樹脂成形金型の気泡抜き孔で合流する。これによ
り、樹脂成形金型とリードフレームの隙間にあった気泡
は、気泡抜き孔よりスムーズに排出され、リードフレー
ムの裏面側の極めて狭い隙間に気泡が巻き込まれること
がないようにできる。It is effective if the shape of the projection is circular or polygonal. Further, the shape of the projection may be stitched. . By providing the protrusion outside the area of the semiconductor chip mounting surface of the lead frame, the resin flow resistance on this surface side increases. Therefore, the flow of the resin on the semiconductor chip mounting surface side is delayed, and the flow of the resin on the back surface side of the lead frame becomes the same. Therefore, the resin flowing on the semiconductor chip mounting surface side joins with the resin flowing on the back surface side of the lead frame at the bubble vent hole of the resin molding die without going around the back surface side of the lead frame. As a result, air bubbles in the gap between the resin molding die and the lead frame are smoothly discharged from the air bubble removing hole, and the air bubbles can be prevented from being caught in the extremely narrow gap on the back surface side of the lead frame.
【0008】[0008]
【発明の実施の形態】図1はこの発明の第1実施例で、
同図(a)および同図(b)は半導体チップを搭載した
リードフレームの平面図および側面図、同図(c)は半
導体チップを搭載したリードフレームを樹脂成形金型に
取り付けた状態の要部断面図である。図1において、半
導体チップ3を搭載したリードフレーム1の半導体チッ
プ搭載面4側の半導体チップ搭載面4以外の部分に円形
と多角形(ここでは六角形を示す)をした突起2を複数
個設ける。この突起2を設けたリードフレーム1を同図
(c)のように樹脂成形金型21に取り付け樹脂注入口
22から樹脂を注入し、隙間24に樹脂を充填する。半
導体チップ搭載面4側を流れる樹脂(矢印A)とリード
フレームの裏面5側を流れる樹脂(矢印B)とが同じよ
うに外部導出端子7側に向かって流れ、隙間24にある
気泡を気泡抜き孔から外部に掃きだす。このとき、矢印
Aと矢印Bの樹脂の流れが同じになるように、突起2を
設けているため、隙間24に存在する気泡はリードフレ
ーム1の裏面5側の隙間24に残留することなく、気泡
抜き孔23から排出され、充填された樹脂内に気泡が混
入することはない。尚、突起2の数や大きさは矢印Aと
矢印Bの樹脂の流れが同じになり、矢印Aと矢印Bの樹
脂が気泡抜き孔に同時に達するように設けることがポイ
ントである。FIG. 1 shows a first embodiment of the present invention.
FIGS. 1A and 1B are a plan view and a side view of a lead frame on which a semiconductor chip is mounted, and FIG. 1C is a view showing a state where the lead frame on which the semiconductor chip is mounted is attached to a resin molding die. It is a fragmentary sectional view. In FIG. 1, a plurality of circular and polygonal (here, hexagonal) projections 2 are provided on a portion other than the semiconductor chip mounting surface 4 on the semiconductor chip mounting surface 4 side of the lead frame 1 on which the semiconductor chip 3 is mounted. . The lead frame 1 provided with the projections 2 is attached to a resin molding die 21 as shown in FIG. 1C, resin is injected from a resin injection port 22, and the gap 24 is filled with the resin. The resin (arrow A) flowing on the semiconductor chip mounting surface 4 side and the resin (arrow B) flowing on the back surface 5 side of the lead frame similarly flow toward the external lead-out terminal 7 to remove bubbles in the gaps 24. Sweep out of the hole. At this time, since the protrusions 2 are provided so that the flow of the resin indicated by the arrow A and the flow of the resin indicated by the arrow B are the same, air bubbles existing in the gap 24 do not remain in the gap 24 on the back surface 5 side of the lead frame 1. Air bubbles are not mixed into the resin that is discharged from the air hole 23 and filled. It should be noted that the number and size of the projections 2 are such that the flow of the resin indicated by the arrow A and the arrow B becomes the same, and the resin indicated by the arrow A and the arrow B are provided at the same time to reach the bubble vent hole.
【0009】図2はこの発明の第2実施例で、同図
(a)および同図(b)は半導体チップを搭載したリー
ドフレームの平面図および側面図である。図2におい
て、突起2をリードフレーム1の横方向(外部導出端子
7の方向に対して直角の方向)に設けて樹脂の流動抵抗
を大きくすることで、図1(c)に示す矢印Aと矢印B
の樹脂の流れを同じにし、気泡抜き孔23に同時に達す
るようにできる。FIG. 2 shows a second embodiment of the present invention. FIGS. 2A and 2B are a plan view and a side view of a lead frame on which a semiconductor chip is mounted. In FIG. 2, the protrusions 2 are provided in the lateral direction of the lead frame 1 (in the direction perpendicular to the direction of the external lead-out terminals 7) to increase the flow resistance of the resin. Arrow B
And the resin flows at the same time so as to reach the bubble release holes 23 at the same time.
【0010】図3はこの発明の第3実施例で、同図
(a)および同図(b)は半導体チップを搭載したリー
ドフレームの平面図および側面図である。図3におい
て、突起2の形状が長方形をしており、突起2の長手方
向を外部導出端子7の方向に対して直角に形成する。こ
うすることで、突起2の面積を小さくしても樹脂の流動
抵抗を大きくできる。こうすることで図1(c)の矢印
Aと矢印Bの樹脂の流れを同じにでき、矢印Aと矢印B
の樹脂が気泡抜き孔23に同時に達するようにできる。FIG. 3 shows a third embodiment of the present invention. FIGS. 3A and 3B are a plan view and a side view of a lead frame on which a semiconductor chip is mounted. In FIG. 3, the shape of the projection 2 is rectangular, and the longitudinal direction of the projection 2 is formed at right angles to the direction of the external lead-out terminal 7. By doing so, the flow resistance of the resin can be increased even if the area of the protrusion 2 is reduced. By doing so, the flow of the resin indicated by arrows A and B in FIG.
Can reach the bubble vent hole 23 at the same time.
【0011】図4はこの発明の第4実施例で、同図
(a)および同図(b)は半導体チップを搭載したリー
ドフレームの平面図および側面図である。図4におい
て、突起2を編み目状に形成して矢印Aの樹脂の流動抵
抗を大きくすることで、図1(c)に示す矢印Aと矢印
Bの樹脂の流れを同じにでき、矢印Aと矢印Bの樹脂が
気泡抜き孔23に同時に達するようにできる。FIG. 4 shows a fourth embodiment of the present invention. FIGS. 4A and 4B are a plan view and a side view of a lead frame on which a semiconductor chip is mounted. In FIG. 4, by forming the protrusions 2 in a stitch shape to increase the flow resistance of the resin indicated by the arrow A, the flow of the resin indicated by the arrow A and the arrow B illustrated in FIG. The resin indicated by the arrow B can reach the air vent hole 23 at the same time.
【0012】[0012]
【発明の効果】この発明によれば、半導体チップ搭載面
側のリードフレームの表面に突起を設けることで、樹脂
成形金型とリードフレームの隙間に充填する樹脂の半導
体チップ搭載面側の樹脂の流動抵抗を大きくして、半導
体チップ搭載面側とリードフレーム裏面側との樹脂の流
れを同じにし、それぞれの樹脂が気泡抜き孔に同時に到
達できるようにする。こうすることで、リードフレーム
の裏面側の狭い隙間に気泡が混入されることを防止す
る。そのことによって、樹脂封止が気泡を含まずに行う
ことができて、電気的絶縁耐圧を向上させることができ
る。According to the present invention, by providing a projection on the surface of the lead frame on the semiconductor chip mounting surface side, the resin filling the gap between the resin molding die and the lead frame can be reduced. The flow resistance is increased so that the flow of the resin on the semiconductor chip mounting surface side and the flow of the resin on the lead frame rear surface side are the same, so that each resin can reach the bubble vent hole simultaneously. This prevents air bubbles from being mixed into the narrow gap on the back surface side of the lead frame. As a result, resin sealing can be performed without including air bubbles, and the electrical withstand voltage can be improved.
【図1】この発明の第1実施例で、(a)は半導体チッ
プを搭載したリードフレームの平面図、(b)はその側
面図、(c)は半導体チップを搭載したリードフレーム
を樹脂成形金型に取り付けた状態の要部断面図1A is a plan view of a lead frame on which a semiconductor chip is mounted, FIG. 1B is a side view of the lead frame, and FIG. 1C is a resin molding of the lead frame on which the semiconductor chip is mounted. Cross-sectional view of main parts attached to mold
【図2】この発明の第2実施例で、(a)は半導体チッ
プを搭載したリードフレームの平面図、(b)はその側
面図2A is a plan view of a lead frame on which a semiconductor chip is mounted, and FIG. 2B is a side view thereof.
【図3】この発明の第2実施例で、(a)は半導体チッ
プを搭載したリードフレームの平面図、(b)はその側
面図FIG. 3A is a plan view of a lead frame on which a semiconductor chip is mounted, and FIG.
【図4】この発明の第2実施例で、(a)は半導体チッ
プを搭載したリードフレームの平面図、(b)はその側
面図4A is a plan view of a lead frame on which a semiconductor chip is mounted, and FIG. 4B is a side view thereof.
【図5】従来の絶縁型の樹脂封止型半導体装置の要部構
成図で、(a)は半導体チップ搭載のリードフレームの
平面図、(b)はその側面図、(c)は半導体チップを
搭載したリードフレームを樹脂成形金型に取り付けた状
態の要部断面図FIGS. 5A and 5B are main part configuration diagrams of a conventional insulating resin-sealed semiconductor device, wherein FIG. 5A is a plan view of a lead frame on which a semiconductor chip is mounted, FIG. 5B is a side view thereof, and FIG. Sectional view of main part with lead frame mounted with resin mounted on resin mold
1 リードフレーム 2 突起 3 半導体チップ 4 半導体チップ搭載面 5 裏面 6 V溝 7 外部導出端子 8 取り付け孔 21 樹脂成形金型 22 樹脂注入口 23 気泡抜き孔 24 隙間 DESCRIPTION OF SYMBOLS 1 Lead frame 2 Projection 3 Semiconductor chip 4 Semiconductor chip mounting surface 5 Back surface 6 V groove 7 External lead-out terminal 8 Mounting hole 21 Resin molding die 22 Resin injection port 23 Bubble vent hole 24 Gap
Claims (3)
樹脂封止した絶縁型の樹脂封止型半導体装置において、
半導体チップを搭載するリードフレームの表面で、且
つ、半導体チップを搭載する領域以外の表面に選択的に
突起を設けることを特徴とする樹脂封止型半導体装置。1. An insulated resin-sealed semiconductor device in which a lead frame on which a semiconductor chip is mounted is resin-sealed.
A resin-encapsulated semiconductor device, wherein protrusions are selectively provided on a surface of a lead frame on which a semiconductor chip is mounted and on a surface other than a region where the semiconductor chip is mounted.
とを特徴とする請求項1記載の樹脂封止型半導体装置。2. The resin-sealed semiconductor device according to claim 1, wherein the shape of the projection is circular or polygonal.
特徴とする請求項1記載の樹脂封止型半導体装置。3. The resin-encapsulated semiconductor device according to claim 1, wherein said projections are formed in a stitch shape.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31440496A JP3519223B2 (en) | 1996-11-26 | 1996-11-26 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31440496A JP3519223B2 (en) | 1996-11-26 | 1996-11-26 | Resin-sealed semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH10154783A true JPH10154783A (en) | 1998-06-09 |
JP3519223B2 JP3519223B2 (en) | 2004-04-12 |
Family
ID=18052949
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31440496A Expired - Lifetime JP3519223B2 (en) | 1996-11-26 | 1996-11-26 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3519223B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003094221A1 (en) * | 2002-04-04 | 2003-11-13 | Infineon Technologies Ag | Encapsulation of an integrated circuit |
JP2021088091A (en) * | 2019-12-03 | 2021-06-10 | いすゞ自動車株式会社 | Metal member for bonding to resin composition, method for producing metal-resin bonded body, and metal-resin bonded body |
-
1996
- 1996-11-26 JP JP31440496A patent/JP3519223B2/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003094221A1 (en) * | 2002-04-04 | 2003-11-13 | Infineon Technologies Ag | Encapsulation of an integrated circuit |
JP2021088091A (en) * | 2019-12-03 | 2021-06-10 | いすゞ自動車株式会社 | Metal member for bonding to resin composition, method for producing metal-resin bonded body, and metal-resin bonded body |
Also Published As
Publication number | Publication date |
---|---|
JP3519223B2 (en) | 2004-04-12 |
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