JPH10125553A - Manufacture of intergranular insulation-type semiconductor porcelain capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To uniformly control the diffusion amount of magnetic insulating agent and to reduce the variance of product performance by arranging semiconductor porcelain substrates in a plurality of grooves provided on the installation face of the semiconductor porcelain based of a setter in erected states and thermally treating them. SOLUTION: Six columns where the six grooves 21 are respectively arranged in series are provided on the plate surface of the setter 20 in parallel. The semiconductor porcelain bases 3 to which intergranular insulating agent is applied are respectively arranged in the grooves 21. The semiconductor porcelain bases 3 are arranged so that the plate surface becomes the longitudinal direction of the grooves 21 in the erected state in the grooves 21. The setter 20 where the semiconductor porcelain bases 3 are arranged is put in a semi-airtight container made of reflector and they are thermally treated. The two semiconductor porcelain faces 3 to which the intergranular insulation-type semiconductor porcelain capacitor is applied area made into a pair by overlapping the plane baces and respective pairs are arranged in the respective grooves in the erected states.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【発明の属する技術分野】本発明は粒界絶縁型半導体磁
器コンデンサの製造方法に係り、特に、半導体磁器素地
に粒界絶縁化剤を熱拡散させて粒界絶縁型半導体磁器コ
ンデンサを製造するに当り、半導体磁器素地の結晶粒界
部分への粒界絶縁化剤の拡散量を均一に制御して、製品
性能のバラツキのない粒界絶縁型半導体磁器コンデンサ
を効率的に製造する方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a grain boundary insulated semiconductor ceramic capacitor, and more particularly to a method of manufacturing a grain boundary insulated semiconductor ceramic capacitor by thermally diffusing a grain boundary insulating agent into a semiconductor ceramic body. The present invention relates to a method for efficiently manufacturing a grain boundary insulated semiconductor ceramic capacitor having no variation in product performance by uniformly controlling a diffusion amount of a grain boundary insulating agent to a crystal grain boundary portion of a semiconductor ceramic body. is there.

【０００２】[0002]

【従来の技術】粒界絶縁型半導体磁器コンデンサ、例え
ば、チタン酸ストロンチウム（ＳｒＴｉＯ₃ ）又はチタ
ン酸バリウム（ＢａＴｉＯ₃ ）系半導体磁器組成物を用
いた粒界絶縁型半導体磁器コンデンサは、一般に、次の
ようにして製造される。2. Description of the Related Art Grain boundary insulating semiconductor ceramic capacitors, for example, using a strontium titanate (SrTiO ₃ ) or barium titanate (BaTiO ₃ ) based ceramic ceramic composition, are generally known as follows. It is manufactured as follows.

【０００３】即ち、まず、主成分のＳｒＴｉＯ₃ 又はＢ
ａＴｉＯ₃ に、半導体化剤としてのＤｙ，Ｂｉ，Ｎｄ，
Ｌａ，Ｎｂ，Ｔａ，Ｗなどの酸化物、炭酸塩、しゅう酸
塩等と、特性改善剤としてのＣｕ，Ｍｎ，Ｆｅ，Ｃｏ，
Ｎｉ，Ｚｎ，Ｇｅなどの酸化物、炭酸塩、しゅう酸塩
と、焼結性改善剤としてのシリカ（ＳｉＯ₂ ）、アルミ
ナ（Ａｌ₂ Ｏ₃ ）、アルミノケイ酸塩等とを所定割合に
て混合する。次いで、有機バインダーを添加混合して円
板形状に成形し、得られた成形体を大気中で焼成して脱
脂した後、還元雰囲気中で焼成することにより半導体磁
器素地を製造する。That is, first, the main component SrTiO ₃ or B
aTiO ₃ was added to Dy, Bi, Nd,
Oxides such as La, Nb, Ta and W, carbonates, oxalates and the like, and Cu, Mn, Fe, Co,
Oxides, carbonates, oxalates such as Ni, Zn, Ge, etc., and silica (SiO ₂ ), alumina (Al ₂ O ₃ ), aluminosilicate, etc. as a sinterability improver are mixed at a predetermined ratio. I do. Next, an organic binder is added and mixed to form a disc shape, and the obtained molded body is fired in the air to be degreased, and then fired in a reducing atmosphere to produce a semiconductor ceramic body.

【０００４】そして、図９（ａ）（斜視図），（ｂ）
（側面図）に示す如く、得られた半導体磁器素地１の両
板面に粒界絶縁化剤２を塗布して熱処理することによ
り、粒界絶縁化剤を半導体磁器素地の結晶粒界部分に熱
拡散させ、最後にこの面に電極を形成して粒界絶縁型半
導体磁器コンデンサとする。FIGS. 9A (perspective view), (b)
As shown in (side view), the grain boundary insulating agent 2 is applied to both plate surfaces of the obtained semiconductor ceramic body 1 and heat-treated, so that the grain boundary insulating agent is applied to the crystal grain boundaries of the semiconductor ceramic body. Thermal diffusion is performed, and finally an electrode is formed on this surface to obtain a grain boundary insulating semiconductor ceramic capacitor.

【０００５】粒界絶縁化剤としてはＰｂ，Ｂｉ，Ｃｕ，
Ｍｎ等の金属酸化物及び耐電圧を向上させるためのガラ
ス成分の混合物を、樹脂ワニスやテルピネオールなどの
有機ビヒクル剤と混練してペースト状にしたものが用い
られており、また、円板状半導体磁器素地の両板面に粒
界絶縁化剤を塗布する方法としては、スクリーン印刷法
などが採用されている。[0005] Pb, Bi, Cu,
A mixture of a metal oxide such as Mn and a glass component for improving withstand voltage is kneaded with an organic vehicle such as resin varnish or terpineol to form a paste, and a disc-shaped semiconductor is also used. As a method of applying the grain boundary insulating agent to both plate surfaces of the porcelain body, a screen printing method or the like is employed.

【０００６】また、半導体磁器素地の板面に塗布した粒
界絶縁化剤を結晶粒界部分に熱拡散させるための熱処理
方法としては、従来、次のような方法がある。As a heat treatment method for thermally diffusing the grain boundary insulating agent applied to the plate surface of the semiconductor ceramic body to the crystal grain boundary portion, there are conventionally the following methods.

【０００７】 図１０に示す如く、粒界絶縁化剤を塗
布した半導体磁器素地３を、アルミナ質又はジルコニア
質などの耐火物セッター４上に、１枚ずつ並べて複数個
配置し、これを図１１に示す如く、準密閉容器５内に収
納して熱処理する方法。 図１２に示す如く、アルミナ質又はジルコニア質な
どの耐火物セッター４上に、粒界絶縁化剤を塗布した半
導体磁器素地３を複数枚積み重ねたものを複数群並べて
配置し、これを図１３に示す如く、準密閉容器５内に収
納して熱処理する方法。As shown in FIG. 10, a plurality of semiconductor ceramic bodies 3 coated with a grain boundary insulating agent are arranged one by one on a refractory setter 4 made of alumina or zirconia. As shown in (1), a method of heat-treating in a semi-closed container 5. As shown in FIG. 12, a plurality of stacked semiconductor ceramic bodies 3 coated with a grain boundary insulating agent are arranged and arranged on a refractory setter 4 made of alumina or zirconia. As shown, a method in which the heat treatment is performed while being housed in the semi-closed container 5.

【０００８】半導体磁器素地の結晶粒界部分への粒界絶
縁化剤の熱拡散方法としては、上記のように半導体磁器
素地の板面に粒界絶縁化剤のペーストを塗布して熱処理
する方法が一般的であるが、特殊な方法として次のよう
な方法もある。As a method for thermally diffusing the grain boundary insulating agent into the crystal grain boundary portions of the semiconductor ceramic body, a method of applying a paste of the grain boundary insulating agent to the plate surface of the semiconductor ceramic body and performing heat treatment as described above. However, there is a special method as follows.

【０００９】 図１４に示す如く、密閉板６で閉鎖し
た準密閉容器７内に、絶縁化剤が塗布されていない複数
枚の半導体磁器素地１を収納して熱処理し、該容器７内
に予め加熱気化させた粒界絶縁化剤を導入することによ
り、半導体磁器素地１の結晶粒界部分に特定金属酸化物
を気相拡散させる方法。As shown in FIG. 14, in a semi-closed container 7 closed by a sealing plate 6, a plurality of semiconductor ceramic substrates 1 not coated with an insulating agent are stored and heat-treated. A method in which a specific metal oxide is vapor-phase diffused into the crystal grain boundary portion of the semiconductor ceramic body 1 by introducing a heated and vaporized grain boundary insulating agent.

【００１０】 図１５に示す如く、密閉板８で閉鎖し
た準密閉容器９内に、粒界絶縁化剤が塗布されていない
複数枚の半導体磁器素地１と粒界絶縁化剤の金属酸化物
を成形してなる複数個のペレット１０とを混在させて収
納し、この状態で熱処理することにより、ペレット１０
の金属酸化物を半導体磁器素地１の結晶粒界部分に熱拡
散させる方法（特公平７−１２０５９７９号公報）。As shown in FIG. 15, a plurality of semiconductor ceramic bodies 1 not coated with a grain boundary insulating agent and a metal oxide of the grain boundary insulating agent are placed in a semi-closed container 9 closed by a sealing plate 8. A plurality of molded pellets 10 are mixed and stored, and heat treatment is performed in this state, whereby pellets 10 are formed.
(See Japanese Patent Publication No. 7-1205979) in which the metal oxide is thermally diffused to the crystal grain boundary portion of the semiconductor ceramic body 1.

【００１１】 図１６に示す如く、素地収納容器１１
の内壁面のうち、素地載置面となる容器内底面１１ａ以
外の容器内壁面１１ｂ及び天板１２の天井面（内面側）
１２ａに予め粒界絶縁化剤のペーストを塗布し、図１７
に示す如く、この容器１１の底面１１ａに、半導体磁器
素地１を複数枚配置して熱処理することにより、粒界絶
縁化剤を半導体磁器素地１の結晶粒界部分に熱拡散させ
る方法（特開平７−３３５４７２号公報）。[0011] As shown in FIG.
Of the inner wall surfaces, the inner wall surface 11b of the container other than the inner bottom surface 11a serving as the base mounting surface and the ceiling surface of the top plate 12 (inner surface side)
17a is applied with a paste of a grain boundary insulating agent in advance.
As shown in FIG. 1, a method of thermally dispersing a plurality of semiconductor ceramic bodies 1 on the bottom surface 11a of the container 11 to thermally diffuse the grain boundary insulating agent to the crystal grain boundary portions of the semiconductor ceramic body 1 7-335472).

【００１２】[0012]

【発明が解決しようとする課題】しかしながら、上記従
来の粒界絶縁化剤の熱拡散処理法では、次のような欠点
があった。However, the conventional thermal diffusion treatment of the grain boundary insulating agent has the following disadvantages.

【００１３】図１０，１１に示す如く、セッター４に粒
界絶縁化剤を塗布した半導体磁器素地３を１枚ずつ配置
して熱処理する方法では、粒界絶縁化剤の塗布量が個々
の半導体磁器素地３において全て一定であると仮定した
場合、粒界絶縁化剤の熱拡散量が各素地３間でほぼ一定
となるので、製品性能のバラツキの極めて小さい粒界絶
縁型半導体磁器コンデンサが得られる反面、処理量が少
なく、製造コストが高くなるという問題がある。As shown in FIGS. 10 and 11, in the method of arranging the semiconductor porcelain base bodies 3 coated with the grain boundary insulating agent on the setter 4 one by one and performing heat treatment, the applied amount of the grain boundary insulating agent is individual semiconductor. When it is assumed that all of the ceramic bodies 3 are constant, the heat diffusion amount of the grain boundary insulating agent is substantially constant between the respective bodies 3, so that a grain boundary insulated semiconductor ceramic capacitor with extremely small variation in product performance is obtained. On the other hand, there is a problem that the processing amount is small and the manufacturing cost is high.

【００１４】図１２，１３に示す如く、粒界絶縁化剤を
塗布した半導体磁器素地３をセッター上に複数枚積み重
ねて熱処理する方法であれば、大量処理が可能である反
面、積み重ねられた素地３のうち、セッター４に接触す
る最下部付近の素地は粒界絶縁化剤２がセッター４に吸
われる量が多く、また、最上部付近の素地は粒界絶縁化
剤の揮散量が多いので、これらの間に位置する素地に比
べて、結晶粒界部分への粒界絶縁化剤の拡散量が少なく
なり、その結果、コンデンサを形成した際の製品性能の
バラツキが大きくなるという問題がある。製品性能のバ
ラツキは、製品の歩留まりを低下させ、その結果、製造
コストの高騰を招くので好ましくない。As shown in FIGS. 12 and 13, a method of stacking a plurality of semiconductor ceramic bodies 3 coated with a grain boundary insulating agent on a setter and heat-treating them allows mass processing, but on the other hand, the stacked bodies can be processed. 3, the base material near the lowermost portion which contacts the setter 4 has a large amount of the grain boundary insulating agent 2 absorbed by the setter 4, and the base material near the uppermost portion has a large amount of the grain boundary insulating agent volatilized. However, the diffusion amount of the grain boundary insulating agent into the crystal grain boundary portion is smaller than that of the base material located therebetween, and as a result, there is a problem that the variation in the product performance when the capacitor is formed is increased. . Variations in product performance are undesirable because they lower product yields and, as a result, increase manufacturing costs.

【００１５】また、図１４〜１７に示す方法は、いずれ
も、半導体磁器素地への粒界絶縁化剤の塗布作業が不要
で大量処理が可能であるという利点がある反面、それぞ
れ、次のような問題がある。The methods shown in FIGS. 14 to 17 all have the advantage that they do not require the work of applying a grain boundary insulating agent to the semiconductor porcelain body and can be processed in a large amount. Problem.

【００１６】即ち、図１４に示す方法では、予め気化さ
せた粒界絶縁化剤を、容器６内でランダムに重ねられた
素地１群の内部に均一に流通させることが困難であるた
め、結晶粒界部分への粒界絶縁化剤の拡散量がバラツキ
易く、その結果、コンデンサを形成した際の製品性能の
バラツキが大きくなる。That is, in the method shown in FIG. 14, since it is difficult to uniformly distribute the grain boundary insulating agent vaporized in advance in the group of randomly stacked substrates 1 in the container 6, the method shown in FIG. The diffusion amount of the grain boundary insulating agent into the grain boundary portion tends to vary, and as a result, the variation in product performance when the capacitor is formed increases.

【００１７】図１５に示す方法では、容器９内の素地１
には、これと共に混在させた金属酸化物のペレット１０
に接触する素地と接触しない素地があるが、ペレット１
０に接触する素地と接触しない素地とでは、結晶粒界部
分への粒界絶縁化剤の拡散量が異なり、その結果、コン
デンサを形成した際の製品の性能のバラツキが大きくな
る。In the method shown in FIG.
The metal oxide pellets 10 mixed with this
There is a substrate that does not contact the substrate that contacts the
The amount of diffusion of the grain boundary insulating agent into the crystal grain boundary portion differs between the substrate that contacts zero and the substrate that does not contact, and as a result, there is a large variation in the performance of the product when the capacitor is formed.

【００１８】図１６，１７に示す方法では、容器１１内
にランダムに積み重ねられた素地１群の内部の素地と外
側部分の素地とでは、結晶粒界部分への粒界絶縁化剤の
拡散量が異なり、その結果、コンデンサを形成した際の
製品性能のバラツキが大きくなる。In the method shown in FIGS. 16 and 17, the amount of diffusion of the grain boundary insulating agent into the crystal grain boundary portion between the inside body and the outside body of the group of bodies randomly stacked in the container 11 is described. As a result, variations in product performance when a capacitor is formed increase.

【００１９】本発明は上記従来の問題点を解決し、粒界
絶縁化剤を塗布した半導体磁器素地を熱処理して半導体
磁器素地の結晶粒界部分に粒界絶縁化剤を熱拡散させて
粒界絶縁型半導体磁器コンデンサを製造する方法におい
て、半導体磁器素地の結晶粒界部分への粒界絶縁化剤の
拡散量が均一に制御され、製品性能のバラツキの小さい
粒界絶縁型半導体磁器コンデンサを、一度に大量生産す
ることができる粒界絶縁型半導体磁器コンデンサの製造
方法を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and heat-treats a semiconductor ceramic body coated with a grain boundary insulating agent to thermally diffuse the grain boundary insulating agent to a crystal grain boundary portion of the semiconductor ceramic body to obtain particles. In a method of manufacturing a field-insulated semiconductor ceramic capacitor, the amount of diffusion of a grain boundary insulating agent into a crystal grain boundary portion of a semiconductor ceramic body is controlled uniformly, and a grain-boundary insulated semiconductor ceramic capacitor with small variation in product performance is manufactured. It is another object of the present invention to provide a method of manufacturing a grain boundary insulating semiconductor ceramic capacitor which can be mass-produced at one time.

【００２０】[0020]

【課題を解決するための手段】本発明の粒界絶縁型半導
体磁器コンデンサの製造方法は、円板状に成形された半
導体磁器素地の板面に粒界絶縁化剤を塗布した後、該半
導体磁器素地をセッターに載置して熱処理することによ
り、粒界絶縁化剤を半導体磁器素地の結晶粒界部分に熱
拡散させる粒界絶縁型半導体磁器コンデンサの製造方法
において、該セッターの半導体磁器素地載置面に複数の
溝を設け、該溝内に、半導体磁器素地を立てた状態で配
置して熱処理する方法である。According to the method of manufacturing a grain boundary insulated semiconductor ceramic capacitor of the present invention, a grain boundary insulating agent is applied to a plate surface of a disc-shaped semiconductor ceramic body, and then the semiconductor is cooled. A method of manufacturing a grain boundary insulated semiconductor ceramic capacitor in which a ceramic body is placed on a setter and heat-treated to thermally diffuse a grain boundary insulating agent to crystal grain boundaries of the semiconductor ceramic body. This is a method in which a plurality of grooves are provided on the mounting surface, and semiconductor ceramic bodies are arranged in the grooves in an upright state and heat treatment is performed.

【００２１】請求項１の方法においては、上記方法にお
いて、該溝内に、半導体磁器素地を１枚ずつ配置して熱
処理する。According to the first aspect of the present invention, in the above-described method, heat treatment is performed by arranging semiconductor ceramic bodies one by one in the grooves.

【００２２】また、請求項２の方法においては、上記方
法において、２枚の半導体磁器素地をその板面同士を重
ねて１組としたものを、該溝内に１組ずつ配置して熱処
理する。In the method according to the second aspect, in the above method, two sets of semiconductor ceramic bodies having a pair of plate surfaces overlapped with each other are placed one by one in the groove and heat-treated. .

【００２３】本発明の方法によれば、粒界絶縁化剤を塗
布した半導体磁器素地をセッターに設けた複数の溝内に
立てた状態で配置するため、セッター当りの半導体磁器
素地載置個数が多く、一回の熱処理で大量の半導体磁器
素地を処理できる。特に、請求項２の方法では、１つの
溝内に、２枚１組とした半導体磁器素地を配置するた
め、より一層大量の半導体磁器素地を処理できる。According to the method of the present invention, since the semiconductor ceramic body coated with the grain boundary insulating agent is arranged in a plurality of grooves provided in the setter in a standing state, the number of semiconductor ceramic bodies mounted per setter is reduced. In many cases, a large amount of semiconductor porcelain bodies can be processed by one heat treatment. In particular, in the method of claim 2, since a pair of semiconductor ceramic bodies are arranged in one groove, a larger amount of semiconductor ceramic bodies can be processed.

【００２４】また、セッターの溝内の半導体磁器素地
は、その位置に係わらずすべて同一条件、即ち、雰囲気
との接触面積割合、セッターとの接触面積割合がすべて
同一となるため、粒界絶縁化剤のセッターへの吸収量及
び雰囲気中への揮散量などの熱拡散条件がすべて同等と
なり、各半導体磁器素地への結晶粒界部分への粒界絶縁
化剤の熱拡散量がほぼ等しくなる。このため均一な熱拡
散処理を行って、製品性能のバラツキの小さい粒界絶縁
型半導体磁器コンデンサを製造することができる。Also, the semiconductor ceramic body in the groove of the setter has the same condition regardless of its position, that is, the contact area ratio with the atmosphere and the contact area ratio with the setter are all the same. The thermal diffusion conditions such as the absorption amount of the agent into the setter and the volatilization amount into the atmosphere are all the same, and the thermal diffusion amount of the grain boundary insulating agent to the crystal grain boundary portion into each semiconductor ceramic body becomes almost equal. For this reason, a uniform thermal diffusion treatment can be performed to manufacture a grain boundary insulated semiconductor ceramic capacitor with small variations in product performance.

【００２５】２枚の半導体磁器素地の板面同士を重ね合
せて１組としたものをセッターの溝内に配置した請求項
２の方法でも、その位置に係わらず、雰囲気との接触面
積割合、セッターとの接触面積割合、重ね合せた半導体
磁器素地との接触面積割合が、すべての半導体磁器素地
について同一となるため、同様に均一な熱拡散処理を行
って、製品性能のバラツキの小さい粒界絶縁型半導体磁
器コンデンサを製造することができる。The method according to claim 2, wherein two sets of the semiconductor ceramic bodies are superposed on each other and arranged in a groove of the setter, irrespective of the position, the contact area ratio with the atmosphere, Since the contact area ratio with the setter and the contact area ratio with the superposed semiconductor porcelain body are the same for all the semiconductor porcelain bodies, a uniform heat diffusion treatment is performed in the same manner to obtain a grain boundary with small variation in product performance. An insulated semiconductor ceramic capacitor can be manufactured.

【００２６】なお、重ね合わせる半導体磁器素地の数を
３枚以上とすると、積層体の両端の２枚の素地、即ち、
一方の板面が他の素地と重なり合わずに表出している素
地と、その間の部分の素地、即ち、両板面が他の素地に
重なり合っている素地とで、雰囲気との接触面積割合、
セッターとの接触面積割合、重ね合せた半導体磁器素地
との接触面積割合が異なるものとなり、均一な熱拡散処
理を行えず、製品性能にバラツキが生じるため、好まし
くない。If the number of the semiconductor ceramic bodies to be overlapped is three or more, the two bodies at both ends of the laminated body, that is,
In the base material where one plate surface is exposed without overlapping with the other base material, and the base material in the portion between them, that is, the base material where both plate surfaces overlap with the other base material, the contact area ratio with the atmosphere,
Since the contact area ratio with the setter and the contact area ratio with the superposed semiconductor ceramic body are different from each other, uniform heat diffusion cannot be performed, and the product performance varies, which is not preferable.

【００２７】本発明においては、セッターの半導体磁器
素地載置面を水平面に対して傾斜させることにより、溝
内の半導体磁器素地を溝の下端側に寄せ集めることで、
溝内での半導体磁器素地の位置ずれを防止して、均一な
熱拡散処理を確実に行うことができる。In the present invention, the semiconductor ceramic body in the groove is gathered toward the lower end of the groove by inclining the semiconductor ceramic body mounting surface of the setter with respect to the horizontal plane.
Displacement of the semiconductor ceramic body in the groove can be prevented, and uniform heat diffusion can be reliably performed.

【００２８】例えば、前述の如く、溝内に、２枚の半導
体磁器素地を重ね合わせて１組としたものを配置する場
合において、溝の長手方向をセッター板面の水平方向と
することで、各組を溝の一側端（下端）側に寄せ集め、
重ね合わせた２枚の半導体磁器素地が互いに離れるのを
防止して、２枚の半導体磁器素地が常に重なり合った状
態を維持するようにすることができる。For example, as described above, in the case where two semiconductor ceramic bodies are overlapped to form a set in a groove, by setting the longitudinal direction of the groove to the horizontal direction of the setter plate surface, Each set is gathered at one end (lower end) of the groove,
It is possible to prevent the two superposed semiconductor ceramic bodies from separating from each other, and to keep the two semiconductor ceramic bodies constantly overlapping.

【００２９】また、溝の長手方向を、セッター板面の最
大傾斜方向とセッター板面の水平方向との間の方向とす
ることで、上記の如く、１組の半導体磁器素地の間が離
れるのを防止すると共に、この重なり合せ面の位置ずれ
を防止することもできる。Further, by setting the longitudinal direction of the groove to be a direction between the maximum inclination direction of the setter plate surface and the horizontal direction of the setter plate surface, as described above, a set of semiconductor ceramic bodies can be separated. And the displacement of the overlapping surface can be prevented.

【００３０】また、溝の長手方向の長さを半導体磁器素
地の直径よりも短くすることにより、半導体磁器素地を
その自重により溝内に安定かつ確実に固定配置すること
ができる。Further, by making the length of the groove in the longitudinal direction shorter than the diameter of the semiconductor porcelain body, the semiconductor porcelain body can be stably and reliably fixedly arranged in the groove by its own weight.

【００３１】[0031]

【発明の実施の形態】以下に図面を参照して本発明の実
施の形態を説明する。Embodiments of the present invention will be described below with reference to the drawings.

【００３２】図１は本発明の粒界絶縁型半導体磁器コン
デンサの製造方法の実施の形態を示す斜視図であり、図
２は図１に示すセッターを用いる熱処理方法を説明する
断面図である。FIG. 1 is a perspective view showing an embodiment of a method for manufacturing a grain boundary insulating semiconductor ceramic capacitor according to the present invention, and FIG. 2 is a cross-sectional view for explaining a heat treatment method using the setter shown in FIG.

【００３３】図１において、セッター２０の板面には、
溝２１が６本ずつ直列配置されたものが６列互いに平行
に設けられており、計３６本の溝２１内に、図９に示す
如く、粒界絶縁化剤を塗布した半導体磁器素地３が各々
１枚ずつ配置されている。半導体磁器素地３は、溝２１
内に立設した状態で、板面が溝２１の長手方向となるよ
うに配置されている。In FIG. 1, the plate surface of the setter 20
Six grooves 21 arranged in series are provided in parallel with each other in six rows. As shown in FIG. 9, the semiconductor ceramic body 3 coated with the grain boundary insulating agent is provided in a total of 36 grooves 21. Each one is arranged. The semiconductor porcelain base 3 is
It is arranged so that the plate surface is in the longitudinal direction of the groove 21 in a state of standing inside.

【００３４】このセッター２０を用いる場合も、図１
１，図１３に示す従来法と同様に、アルミナ質等の耐火
物製準密閉容器５に、図２に示す如く、半導体磁器素地
３を配置したセッター２０を入れて熱処理することがで
きる。この熱処理に当り、１枚のセッター２０に対し
て、多数枚の半導体磁器素地３を配置できるため、一度
の熱処理で大量の処理を行える。また、セッター２０上
の半導体磁器素地３は、いずれも雰囲気との接触面積割
合、セッターとの接触面積割合がすべて同一条件である
ため、均一な熱拡散処理を行って、製品性能のバラツキ
の小さい粒界絶縁型半導体磁器コンデンサを製造するこ
とができる。When this setter 20 is used, FIG.
1, similarly to the conventional method shown in FIG. 13, a setter 20 in which a semiconductor porcelain body 3 is arranged is placed in a semi-closed container 5 made of a refractory material such as alumina as shown in FIG. In this heat treatment, a large number of semiconductor ceramic bodies 3 can be arranged for one setter 20, so that a large amount of processing can be performed by one heat treatment. Further, the semiconductor ceramic substrate 3 on the setter 20 has the same contact area ratio with the atmosphere and the same contact area ratio with the setter, so that uniform heat diffusion treatment is performed, and variation in product performance is small. A grain boundary insulating semiconductor ceramic capacitor can be manufactured.

【００３５】図３は本発明の粒界絶縁型半導体磁器コン
デンサの製造方法の他の実施の形態を示す斜視図であ
り、図４は図３に示すセッターを用いる熱処理方法を説
明する断面図である。FIG. 3 is a perspective view showing another embodiment of the method of manufacturing the grain boundary insulated semiconductor ceramic capacitor of the present invention, and FIG. 4 is a sectional view for explaining a heat treatment method using the setter shown in FIG. is there.

【００３６】本実施例においては、セッター３０の板面
に設けられた溝３１内に、粒界絶縁型半導体磁器コンデ
ンサを塗布した半導体磁器素地３を２枚、その板面同士
を重ねて１組としたものが、各溝毎に１組ずつ立設した
状態で配置されている。In this embodiment, two semiconductor ceramic bodies 3 coated with a grain boundary insulating semiconductor ceramic capacitor are placed in a groove 31 provided on the plate surface of the setter 30, and the plate surfaces are overlapped to form one set. Are arranged in a state of standing one set for each groove.

【００３７】このセッター３０を用いる場合も、図１，
２に示す場合と同様に、このセッター３０を準密閉容器
５に図４に示す如く入れて熱処理することができ、同様
に均一な熱拡散処理を行って、製品性能のバラツキの小
さい粒界絶縁型半導体磁器コンデンサを製造することが
できる。しかも、この方法では、半導体磁器素地３を２
枚ずつ重ね合わせて溝３１内に配置するため、セッター
１枚当りの半導体磁器素地載置数をより一層多くするこ
とができ、図１，２に示す場合よりも大量の処理を行う
ことが可能となる。In the case where the setter 30 is used, FIG.
As in the case shown in FIG. 2, the setter 30 can be placed in the semi-closed container 5 and heat-treated as shown in FIG. Type semiconductor ceramic capacitors can be manufactured. In addition, in this method, the semiconductor ceramic body 3 is
Since the sheets are superimposed one by one and arranged in the groove 31, the number of semiconductor ceramic substrates mounted per setter can be further increased, and a larger amount of processing can be performed than the case shown in FIGS. Becomes

【００３８】図５は本発明の粒界絶縁型半導体磁器コン
デンサの製造方法の異なる実施例方法を示す斜視図であ
り、図６は図５に示すセッターを用いる熱処理方法を説
明する断面図である。FIG. 5 is a perspective view showing a method of manufacturing a grain boundary insulated semiconductor ceramic capacitor according to another embodiment of the present invention, and FIG. 6 is a sectional view for explaining a heat treatment method using the setter shown in FIG. .

【００３９】図５，６に示すセッター４０は、一側端に
脚部４２を有し、溝４１の長手方向（溝列の延在方向）
がセッター４０の板面の水平方向（最大傾斜方向と直交
する方向）となるようにセッター４０の板面が傾斜して
いる点が図３，４に示すセッターと異なり、その他の構
成及び熱処理方法は図３，４のものと同様である。The setter 40 shown in FIGS. 5 and 6 has a leg 42 at one end, and the longitudinal direction of the groove 41 (the extending direction of the groove row).
Is different from the setter shown in FIGS. 3 and 4 in that the plate surface of the setter 40 is inclined so that the horizontal direction (the direction perpendicular to the maximum inclination direction) of the plate surface of the setter 40 is different. Are the same as those in FIGS.

【００４０】図５，６に示すセッター４０であれば、溝
４１内の半導体磁器素地３を溝４１の下端となる一側辺
側に寄せることで、重なり合わされた２枚の半導体磁器
素地３同士が互いに離れるのを防止して、２枚の半導体
磁器素地３を常に板面同士が接触した状態で維持するこ
とができる。In the case of the setter 40 shown in FIGS. 5 and 6, the semiconductor ceramic base 3 in the groove 41 is brought closer to one side, which is the lower end of the groove 41, so that the two semiconductor ceramic bases 3 overlap each other. Can be prevented from separating from each other, and the two semiconductor ceramic bodies 3 can be maintained in a state where the plate surfaces are always in contact with each other.

【００４１】また、図７に示すセッター５０は、一側端
に脚部５２を設けて、図５に示すセッター４０と同様に
板面を傾斜させたものであるが、溝５１の長手方向（溝
列の延在方向）がセッター５０の板面の水平方向ではな
く、セッター５０の板面の対角線方向（最大傾斜方向と
水平方向との間の方向）である点が、図５に示すセッタ
ー４０と異なる。The setter 50 shown in FIG. 7 is provided with a leg 52 at one side end so that the plate surface is inclined similarly to the setter 40 shown in FIG. The point that the groove direction (extending direction of the groove row) is not the horizontal direction of the plate surface of the setter 50 but the diagonal direction of the plate surface of the setter 50 (the direction between the maximum inclination direction and the horizontal direction) is shown in FIG. Different from 40.

【００４２】このセッター５０であれば、溝５１内の２
枚の半導体磁器素地３の重ね合わせ面同士が互いに離れ
るのを防止することができるばかりでなく、組み合わせ
た２枚の半導体磁器素地の重ね合わせ面のずれ（重ね合
わせ面方向のずれ）も防止することができる。これによ
り、半導体磁器素地３の板面同士が常にぴったりと重ね
合わされた状態となるように保持することができるよう
になり、均一な熱拡散処理を確実に行うことができる。In the case of the setter 50, the 2
Not only can the overlapping surfaces of the two semiconductor ceramic bodies 3 be prevented from being separated from each other, but also the displacement of the overlapping surface of the combined two semiconductor ceramic bodies (shift in the overlapping surface direction) can be prevented. be able to. Thereby, the plate surfaces of the semiconductor porcelain body 3 can be held so as to always be in a state of being overlapped exactly, and uniform heat diffusion processing can be reliably performed.

【００４３】即ち、本発明においては、セッターの溝内
に、２枚の半導体磁器素地を重ね合わせて１組としたも
のを立設させて配置する場合、組み合わせた２枚の半導
体磁器素地の重ね合わせ面がずれないように、また、離
れないように、半導体磁器素地の板面同士がぴったりと
重ね合わされた状態となるように保持することは、熱拡
散条件の均一化の面で極めて重要である。That is, in the present invention, when two sets of semiconductor ceramic bodies are stacked and set upright in the setter groove, the two sets of semiconductor ceramic bodies are overlapped. It is extremely important to keep the surfaces of the semiconductor porcelain bodies so that they are exactly superimposed on each other so that the mating surfaces do not shift or separate. is there.

【００４４】しかしながら、図３，４に示す如く、溝３
１内に半導体磁器素地３を２枚１組で並べる場合、素地
の位置ずれで、素地の重なり合わせ面がずれ、本来、組
み合わせた素地の板面で覆われるべき面が表出してしま
ったり、素地と素地との間に隙間ができてしまったりす
る場合が起こり得る。これに対して、図５〜７に示す如
く、セッターの板面を傾斜させることにより、このよう
な位置ずれ等を防止することができ、均一な熱拡散処理
を確実に行うことができる。However, as shown in FIGS.
When two semiconductor porcelain bases 3 are arranged in a set in one, the overlapping surface of the bases is displaced due to the displacement of the bases, and the surface to be covered by the plate surface of the combined bases is exposed, There may be a case where a gap is formed between the substrates. On the other hand, as shown in FIGS. 5 to 7, by inclining the plate surface of the setter, such a displacement can be prevented, and uniform heat diffusion processing can be reliably performed.

【００４５】図８（ａ）は本発明の粒界絶縁型半導体磁
器コンデンサの製造方法の更に別の実施例方法を示す斜
視図であり、図８（ｂ）は図８（ａ）のＢ−Ｂ線に沿う
断面の拡大図、図８（ｃ）は図８（ａ）のＣ−Ｃ線に沿
う断面の拡大図である。FIG. 8A is a perspective view showing still another embodiment of the method of manufacturing the grain boundary insulated semiconductor ceramic capacitor of the present invention, and FIG. FIG. 8C is an enlarged view of a cross section taken along the line B-C of FIG. 8A.

【００４６】図８に示すセッター６０は、図７に示すセ
ッター５０と同様に一側端に脚部６２を有し、板面が傾
斜面とされたものであるが、溝６１の長手方向の長さＬ
が半導体磁器素地３の直径Ｒよりも短い点が図７に示す
セッターと異なり、その他の構成及び熱処理方法は図７
に示すものと同様である。The setter 60 shown in FIG. 8 has a leg 62 on one side end and a sloped plate surface like the setter 50 shown in FIG. Length L
Is different from the setter shown in FIG. 7 in that it is shorter than the diameter R of the semiconductor porcelain base 3, and other configurations and heat treatment methods
Is the same as that shown in FIG.

【００４７】このセッター６０であれば、図７に示すセ
ッター５０と同様に組み合わせた２枚の半導体磁器素地
３の重ね合わせ面がずれないように、また、離れないよ
うに、半導体磁器素地３の板面同士がぴったりと重ね合
わされた状態となるように保持することで熱拡散条件の
均一化を図ることができるが、特に、溝６１の長手方向
の長さＬが半導体磁器素地３の直径Ｒよりも短いため
に、半導体磁器素地３をその自重で溝６１内に安定かつ
確実に固定することができ、これにより、半導体磁器素
地３の重ね合わせ面のずれ等をより一層確実に防止する
ことができる。In the case of the setter 60, the two semiconductor ceramic bases 3 combined in the same manner as the setter 50 shown in FIG. The heat diffusion conditions can be made uniform by holding the plate surfaces in such a manner that they are exactly overlapped with each other. In particular, the length L of the groove 61 in the longitudinal direction is equal to the diameter R of the semiconductor ceramic body 3. Since the semiconductor ceramic body 3 is shorter, the semiconductor ceramic body 3 can be stably and reliably fixed in the groove 61 by its own weight, and thereby, the displacement of the superposed surface of the semiconductor ceramic body 3 can be more reliably prevented. Can be.

【００４８】本発明において、セッターに形成する溝
は、半導体磁器素地の寸法や振り込み治具などに合わせ
て任意の幅、深さ及び長さに設定することができるが、
溝の深さが半導体磁器素地の直径の１／４よりも浅くな
ると、熱処理時に溝に立設した半導体磁器素地が転倒し
易くなるため、溝の深さは半導体磁器素地の直径の１／
４以上とするのが好ましい。In the present invention, the groove formed in the setter can be set to any width, depth and length in accordance with the dimensions of the semiconductor porcelain body and the transfer jig.
If the depth of the groove is smaller than 1/4 of the diameter of the semiconductor ceramic body, the semiconductor ceramic body erected in the groove at the time of the heat treatment is easily overturned.
Preferably, the number is 4 or more.

【００４９】また、溝の幅については、過度に広いと、
溝内の半導体磁器素地が位置ずれし易くなり、逆に過度
に狭いと溝内に半導体磁器素地を振り込み難くなるた
め、溝の幅は、図１，２に示す如く、半導体磁器素地を
１枚ずつ配置する場合には半導体磁器素地の厚さの１．
２〜２．５倍程度、図３〜８に示す如く、２枚の半導体
磁器素地を重ね合わせて一組としたものを配置する場合
には、半導体磁器素地の厚さの２倍に対して１．５〜
３．０倍程度とするのが好ましい。If the width of the groove is too large,
If the semiconductor ceramic body in the groove is easily displaced, and if the semiconductor ceramic body is too narrow, it is difficult to transfer the semiconductor ceramic body into the groove, the width of the groove is one sheet of the semiconductor ceramic body as shown in FIGS. In the case of arranging one by one, the thickness of the semiconductor porcelain body is set to 1.
As shown in FIGS. 3 to 8, when two semiconductor porcelain bodies are overlapped to form a set, as shown in FIGS. 1.5-
It is preferably about 3.0 times.

【００５０】溝の長さは、図１〜７の場合では、半導体
磁器素地の直径以上で、好ましくは半導体磁器素地の直
径の１．０１〜１．５倍とする。また、図８に示す如
く、溝の長さを半導体磁器素地の直径よりも短くする場
合、溝の長さＬが半導体磁器素地の直径Ｒよりも過度に
短いと、溝内に半導体磁器素地を安定配置することがで
きなくなるため、溝の長さＬは半導体磁器素地の直径Ｒ
の１／２以上となるようにするのが好ましい。In the case of FIGS. 1 to 7, the length of the groove is not less than the diameter of the semiconductor ceramic body, preferably 1.01 to 1.5 times the diameter of the semiconductor ceramic body. As shown in FIG. 8, when the length of the groove is shorter than the diameter of the semiconductor ceramic body, if the length L of the groove is excessively shorter than the diameter R of the semiconductor ceramic body, the semiconductor ceramic body is inserted into the groove. Since the stable arrangement cannot be performed, the length L of the groove is equal to the diameter R of the semiconductor ceramic body.
Is preferably set to be at least 1/2.

【００５１】また、図５〜８に示す如く、セッターの板
面を傾斜させる場合、その傾斜角θは、任意の値に設定
可能であるが、θが過度に大きいと半導体磁器素地が溝
から落下するおそれがあり、また、θが過度に小さい場
合には、板面を傾斜させることによる位置ずれ防止効果
が得られない。このため、この傾斜角θは５〜４５°の
範囲とするのが好ましい。As shown in FIGS. 5 to 8, when the plate surface of the setter is inclined, the inclination angle θ can be set to an arbitrary value. If the angle θ is excessively small, the effect of preventing displacement by tilting the plate surface cannot be obtained. Therefore, it is preferable that the inclination angle θ be in the range of 5 to 45 °.

【００５２】なお、図１〜８は本発明の一実施例を示す
ものであり、本発明はその要旨を超えない限り、何ら図
示のものに限定されるものではない。例えば、セッター
に設ける溝の数は図１〜８に示すものよりも少なくても
多くても良い。溝の配置形態も任意であるが、好ましく
は、図１〜８に示す如く、溝の長手方向に直列に複数配
置した溝列を、各列が互いに平行になるように配置する
のが良い。FIGS. 1 to 8 show one embodiment of the present invention, and the present invention is not limited to those shown in the drawings unless it exceeds the gist of the present invention. For example, the number of grooves provided in the setter may be less or more than that shown in FIGS. The arrangement form of the grooves is also arbitrary, but preferably, as shown in FIGS. 1 to 8, a plurality of groove rows arranged in series in the longitudinal direction of the grooves are preferably arranged so that each row is parallel to each other.

【００５３】また、溝は、図１〜８に示すような凹溝に
限らず、セッターの板面を貫通したスリットであっても
良い。ただし、この場合には、半導体磁器素地の落下防
止のためにスリットの長手方向の長さを半導体磁器素地
の直径よりも短くする必要がある。The groove is not limited to the concave groove as shown in FIGS. 1 to 8, but may be a slit penetrating the plate surface of the setter. However, in this case, it is necessary to make the length of the slit in the longitudinal direction shorter than the diameter of the semiconductor ceramic body in order to prevent the semiconductor ceramic body from falling.

【００５４】本発明の粒界絶縁型半導体磁器コンデンサ
の製造方法は、熱拡散処理工程において、上述の如く、
溝付きセッターを用い、セッターの溝内に半導体磁器素
地を配置して熱処理を行うこと以外は、従来法と同様に
実施することができ、原料粉末の調製、成形、焼成によ
る半導体磁器素地の製造、粒界絶縁化剤の塗布等は常法
に従って行うことができる。また、熱処理の温度、時間
及び雰囲気についても従来と同様である。According to the method for manufacturing a grain boundary insulating semiconductor ceramic capacitor of the present invention, in the heat diffusion treatment step,
The method can be carried out in the same manner as in the conventional method, except that a semiconductor porcelain body is disposed in the groove of the setter and heat treatment is performed using a grooved setter. The application of the grain boundary insulating agent and the like can be performed according to a conventional method. Further, the temperature, time and atmosphere of the heat treatment are the same as in the conventional case.

【００５５】[0055]

【実施例】以下に実施例及び比較例を挙げて本発明をよ
り具体的に説明する。The present invention will be described more specifically below with reference to examples and comparative examples.

【００５６】実施例１ 主成分のＳｒＴｉＯ₃ に、半導体化剤として五酸化ニオ
ブ（Ｎｂ₂ Ｏ₅ ）及び酸化タングステン（ＷＯ₃ ）を、
特性改善剤として炭酸マンガン（ＭｎＣＯ₃ ）及び酸化
銅（ＣｕＯ）を、焼結性改善剤としてＳｉＯ₂ 及びＡｌ
₂ Ｏ₃ を下記割合で秤量し、この原料配合物１００重量
部を純水２００重量部と共にボールミルで約２４時間湿
式混合粉砕した。Example 1 Niobium pentoxide (Nb ₂ O ₅ ) and tungsten oxide (WO ₃ ) as semiconducting agents were added to SrTiO ₃ as a main component.
Manganese carbonate (MnCO ₃ ) and copper oxide (CuO) were used as property improvers, and SiO ₂ and Al were used as sinterability improvers.
₂ O ₃ was weighed in the following ratio, and 100 parts by weight of the raw material mixture was wet-mixed and pulverized for about 24 hours with a ball mill together with 200 parts by weight of pure water.

【００５７】原料配合（モル％） ＳｉＴｉＯ₃ ：９８．６ Ｎｂ₂ Ｏ₃ ：０．２ ＷＯ₃ ：０．１ ＭｎＣＯ₃ ：０．０４ ＣｕＯ ：０．０６ ＳｉＯ₂ ：０．５ Ａｌ₂ Ｏ₃ ：０．５ 得られた混合物を１２０℃で２４時間乾燥後、乾燥物１
００重量部に対して、有機バインダであるＰＶＢ（ポリ
ビニールブチラール）を２．５重量部添加混合して成形
原料とし、これを約２ｔｏｎ／ｃｍ² の成型圧力で、直
径９ｍｍ，厚さ０．６ｍｍの円板状素地に成形した。こ
の素地を１０枚単位で積み重ねて耐火物セッター上に複
数配置し、１１５０℃で大気中焼成して脱脂した後、１
４３０℃の還元気流中（露点０℃にコントロールされた
Ｎ₂ ：Ｈ₂ ＝３：１（体積比）のＮ₂ 及びＨ₂ の混合雰
囲気）で４時間焼成することにより、直径７．５ｍｍ，
厚さ０．５ｍｍの円板状半導体磁器素地を得た。 Raw material composition (mol%) SiTiO ₃ : 98.6 Nb ₂ O ₃ : 0.2 WO ₃ : 0.1 MnCO ₃ : 0.04 CuO: 0.06 SiO ₂ : 0.5 Al ₂ O ₃ : 0.5 The obtained mixture was dried at 120 ° C for 24 hours, and then dried 1
To 2000 parts by weight, 2.5 parts by weight of PVB (polyvinyl butyral) as an organic binder was added and mixed to form a molding raw material, which was formed at a molding pressure of about ² ton / cm ² at a diameter of 9 mm and a thickness of 0.1 mm. It was formed into a 6 mm disk-shaped substrate. After stacking the bases in units of 10 sheets, arranging a plurality of the bases on a refractory setter, firing at 1150 ° C. in the air and degreased,
430 ° C. in a reducing gas stream by firing 4 hours (dew point 0 ℃ in controlled _{N 2:: H 2 = 3} 1 ( a mixed atmosphere of N ₂ and H ₂ in volume ratio)), a diameter of 7.5 mm,
A disk-shaped semiconductor ceramic body having a thickness of 0.5 mm was obtained.

【００５８】得られた素地の両円板主面上に、下記配合
の粒界絶縁化剤ペーストをスクリーン法で印刷した。On the main surfaces of both disks of the obtained substrate, a grain boundary insulating paste having the following composition was printed by a screen method.

【００５９】粒界絶縁化剤ペースト配合 Ｐｂ₃ Ｏ₄ ：４５重量％ ＭｎＯ₂ ：５重量％ Ｂｉ₂ Ｏ₃ ：４０重量％ ＣｕＯ ：５重量％ ガラス成分（Ｂ₂ Ｏ₃ 系ガラス）：５重量％ 有機ビヒクル剤（テルピネオール，樹脂ワニス）：Ｐｂ
₃ Ｏ₄ ，ＭｎＯ₂ ，Ｂｉ₂ Ｏ₃ ，ＣｕＯ及びガラス成分
の合計１００重量部に対して３０重量部 なお、粒界絶縁化剤ペーストは、塗布面が直径６．７ｍ
ｍの素地と同心円となるように印刷し、その塗布量は、
金属酸化物として８×１０^-5ｇ／ｍｍ² でほぼ一定とな
るように調節した。[0059] grain boundary insulated paste formulation Pb ₃ O _4: 45 wt% MnO _2: 5 wt% Bi ₂ O _3: 40 wt% CuO: 5 wt% glass component (B ₂ O ₃ based glass): 5 wt % Organic vehicle (terpineol, resin varnish): Pb
30 parts by weight based on 100 parts by weight of the total of ₃ O ₄ , MnO ₂ , Bi ₂ O ₃ , CuO and the glass component.
m so that it is concentric with the substrate,
The metal oxide was adjusted to be approximately constant at 8 × 10 ⁻⁵ g / mm ² .

【００６０】このようにして粒界絶縁化剤ペーストを塗
布した半導体磁器素地を、図１，２に示す如く、粒界絶
縁化剤と同じ金属酸化物を予めある程度吸収させたジル
コニア質セッター２０の板面に設けられた溝２１内に配
置し、これをアルミナ質の準密閉容器５内に収納して、
大気中、１１２０℃で４時間熱処理した。なお、セッタ
ー２０の溝２１の幅は１ｍｍ、深さは４ｍｍ、長さは８
ｍｍである。As shown in FIGS. 1 and 2, the semiconductor ceramic body coated with the grain boundary insulating agent paste is coated with a zirconia-based setter 20 in which the same metal oxide as the grain boundary insulating agent has been absorbed to some extent in advance. It is arranged in a groove 21 provided on the plate surface, and is housed in a semi-sealed container 5 made of alumina,
Heat treatment was performed in air at 1120 ° C. for 4 hours. The width of the groove 21 of the setter 20 is 1 mm, the depth is 4 mm, and the length is 8
mm.

【００６１】次に、得られた各素地の両板面に銀電極ペ
ーストをスクリーン印刷法で印刷し、これを８１０℃で
５分間焼き付けることにより直径６．７ｍｍの銀膜電極
を形成した。Next, a silver electrode paste was printed on both surfaces of each of the obtained substrates by a screen printing method, and baked at 810 ° C. for 5 minutes to form a silver film electrode having a diameter of 6.7 mm.

【００６２】この様にして得られた粒界絶縁型半導体磁
器コンデンサについて、静電容量Ｃ（ｐＦ）、誘電率ε
_s 、誘電体損失ｔａｎδ（％）、絶縁抵抗ＩＲ（Ｍ
Ω）、Ｃ・ＩＲ（Ｆ・Ω）、破壊電圧ＢＤＶ（Ｖ）を測
定した。試料数ｎ＝２００個の平均値を表１に示す。The thus obtained grain boundary insulated semiconductor ceramic capacitor has a capacitance C (pF), a dielectric constant ε
_s , dielectric loss tan δ (%), insulation resistance IR (M
Ω), C · IR (F · Ω), and breakdown voltage BDV (V). Table 1 shows the average value of the number of samples n = 200.

【００６３】なお、静電容量Ｃ（ｐＦ）、誘電率ε_s 及
び誘電体損失ｔａｎδ（％）は、ＬＣＲメーター（ＹＨ
Ｐ社 ４２７４Ａ）を用いて１ｋＨｚ、１Ｖ、２５℃の
条件で測定した。絶縁抵抗ＩＲ（ＭΩ）は、ＩＲメータ
ー（ＡＤＶＡＮＴＥＳＴ社Ｒ８３４０Ａ）を用いて直流
１６Ｖ、２０秒間印加、２５℃の条件下で測定した。破
壊電圧ＢＤＶ（Ｖ）は、耐圧試験器（ＫＩＫＵＳＵＩ
ＴＯＳ５０５１）を用いて測定した。The capacitance C (pF), the dielectric constant ε _s and the dielectric loss tan δ (%) were measured using an LCR meter (YH
The measurement was performed under the conditions of 1 kHz, 1 V, and 25 ° C. by using P Company 4274A). The insulation resistance IR (MΩ) was measured using an IR meter (ADVANTEST R8340A) under the conditions of DC 16 V, applied for 20 seconds, and 25 ° C. The breakdown voltage BDV (V) is determined by using a withstand voltage tester (KIKUSUI
TOS5051).

【００６４】また、各測定値のバラツキ（ＣＶ値
（％））については、測定試料数ｎ＝２００個に対して
次式より求めた。このＣＶ値（％）が大きいほど測定試
料間のバラツキが大きいと評価される。The variation (CV value (%)) of each measured value was obtained from the following equation for n = 200 measured samples. It is evaluated that the larger the CV value (%), the larger the variation between the measurement samples.

【００６５】 ＣＶ値（％）＝｛σ_n-1 ／平均値｝×１００ σ_n-1 ：標準偏差（ｎ＝２００） 実施例２ 実施例１において、粒界絶縁化剤ペーストを塗布した半
導体磁器素地を、図５，６に示す如く、２枚１組で重ね
合わせた状態で、粒界絶縁化剤と同じ金属酸化物を予め
ある程度吸収させたジルコニア質セッター４０の溝４１
内に配置して熱処理したこと以外は同様にして粒界絶縁
型半導体コンデンサを製造し、静電容量Ｃ（ｐＦ）、誘
電率ε_s 、誘電体損失ｔａｎδ（％）、絶縁抵抗ＩＲ
（ＭΩ）、Ｃ・ＩＲ（Ｆ・Ω）、破壊電圧ＢＤＶ（Ｖ）
等の測定結果を表１に示した。CV value (%) = {σ _n-1 / average value} × 100 σ _n-1 : standard deviation (n = 200) Example 2 In Example 1, a semiconductor coated with a grain boundary insulating paste. As shown in FIGS. 5 and 6, when the porcelain bodies are superimposed in pairs, the grooves 41 of the zirconia-based setter 40 in which the same metal oxide as the grain boundary insulating agent has been absorbed to some extent in advance.
In the same manner as above, except that the capacitor was placed and heat-treated, a grain boundary insulating semiconductor capacitor was manufactured, and the capacitance C (pF), the dielectric constant ε _s , the dielectric loss tan δ (%), and the insulation resistance IR
(MΩ), C · IR (F · Ω), Breakdown voltage BDV (V)
Table 1 shows the measurement results.

【００６６】なお、セッター４０の溝４１の幅は２ｍ
ｍ，深さは４ｍｍ、長さは８ｍｍ、セッターの傾斜角度
θは５°である。The width of the groove 41 of the setter 40 is 2 m.
m, the depth is 4 mm, the length is 8 mm, and the inclination angle θ of the setter is 5 °.

【００６７】実施例３ 実施例１において、粒界絶縁化剤ペーストを塗布した半
導体磁器素地を、図８に示す如く、２枚１組で重ね合わ
せた状態で、粒界絶縁化剤と同じ金属酸化物を予めある
程度吸収させたジルコニア質セッター６０の溝６１内に
配置して熱処理したこと以外は同様にして粒界絶縁型半
導体コンデンサを製造し、静電容量Ｃ（ｐＦ）、誘電率
ε_s 、誘電体損失ｔａｎδ（％）、絶縁抵抗ＩＲ（Ｍ
Ω）、Ｃ・ＩＲ（Ｆ・Ω）、破壊電圧ＢＤＶ（Ｖ）等の
測定結果を表１に示した。Example 3 In Example 1, the same semiconductor metal as the grain boundary insulating agent was used in a state where the semiconductor ceramic bodies coated with the grain boundary insulating agent paste were superposed in pairs as shown in FIG. A grain boundary insulated semiconductor capacitor was manufactured in the same manner as above except that it was placed in the groove 61 of the zirconia-based setter 60 in which the oxide was absorbed to some extent in advance and heat-treated, and the capacitance C (pF) and the dielectric constant ε _s , Dielectric loss tan δ (%), insulation resistance IR (M
Ω), C · IR (F · Ω), breakdown voltage BDV (V) and the like are shown in Table 1.

【００６８】なお、セッター４０の溝４１の幅は２ｍ
ｍ，深さは４ｍｍ、長さは５ｍｍ、セッターの傾斜角度
θは５°である。The width of the groove 41 of the setter 40 is 2 m.
m, the depth is 4 mm, the length is 5 mm, and the inclination angle θ of the setter is 5 °.

【００６９】比較例１ 実施例１において、粒界絶縁化剤ペーストを塗布した半
導体磁器素地を図１０，１１に示す如く、粒界絶縁化剤
と同じ金属酸化物を予めある程度吸収させたジルコニア
質セッター４上に１枚ずつ並べて配置して熱処理したこ
と以外は同様にして粒界絶縁型半導体磁器コンデンサを
製造し、静電容量Ｃ（ｐＦ）、誘電率ε_s 、誘電体損失
ｔａｎδ（％）、絶縁抵抗ＩＲ（ＭΩ）、Ｃ・ＩＲ（Ｆ
・Ω）、破壊電圧ＢＤＶ（Ｖ）等の測定結果を表１に示
した。Comparative Example 1 In Example 1, the porcelain semiconductor body coated with the grain boundary insulating agent paste was zirconia-based as previously shown in FIGS. A grain boundary insulated semiconductor ceramic capacitor was manufactured in the same manner except that the heat treatment was performed by arranging the capacitors one by one on the setter 4, and the capacitance C (pF), the dielectric constant ε _s , and the dielectric loss tan δ (%) , Insulation resistance IR (MΩ), C · IR (F
.OMEGA.) And the results of measurements such as breakdown voltage BDV (V) are shown in Table 1.

【００７０】比較例２ 実施例１において、粒界絶縁化剤ペーストを塗布した半
導体磁器素地を図１２，１３に示す如く、粒界絶縁化剤
と同じ金属酸化物を予めある程度吸収させたジルコニア
質セッター４上に４枚ずつ積層配置して熱処理したこと
以外は同様にして粒界絶縁型半導体磁器コンデンサを製
造し、静電容量Ｃ（ｐＦ）、誘電率ε_s、誘電体損失ｔ
ａｎδ（％）、絶縁抵抗ＩＲ（ＭΩ）、Ｃ・ＩＲ（Ｆ・
Ω）、破壊電圧ＢＤＶ（Ｖ）等の測定結果を表１に示し
た。COMPARATIVE EXAMPLE 2 As shown in FIGS. 12 and 13, a zirconia material obtained by applying the same metal oxide as the grain boundary insulating agent to the semiconductor ceramic body coated with the grain boundary insulating agent paste in Example 1 was used as shown in FIGS. A grain boundary insulated semiconductor ceramic capacitor was manufactured in the same manner except that heat treatment was performed by stacking four sheets each on the setter 4, and the capacitance C (pF), the dielectric constant ε _s , and the dielectric loss t
an δ (%), insulation resistance IR (MΩ), C · IR (F ·
Ω) and breakdown voltage BDV (V) are shown in Table 1.

【００７１】なお、表１には、実施例１，２，３及び比
較例２の生産効率を、比較例１における生産効率を１０
０とした場合の指数で併記した。Table 1 shows the production efficiencies of Examples 1, 2, 3 and Comparative Example 2 and the production efficiencies of Comparative Example 1 by 10
The index is shown together with the index when it is set to 0.

【００７２】[0072]

【表１】 [Table 1]

【００７３】表１より、次のことがわかる。即ち、セッ
ター上に半導体磁器素地を１枚ずつ並べて熱処理する比
較例１では、製品性能のバラツキは小さいが生産効率は
悪い。一方、セッター上に半導体磁器素地を４枚積層し
て熱処理する比較例２では、生産効率は比較的良いが、
製品性能のバラツキが非常に大きい。これに対して、セ
ッターの溝内に半導体磁器素地を立設して熱処理する実
施例１，２，３では製品性能のバラツキについては、比
較例１と同等の結果を得ることができ、しかも、生産効
率は比較例２の場合と同等以上である。従って、本発明
によれば、製品性能のバラツキの小さい粒界絶縁型半導
体磁器コンデンサを大量生産できることが明らかであ
る。Table 1 shows the following. That is, in Comparative Example 1 in which semiconductor ceramic bodies are arranged one by one on a setter and heat treatment is performed, the variation in product performance is small, but the production efficiency is poor. On the other hand, in Comparative Example 2 in which four semiconductor ceramic bodies were stacked on the setter and heat-treated, the production efficiency was relatively good,
Very large variation in product performance. On the other hand, in Examples 1, 2, and 3 in which a semiconductor ceramic body is erected in the groove of the setter and heat treatment is performed, the same result as in Comparative Example 1 can be obtained with respect to variation in product performance. The production efficiency is equal to or higher than that of Comparative Example 2. Therefore, according to the present invention, it is clear that a grain boundary insulated semiconductor ceramic capacitor with small variations in product performance can be mass-produced.

【００７４】[0074]

【発明の効果】以上詳述した通り、本発明の粒界絶縁型
半導体磁器コンデンサの製造方法によれば、半導体磁器
素地の結晶粒界部分への粒界絶縁化剤の熱拡散条件が均
一に制御され、製品性能のバラツキの小さい粒界絶縁型
半導体磁器コンデンサを一度に大量に製造することがで
きる。As described above in detail, according to the method for manufacturing a grain boundary insulated semiconductor ceramic capacitor of the present invention, the condition for thermally diffusing the grain boundary insulating agent into the crystal grain boundaries of the semiconductor ceramic body is uniform. A large number of grain boundary insulated semiconductor ceramic capacitors that are controlled and have small variations in product performance can be manufactured at once.

【００７５】従って、本発明によれば、製品の歩留まり
向上及び生産効率の向上による製造コストの低減が可能
となり、高品質の粒界絶縁型半導体磁器コンデンサを低
価格で提供することが可能となる。Therefore, according to the present invention, it is possible to reduce the production cost by improving the product yield and the production efficiency, and to provide a high-quality grain boundary insulated semiconductor ceramic capacitor at a low price. .

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の一実施例方法を示す斜視図である。FIG. 1 is a perspective view showing one embodiment of a method for manufacturing a grain boundary insulated semiconductor ceramic capacitor of the present invention.

【図２】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の一実施例方法を示す断面図である。FIG. 2 is a sectional view showing an embodiment of a method for manufacturing a grain boundary insulating semiconductor ceramic capacitor according to the present invention.

【図３】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の他の実施例方法を示す斜視図である。FIG. 3 is a perspective view showing another embodiment of a method for manufacturing a grain boundary insulating semiconductor ceramic capacitor according to the present invention.

【図４】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の他の実施例方法を示す断面図である。FIG. 4 is a sectional view showing another embodiment of a method for manufacturing a grain boundary insulated semiconductor ceramic capacitor according to the present invention.

【図５】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の異なる実施例方法を示す斜視図である。FIG. 5 is a perspective view showing a method of manufacturing a grain boundary insulating semiconductor ceramic capacitor according to another embodiment of the present invention.

【図６】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の異なる実施例方法を示す断面図である。FIG. 6 is a sectional view showing a method of manufacturing a grain boundary insulating semiconductor ceramic capacitor according to another embodiment of the present invention.

【図７】本発明の粒界絶縁型半導体磁器コンデンサの製
造方法の別の実施例方法を示す斜視図である。FIG. 7 is a perspective view showing another embodiment of a method for manufacturing a grain boundary insulating semiconductor ceramic capacitor according to the present invention.

【図８】図８（ａ）は本発明の粒界絶縁型半導体磁器コ
ンデンサの製造方法の更に別の実施例方法を示す斜視図
であり、図８（ｂ）は図８（ａ）のＢ−Ｂ線に沿う断面
の拡大図、図８（ｃ）は図８（ａ）のＣ−Ｃ線に沿う断
面の拡大図である。FIG. 8 (a) is a perspective view showing still another embodiment of the method for manufacturing a grain boundary insulated semiconductor ceramic capacitor of the present invention, and FIG. 8 (b) is a perspective view of FIG. 8 (a). FIG. 8C is an enlarged view of a cross section taken along the line C-C of FIG. 8A.

【図９】図９（ａ）は粒界絶縁化剤を塗布した半導体磁
器素地の斜視図、図９（ｂ）は同側面図である。FIG. 9A is a perspective view of a semiconductor ceramic body coated with a grain boundary insulating agent, and FIG. 9B is a side view of the same.

【図１０】従来の熱処理方法を説明する斜視図である。FIG. 10 is a perspective view illustrating a conventional heat treatment method.

【図１１】従来の熱処理方法を説明する断面図である。FIG. 11 is a cross-sectional view illustrating a conventional heat treatment method.

【図１２】従来の熱処理方法を説明する斜視図である。FIG. 12 is a perspective view illustrating a conventional heat treatment method.

【図１３】従来の熱処理方法を説明する断面図である。FIG. 13 is a cross-sectional view illustrating a conventional heat treatment method.

【図１４】従来の熱処理方法を説明する断面図である。FIG. 14 is a cross-sectional view illustrating a conventional heat treatment method.

【図１５】従来の熱処理方法を説明する断面図である。FIG. 15 is a cross-sectional view illustrating a conventional heat treatment method.

【図１６】従来の熱処理方法を説明する斜視図である。FIG. 16 is a perspective view illustrating a conventional heat treatment method.

【図１７】従来の熱処理方法を説明する断面図である。FIG. 17 is a cross-sectional view illustrating a conventional heat treatment method.

【符号の説明】[Explanation of symbols]

１ 半導体磁器素地 ２ 粒界絶縁化剤 ３ 粒界絶縁化剤を塗布した半導体磁器素地 ５ 準密閉容器 ２０，３０，４０，５０，６０ セッター ２１，３１，４１，５１，６１ 溝 ４２，５２，６２ 脚部 REFERENCE SIGNS LIST 1 semiconductor porcelain base 2 grain boundary insulating agent 3 semiconductor porcelain base coated with grain boundary insulating agent 5 semi-closed container 20, 30, 40, 50, 60 setter 21, 31, 41, 51, 61 groove 42, 52, 62 legs

Claims (6)

【特許請求の範囲】[Claims] 【請求項１】 円板状に成形された半導体磁器素地の板
面に粒界絶縁化剤を塗布した後、該半導体磁器素地をセ
ッターに載置して熱処理することにより、粒界絶縁化剤
を半導体磁器素地の結晶粒界部分に熱拡散させる粒界絶
縁型半導体磁器コンデンサの製造方法において、 該セッターの半導体磁器素地載置面に複数の溝を設け、 該溝内に、半導体磁器素地を立てた状態で１枚ずつ配置
して熱処理することを特徴とする粒界絶縁型半導体磁器
コンデンサの製造方法。1. A method of applying a grain boundary insulating agent to a disk-shaped semiconductor ceramic body after applying the grain boundary insulating agent to the plate surface, placing the semiconductor ceramic body on a setter and performing heat treatment. A plurality of grooves are provided on the semiconductor ceramic substrate mounting surface of the setter, and the semiconductor ceramic substrate is formed in the grooves. A method of manufacturing a grain boundary insulated semiconductor ceramic capacitor, comprising arranging one by one in a standing state and performing heat treatment. 【請求項２】 円板状に成形された半導体磁器素地の板
面に粒界絶縁化剤を塗布した後、該半導体磁器素地をセ
ッターに載置して熱処理することにより、粒界絶縁化剤
を半導体磁器素地の結晶粒界部分に熱拡散させる粒界絶
縁型半導体磁器コンデンサの製造方法において、 該セッターの半導体磁器素地載置面に複数の溝を設け、 該溝内に、２枚の半導体磁器素地をその板面同士を重ね
て１組としたものを立てた状態で１組ずつ配置して熱処
理することを特徴とする粒界絶縁型半導体磁器コンデン
サの製造方法。2. A method for applying a grain boundary insulating agent to a disk-shaped semiconductor ceramic body after applying a grain boundary insulating agent to the plate surface, placing the semiconductor ceramic body on a setter and performing heat treatment. A plurality of grooves are provided on the semiconductor ceramic substrate mounting surface of the setter, wherein two semiconductors are provided in the grooves. A method for manufacturing a grain boundary insulated semiconductor ceramic capacitor, comprising: arranging a set of porcelain bodies, each of which is made up of a pair of plate surfaces, and performing heat treatment. 【請求項３】 請求項１又は２において、前記セッター
の半導体磁器素地載置面を水平面に対して傾斜させるこ
とを特徴とする粒界絶縁型半導体磁器コンデンサの製造
方法。3. The method of manufacturing a grain boundary insulated semiconductor ceramic capacitor according to claim 1, wherein the semiconductor ceramic body mounting surface of the setter is inclined with respect to a horizontal plane. 【請求項４】 請求項３において、溝の長手方向は、セ
ッター板面の水平方向であることを特徴とする粒界絶縁
型半導体磁器コンデンサの製造方法。4. The method according to claim 3, wherein a longitudinal direction of the groove is a horizontal direction of a surface of the setter plate. 【請求項５】 請求項３において、溝の長手方向は、セ
ッター板面の最大傾斜方向とセッター板面の水平方向と
の間の方向であることを特徴とする粒界絶縁型半導体磁
器コンデンサの製造方法。5. The grain boundary insulated semiconductor ceramic capacitor according to claim 3, wherein the longitudinal direction of the groove is a direction between the maximum inclination direction of the setter plate surface and the horizontal direction of the setter plate surface. Production method. 【請求項６】 請求項１ないし５のいずれか１項におい
て、溝の長手方向の長さは半導体磁器素地の直径よりも
短いことを特徴とする粒界絶縁型半導体磁器コンデンサ
の製造方法。6. The method according to claim 1, wherein a length of the groove in a longitudinal direction is shorter than a diameter of the semiconductor ceramic body.