JPH0982882A - Multi-chip module - Google Patents
Multi-chip moduleInfo
- Publication number
- JPH0982882A JPH0982882A JP7241559A JP24155995A JPH0982882A JP H0982882 A JPH0982882 A JP H0982882A JP 7241559 A JP7241559 A JP 7241559A JP 24155995 A JP24155995 A JP 24155995A JP H0982882 A JPH0982882 A JP H0982882A
- Authority
- JP
- Japan
- Prior art keywords
- cover
- substrate
- chip
- semiconductor chip
- semiconductor chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、１枚の基板に複数
の半導体チップを搭載したマルチチップモジュールに関
し、特にそのカバーを用いた冷却構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip module in which a plurality of semiconductor chips are mounted on a single substrate, and more particularly to a cooling structure using its cover.
【０００２】[0002]
【従来の技術】従来のマルチチップモジュールは、図５
に示すように表面を下に向けた半導体チップ３を、バン
プ５で配線基板１に接続し、半導体チップ３と基板１と
の間を封止樹脂４で封止し、基板１の下面には外部接続
電極２が設けられている。半導体チップ３を覆うカバー
１７は周辺部で基板１に取付けられており、カバー１７
と半導体チップ３の裏面との間には両者に接する状態で
熱伝導性樹脂１４が配置されている。2. Description of the Related Art A conventional multi-chip module is shown in FIG.
As shown in FIG. 3, the semiconductor chip 3 with the front surface facing downward is connected to the wiring substrate 1 by the bumps 5, and the space between the semiconductor chip 3 and the substrate 1 is sealed with the sealing resin 4. The external connection electrode 2 is provided. The cover 17 that covers the semiconductor chip 3 is attached to the substrate 1 at the peripheral portion.
The heat conductive resin 14 is disposed between the semiconductor chip 3 and the back surface of the semiconductor chip 3 so as to be in contact with both of them.
【０００３】また図７に示す従来のマルチチップモジュ
ールでは、基板１に搭載された半導体チップ３の裏面に
ヒートスプレッダー１５が固着されている。さらに図８
に示す従来のマルチチップモジュールではヒートシンク
１６が半導体チップ３の裏面に固着されている構造にな
っている。In the conventional multi-chip module shown in FIG. 7, a heat spreader 15 is fixed to the back surface of the semiconductor chip 3 mounted on the substrate 1. Further FIG.
In the conventional multi-chip module shown in (1), the heat sink 16 is fixed to the back surface of the semiconductor chip 3.
【０００４】[0004]
【発明が解決しようとする課題】図５に示す従来のマル
チチップモジュールは、カバー６が周辺で基板１に固定
されているため、半導体チップ３が発熱して温度が上昇
すると熱膨張係数（ＣＴＥ）差により熱応力が基板１に
加わり、基板１に反りの変形が生じる。基板１及びカバ
ー１７は共に全長が４０ｍｍとし、基板１はガラエポ
（ガラスエポキシ）基板とし、カバー６はアルミからな
るものとする。ガラエポ基板の熱膨張係数は３０ｐｐ
ｍ、アルミの熱膨張係数は２０ｐｐｍなので、温度が６
０℃上昇した場合は、熱膨張により基板１が０．０７２
ｍｍ伸び、カバー１７が０．０４８ｍｍ伸びる。基板１
がカバー１７より０．０２４ｍｍ多く伸びる一方、基板
１の周辺がカバー１７に固定されているため、基板１は
熱膨張により反ることとなる。図５はこの反りにより基
板１の撓み量の計算を説明するための図である。図５で
は計算を簡単にするために、熱膨張によるカバー１７の
伸びは０と仮定し、基板１の伸びは０．０２４ｍｍ（カ
バー１７と基板１の伸びの差）とし、熱膨張後に基板１
の全長が４０．０２４ｍｍとなるものとして示してあ
る。図５において、二等辺三角形ＡＢＣの底辺ＡＢはカ
バー１７の長さを示し４０．０００ｍｍである。辺ＡＣ
と辺ＢＣは共に２０．０１２ｍｍとなる。二等辺三角形
ＡＢＣの高さＣＤ、すなわち熱膨張による基板１の撓み
量は計算により概略０．５ｍｍとなる。In the conventional multi-chip module shown in FIG. 5, since the cover 6 is fixed to the substrate 1 at the periphery, when the semiconductor chip 3 generates heat and the temperature rises, the coefficient of thermal expansion (CTE) is increased. The thermal stress is applied to the substrate 1 due to the difference, and the substrate 1 is warped and deformed. Both the substrate 1 and the cover 17 have a total length of 40 mm, the substrate 1 is a glass epoxy (glass epoxy) substrate, and the cover 6 is made of aluminum. Glass epoxy substrate has a thermal expansion coefficient of 30 pp
m, the coefficient of thermal expansion of aluminum is 20ppm, so the temperature is 6
When the temperature rises by 0 ° C., the substrate 1 is 0.072 due to thermal expansion.
mm, and the cover 17 extends 0.048 mm. Board 1
Is extended by 0.024 mm more than the cover 17, while the periphery of the substrate 1 is fixed to the cover 17, the substrate 1 is warped due to thermal expansion. FIG. 5 is a diagram for explaining the calculation of the bending amount of the substrate 1 due to this warp. In FIG. 5, in order to simplify the calculation, it is assumed that the expansion of the cover 17 due to thermal expansion is 0, the expansion of the substrate 1 is 0.024 mm (difference in expansion between the cover 17 and the substrate 1), and the substrate 1 is not expanded after thermal expansion.
Is shown as having a total length of 40.024 mm. In FIG. 5, the base AB of the isosceles triangle ABC indicates the length of the cover 17 and is 40.000 mm. Side AC
And the side BC are both 20.12 mm. The height CD of the isosceles triangle ABC, that is, the amount of bending of the substrate 1 due to thermal expansion is calculated to be approximately 0.5 mm.
【０００５】チップ３とカバー１７の間の熱伝導樹脂１
４の変形ではこの基板１の反りを吸収できず、チップ３
とカバー１７の間にすき間ができてしまい冷却性能が悪
化するという問題が発生しやすい。従来はこれを避ける
ためにカバー１７と基板１の熱膨張係数を一致させる必
要があり、材料選択上大きな制約となっていた。Thermal conductive resin 1 between the chip 3 and the cover 17
In the deformation of 4, the warp of the substrate 1 cannot be absorbed and the chip 3
A gap between the cover 17 and the cover 17 is likely to occur, and the cooling performance is likely to deteriorate. In the past, in order to avoid this, it was necessary to match the thermal expansion coefficients of the cover 17 and the substrate 1, which was a great limitation in material selection.
【０００６】また図７に示す従来のマルチチップモジュ
ールは半導体チップに固着するヒートスプレッダーのみ
で冷却するため十分な冷却能力が得られない。Further, the conventional multi-chip module shown in FIG. 7 cannot be cooled sufficiently because it is cooled only by the heat spreader fixed to the semiconductor chip.
【０００７】また図８に示す従来のマルチチップモジュ
ールは、半導体チップ３に個別のヒートシンク１６が取
付けられており、半導体チップ３でこのヒートシンク１
６を支えるために、半導体チップ３に過大な力が加わる
恐れがある。このためヒートシンク１６を大きくするこ
とも制約がある。また個別のヒートシンク１６が基板１
上に半導体チップ３の数だけ複数個並ぶため、互いに干
渉しないようにヒートシンク１６間に一定の距離を置く
必要があり、基板１上のスペースを冷却に有効に活用で
きない。さらに強制冷却の場合は空気流の流れを考慮し
てヒートシンク１６を並べる必要があり配置や形状に制
約が大きいという問題がある。In the conventional multi-chip module shown in FIG. 8, an individual heat sink 16 is attached to the semiconductor chip 3, and the heat sink 1 is attached to the semiconductor chip 3.
An excessive force may be applied to the semiconductor chip 3 to support the semiconductor chip 6. Therefore, there is a limitation in making the heat sink 16 large. In addition, the individual heat sink 16 is the substrate 1
Since a plurality of semiconductor chips 3 are arranged on the upper side, it is necessary to set a certain distance between the heat sinks 16 so as not to interfere with each other, and the space on the substrate 1 cannot be effectively used for cooling. Further, in the case of forced cooling, it is necessary to arrange the heat sinks 16 in consideration of the flow of the air flow, and there is a problem that the arrangement and the shape are largely restricted.
【０００８】[0008]
【課題を解決するための手段】本発明のマルチチップモ
ジュールは、基板上に搭載された複数の半導体チップを
覆うカバーと、このカバーの中央部を支持する前記基板
に固定されたカバー固定柱部と、前記カバーと前記半導
体チップとの間に配置された柔軟な熱伝導性樹脂とを備
えている。A multi-chip module of the present invention comprises a cover for covering a plurality of semiconductor chips mounted on a substrate, and a cover fixing column portion fixed to the substrate for supporting a central portion of the cover. And a flexible heat conductive resin disposed between the cover and the semiconductor chip.
【０００９】本発明のマルチチップモジュールは、カバ
ーは互いに間隔を有して並設された複数枚の平面板から
なり、この平面板のうち最も基板側のもののみが半導体
チップとの間に設けられた熱伝導性樹脂と接するように
もできる。In the multi-chip module of the present invention, the cover is composed of a plurality of flat plates arranged in parallel with a space between each other, and only the flat plate closest to the substrate is provided between the cover and the semiconductor chip. It can also be in contact with the heat conductive resin.
【００１０】本発明のマルチチップモジュールは、半導
体チップにヒートスプレッダーが固着され、熱伝導性樹
脂はカバーと前記ヒートスプレッダーとの間に配置され
るようにもできる。In the multi-chip module of the present invention, the heat spreader may be fixed to the semiconductor chip, and the heat conductive resin may be disposed between the cover and the heat spreader.
【００１１】[0011]
【発明の実施の形態】次に本発明について図面を参照し
て説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.
【００１２】図１は本発明の第１の実施の形態のマルチ
チップモジュールの縦断面図である。FIG. 1 is a vertical sectional view of a multi-chip module according to a first embodiment of the present invention.
【００１３】半導体チップ３がバンプ５で配線基板１に
フリップチップ実装されている。カバー６はカバー固定
柱部７によって基板１に固定される。本図ではカバー６
とカバー固定柱部７が分かれて２つの部材からなってい
るが、これらが一体化して一つの部材からなっていても
によい。カバー固定柱部７は、接着，螺合または基板１
に設けた穴への嵌合等により基板１に固定する。The semiconductor chip 3 is flip-chip mounted on the wiring board 1 with the bumps 5. The cover 6 is fixed to the substrate 1 by the cover fixing pillar portion 7. In this figure, cover 6
The cover fixing column portion 7 is divided into two members, but they may be integrated into one member. The cover fixing pillar portion 7 is bonded, screwed or the substrate 1
It is fixed to the substrate 1 by fitting it into the hole provided in the substrate 1.
【００１４】カバー６と半導体チップ３の間には、この
両者に接して熱伝導性樹脂１４が配置されている。半導
体チップ３から発生する熱は熱伝導性樹脂１４を介して
カバー６に伝わり、さらに空気中に放散される。熱伝導
性樹脂１４の材料としては、シリコン樹脂に熱伝導性の
良いフィラー（銀、アルミナ、ダイヤモンド、シリコン
カーバイド、ボロンナイトライド等）を分散させたコン
パウンド、銀エポキシ樹脂、シリコンラバーなどがあ
る。これらの材料は柔軟性に富み、半導体チップ３やカ
バー６の表面の凹凸、反りなどにもなじみやすい。基板
１の材料としてはガラスエポキシの他に、ポリイミドや
ＢＴレジン、紙フェノールなどの使用が可能である。ま
たカバー６の材料としてはアルミ、アルミ合金、銅など
がある。A heat conductive resin 14 is disposed between the cover 6 and the semiconductor chip 3 so as to contact them. The heat generated from the semiconductor chip 3 is transmitted to the cover 6 via the heat conductive resin 14 and further dissipated in the air. Examples of the material of the heat conductive resin 14 include compounds in which a filler having good heat conductivity (silver, alumina, diamond, silicon carbide, boron nitride, etc.) is dispersed in silicon resin, silver epoxy resin, silicon rubber and the like. These materials are highly flexible and easily adapt to unevenness and warpage of the surface of the semiconductor chip 3 and the cover 6. As the material of the substrate 1, besides glass epoxy, polyimide, BT resin, paper phenol or the like can be used. The material of the cover 6 includes aluminum, aluminum alloy, copper and the like.
【００１５】本形態では、カバー固定柱部７は基板１の
中央付近にあるためカバー６と基板１との熱膨張係数
（ＣＴＥ）差により基板１及びカバー６に発生する応力
を最小限にすることができる。従って半導体チップ３に
過大な応力を加えることなく良好な放熱特性を得ること
が出来る。本形態の基板等に熱膨張によって生じる応力
の減少効果をもう少し具体的に説明する。実施用環境に
おいてチップ３の温度は８５℃程度になり、常温よりの
温度上昇を６０℃とするとカバー６がアルミ（ＣＴＥ：
２０ｐｐｍ）の場合は常温時と比べ約０．１２％伸び、
基板１はガラエポ基板（ＣＴＥ：３０ｐｐｍ）の場合で
約０．２％伸びる。この両者の伸び率の違いが取付け構
造によっては大きな応力を引き起こすが、本形態ではカ
バー固定柱部７は基板１の中央付近にあるためカバー６
と基板１との熱膨張係数（ＣＴＥ）差により発生する応
力を最小限にすることができる。In this embodiment, since the cover fixing pillar portion 7 is located near the center of the substrate 1, the stress generated in the substrate 1 and the cover 6 due to the difference in coefficient of thermal expansion (CTE) between the cover 6 and the substrate 1 is minimized. be able to. Therefore, good heat dissipation characteristics can be obtained without applying excessive stress to the semiconductor chip 3. The effect of reducing the stress caused by the thermal expansion of the substrate or the like of this embodiment will be described more specifically. In the working environment, the temperature of the chip 3 is about 85 ° C., and if the temperature rise from room temperature is 60 ° C., the cover 6 is made of aluminum (CTE:
In the case of 20 ppm), it expands by about 0.12% compared to normal temperature,
Substrate 1 is about 0.2% elongated in the case of glass epoxy substrate (CTE: 30 ppm). Although the difference between the two elongation rates causes a large stress depending on the mounting structure, in the present embodiment, the cover fixing column portion 7 is located near the center of the substrate 1, so that the cover 6 is covered.
The stress caused by the difference in coefficient of thermal expansion (CTE) between the substrate 1 and the substrate 1 can be minimized.
【００１６】例えばカバー固定柱部７はアルミ（ＣＴ
Ｅ：２０ｐｐｍ）で、幅が３ｍｍとすると、上昇温度が
６０℃とすると、カバー固定柱７の幅方向の熱膨張によ
る伸びは約４μｍ程度であり、図５に示す従来のカバー
１６の伸びの４８μｍより非常に小さい。またカバー６
の周辺部は何物にも固定されておらずフリーのためこの
伸びによる応力はカバー６には発生しない。すなわちカ
バー６は水平方向に自由に伸長変形することができる。
従って、カバー６にも基板１にも熱膨張による反りは生
じない。チップ３とカバー６の間には柔軟な樹脂１４が
有り、温度によるカバー６の伸びは樹脂１４の変形もし
くはカバー６と樹脂１４の間の滑りにより吸収されチッ
プ３には応力は加わらない。つまりカバー６としてチッ
プ３や基板１と熱膨張係数の異なる材料を使用してもチ
ップ３に応力を発生させることはない。For example, the cover fixing pillar portion 7 is made of aluminum (CT
E: 20 ppm), the width is 3 mm, and the rising temperature is 60 ° C., the expansion due to the thermal expansion of the cover fixing column 7 in the width direction is about 4 μm, and the expansion of the conventional cover 16 shown in FIG. It is much smaller than 48 μm. Also cover 6
Since the peripheral portion of is not fixed to anything and is free, stress due to this elongation does not occur in the cover 6. That is, the cover 6 can be freely stretched and deformed in the horizontal direction.
Therefore, neither the cover 6 nor the substrate 1 is warped due to thermal expansion. There is a soft resin 14 between the chip 3 and the cover 6, and the expansion of the cover 6 due to the temperature is absorbed by the deformation of the resin 14 or the slip between the cover 6 and the resin 14, and no stress is applied to the chip 3. That is, even if a material having a different thermal expansion coefficient from that of the chip 3 or the substrate 1 is used as the cover 6, no stress is generated in the chip 3.
【００１７】また熱伝導性樹脂１４の材料として導電性
材料、カバーとして銅を選ぶことにより、半導体チップ
３の裏面を基板上の最低電位に接続することが出来る。
この場合カバー固定柱部７の接続部分の基板表面には最
低電位につながる導体パターンが形成されている。図５
に示す従来のフリップチップ構造では上述のような問題
点を避けるためカバー１７の材質に金属ではないものを
使用すると半導体チップ３の裏面と基板表面の導体層を
接続することが困難であった。ある種のＬＳＩにおいて
はチップ裏面を最低電位に落すことは安定動作上必要で
あり、本形態はそのための有力な手段である。By selecting a conductive material as the material of the heat conductive resin 14 and copper as the cover, the back surface of the semiconductor chip 3 can be connected to the lowest potential on the substrate.
In this case, a conductor pattern connected to the lowest potential is formed on the substrate surface of the connection portion of the cover fixing pillar portion 7. FIG.
In the conventional flip-chip structure shown in FIG. 2, it is difficult to connect the back surface of the semiconductor chip 3 and the conductor layer on the substrate surface when a material other than metal is used for the cover 17 in order to avoid the above problems. In a certain type of LSI, it is necessary to drop the back surface of the chip to the lowest potential for stable operation, and this embodiment is an effective means for that purpose.
【００１８】図２は本発明の第２の実施の形態のマルチ
チップモジュールの縦断面図である。FIG. 2 is a vertical sectional view of a multichip module according to a second embodiment of the present invention.
【００１９】半導体チップ３がバンプ５で配線基板１に
フリップチップ実装されており、その裏面にはヒートス
プレッダー１５が固着されている。カバー６はカバー固
定柱部７によって基板１に固定される。本形態ではカバ
ー６とカバー固定柱部７が一体化して一つの部材からな
っている。ヒートスプレッダー１５とカバー６の間に
は、この両者に接して熱伝導性樹脂１４が配置されてい
る。半導体チップ３から発生する熱流はヒートスプレッ
ダー１５によって広がり、熱伝導性樹脂１４を介してカ
バー６に伝わり、さらに空気中に放散される。半導体チ
ップ３の大きさが比較的小さくしかも発熱量が大きい場
合にはこのヒートスプレッダー１５が有効である。図１
に形態では熱伝導性樹脂１４がチップ裏面に直接接触し
ているのに対し、本形態ではヒートスプレッダー１５が
チップ３の裏面に固着している。ヒートスプレッダー１
５は熱伝導性樹脂１４と比べ熱抵抗は大幅に小さく、広
がりによる低熱抵抗化の効果が大きい。ヒートスプレッ
ダー１５の材料として、アルミニウム、アルミ合金、
銅、銅合金、銅タングステンなどの金属や、チッカアル
ミなどのセラミックスが使用できる。The semiconductor chip 3 is flip-chip mounted on the wiring board 1 with the bumps 5, and the heat spreader 15 is fixed to the back surface thereof. The cover 6 is fixed to the substrate 1 by the cover fixing pillar portion 7. In this embodiment, the cover 6 and the cover fixing pillar portion 7 are integrally formed of one member. A heat conductive resin 14 is arranged between the heat spreader 15 and the cover 6 so as to contact them. The heat flow generated from the semiconductor chip 3 is spread by the heat spreader 15, is transmitted to the cover 6 via the heat conductive resin 14, and is further dissipated in the air. The heat spreader 15 is effective when the size of the semiconductor chip 3 is relatively small and the amount of heat generated is large. FIG.
In the second embodiment, the heat conductive resin 14 is in direct contact with the back surface of the chip, whereas in this embodiment, the heat spreader 15 is fixed to the back surface of the chip 3. Heat spreader 1
The thermal resistance of No. 5 is much smaller than that of the heat conductive resin 14, and the effect of lowering the thermal resistance due to the spread is great. As the material of the heat spreader 15, aluminum, aluminum alloy,
Metals such as copper, copper alloys and copper tungsten, and ceramics such as ticker aluminum can be used.
【００２０】また、本形態と図７の従来のマルチチップ
モジュールとを比べると、従来のものの冷却構造がヒー
トスプレッダー１５のみなのに対し本形態ではカバー６
が熱伝導性樹脂１４を介してヒートスプレッダー１５に
接触しており、これによる放熱面積の拡大により放熱能
力が大幅に増大していることがわかる。しかもカバー６
に接触で不要な応力が発生しないことは図１に示す形態
と同じである。Further, comparing this embodiment with the conventional multi-chip module of FIG. 7, the cooling structure of the conventional one is only the heat spreader 15, whereas in this embodiment the cover 6 is used.
Are in contact with the heat spreader 15 via the heat conductive resin 14, and it is understood that the heat dissipation capacity is greatly increased due to the expansion of the heat dissipation area. Moreover, the cover 6
As in the embodiment shown in FIG. 1, no unnecessary stress is generated by the contact with.
【００２１】またヒートスプレッダー１５として、チッ
カアルミを用いることによりこれが電気的絶縁物なの
で、図１の形態と異なりチップ裏面をカバー６から電気
的に絶縁することができる。これは例えばカバー６を接
地し、チップ３の裏面をＶｃｃ電源などに接続する場合
に有効である。Since the heat spreader 15 is made of ticker aluminum and is an electrical insulator, the back surface of the chip can be electrically insulated from the cover 6 unlike the configuration of FIG. This is effective, for example, when the cover 6 is grounded and the back surface of the chip 3 is connected to a Vcc power source or the like.
【００２２】図３（ａ）及び（ｂ）はそれぞれ本発明の
第３の実施の形態マルチチップモジュールの縦断面図及
び平面図である。FIGS. 3A and 3B are a vertical sectional view and a plan view, respectively, of a multichip module according to a third embodiment of the present invention.
【００２３】半導体チップ３がバンプ５で配線基板１に
フリップチップ実装されている。カバー６はカバー固定
柱部７によって基板１に固定される。カバー６はカバー
固定柱部７を軸として複数段の金属板が平行して並んで
設けられたもので放熱用のフィン構造になっている。こ
の金属板は円形状で基板１に取り付ける際に取り付け向
きに依存しない構造になっている。カバー６の最下段の
金属板は熱伝導性樹脂１４を介して半導体チップ３に接
している。半導体チップ３から発生する熱は熱伝導性樹
脂１４を介してカバー６に伝わり、さらに空気中に放散
される。本実施例の構造をとることにより、半導体チッ
プ３からの熱は効率良く空気中に放熱される。カバー６
の材料としてはアルミ、アルミ合金、銅などがある。本
形態では半導体チップ３に固着するヒートスプレッダー
を示していないが、もちろん図２のように半導体チップ
３に固着するヒートスプレッダーがある構造でもかまわ
ない。The semiconductor chip 3 is flip-chip mounted on the wiring board 1 with the bumps 5. The cover 6 is fixed to the substrate 1 by the cover fixing pillar portion 7. The cover 6 has a plurality of stages of metal plates arranged in parallel with the cover fixing column portion 7 as an axis and has a fin structure for heat dissipation. This metal plate is circular and has a structure that does not depend on the mounting direction when mounted on the substrate 1. The lowermost metal plate of the cover 6 is in contact with the semiconductor chip 3 via the heat conductive resin 14. The heat generated from the semiconductor chip 3 is transmitted to the cover 6 via the heat conductive resin 14 and further dissipated in the air. With the structure of this embodiment, the heat from the semiconductor chip 3 is efficiently dissipated into the air. Cover 6
Examples of materials include aluminum, aluminum alloys, and copper. Although the heat spreader fixed to the semiconductor chip 3 is not shown in the present embodiment, it goes without saying that a structure having a heat spreader fixed to the semiconductor chip 3 may be used as shown in FIG.
【００２４】本形態はカバー６が基板１上の複数の半導
体チップ３に一括して接触する構造なので基板１上のス
ペース全体をヒートシンクとして利用でき、効率良く冷
却することができる。また全体が一つのヒートシンクと
なっているため空気流の乱れも発生しにくい。さらにカ
バー６の重量を半導体チップ３で支えるのではなく、カ
バー固定柱部７で支える構造であり半導体チップ３には
不要な力が加わらない。In this embodiment, since the cover 6 is in contact with the plurality of semiconductor chips 3 on the substrate 1 at a time, the entire space on the substrate 1 can be used as a heat sink and can be cooled efficiently. Moreover, since the whole is a single heat sink, turbulence of the air flow is unlikely to occur. Further, the weight of the cover 6 is not supported by the semiconductor chip 3, but is supported by the cover fixing column portion 7, so that unnecessary force is not applied to the semiconductor chip 3.
【００２５】図４は本発明の第４の実施の形態の平面
図、５個の半導体チップ３がバンプで配線基板１にフリ
ップチップ実装されている。１つの半導体チップ３が基
板１及びカバー６の中央に配置され、この中央の半導体
チップ３の周囲に４つのカバー固定柱部７が設けられて
いる。FIG. 4 is a plan view of the fourth embodiment of the present invention, and five semiconductor chips 3 are flip-chip mounted on the wiring board 1 by bumps. One semiconductor chip 3 is arranged in the center of the substrate 1 and the cover 6, and four cover fixing pillar portions 7 are provided around the center semiconductor chip 3.
【００２６】[0026]
【発明の効果】以上説明したように、本発明のマルチチ
ップモジュールは、平面板状のカバーをカバー固定柱部
のみで基板と接合し、基板に実装された半導体チップと
は熱伝導性樹脂を介して接触する構造としたので、従来
のマルチチップモジュールのようにカバーと基板との熱
膨張係数差による基板及びカバーの反りの変形がなく半
導体チップとカバーの間のすき間の発生を防止し、効率
よく半導体チップの冷却を行えるという効果を有する。
またカバーを基板上の複数個の半導体チップに一括して
接触させることにより、単純な構造でかつ無駄なスペー
スがなくせるため効率良く冷却することができる。さら
にカバーを複数枚の平面板を平行して並べるヒートシン
ク構造とすることにより、冷却性能を向上させることが
できる。As described above, according to the multi-chip module of the present invention, the flat plate-like cover is joined to the substrate only by the cover fixing column portion, and the semiconductor chip mounted on the substrate is made of the heat conductive resin. Since it has a structure in which the cover and the substrate are in contact with each other, unlike the conventional multi-chip module, there is no deformation of the warp of the substrate and the cover due to the difference in thermal expansion coefficient between the cover and the substrate, and the occurrence of a gap between the semiconductor chip and the cover is prevented, This has the effect of efficiently cooling the semiconductor chip.
Further, since the cover is brought into contact with a plurality of semiconductor chips on the substrate all at once, a simple structure and a useless space can be eliminated, so that the cooling can be efficiently performed. Further, the cooling performance can be improved by providing the cover with a heat sink structure in which a plurality of flat plates are arranged in parallel.
【図１】本発明の第１の実施の形態のマルチチップモジ
ュールの縦断面図である。FIG. 1 is a vertical sectional view of a multi-chip module according to a first embodiment of the present invention.
【図２】本発明の第２の実施の形態のマルチチップモジ
ュールの縦断面図である。FIG. 2 is a vertical sectional view of a multichip module according to a second embodiment of the present invention.
【図３】（ａ）及び（ｂ）はそれぞれ本発明の第３の実
施の形態のマルチチップモジュールの縦断面図及び平面
図である。3A and 3B are a vertical cross-sectional view and a plan view, respectively, of a multi-chip module according to a third embodiment of the present invention.
【図４】本発明の第４の実施の形態のマルチチップモジ
ュールの平面図である。FIG. 4 is a plan view of a multi-chip module according to a fourth embodiment of the present invention.
【図５】従来のマルチチップモジュールの縦断面図であ
る。FIG. 5 is a vertical sectional view of a conventional multi-chip module.
【図６】図５に示す従来のマルチチップモジュールの基
板１の変形量の計算を説明するための図である。FIG. 6 is a diagram for explaining calculation of a deformation amount of the substrate 1 of the conventional multi-chip module shown in FIG.
【図７】従来の他のマルチチップモジュールの縦断面図
である。FIG. 7 is a vertical cross-sectional view of another conventional multi-chip module.
【図８】従来のさらに他のマルチチップモジュールの縦
断面図である。FIG. 8 is a vertical cross-sectional view of still another conventional multi-chip module.
１ 基板 ２ 外部接続電極 ３ 半導体チップ ４ 封止樹脂 ５ バンプ ６ カバー ７ カバー固定柱部 １４ 熱伝導性樹脂 １５ ヒートスプレッダー １６ ヒートシンク １７ カバー 1 Substrate 2 External Connection Electrode 3 Semiconductor Chip 4 Sealing Resin 5 Bump 6 Cover 7 Cover Fixing Column 14 Thermal Conductive Resin 15 Heat Spreader 16 Heat Sink 17 Cover
Claims (5)
を覆うカバーと、このカバーの中央部を支持する前記基
板に固定されたカバー固定柱部と、前記カバーと前記半
導体チップとの間に配置された柔軟な熱伝導性樹脂とを
含むことを特徴とするマルチチップモジュール。1. A cover for covering a plurality of semiconductor chips mounted on a substrate image, a cover fixing pillar portion fixed to the substrate for supporting a central portion of the cover, and a space between the cover and the semiconductor chip. A multi-chip module including a flexible heat conductive resin arranged.
複数枚の平面板からなり、この平面板のうち最も基板側
のもののみが半導体チップとの間に設けられた熱伝導性
樹脂と接することを特徴とする請求項１記載のマルチチ
ップモジュール。2. The heat conductive resin in which the cover is composed of a plurality of plane plates arranged in parallel with a space between each other, and only the plane plate closest to the substrate is provided between the cover and the semiconductor chip. The multi-chip module according to claim 1, wherein the multi-chip module is in contact with.
着され、熱伝導性樹脂はカバーと前記ヒートスプレッダ
ーとの間に配置されたことを特徴とする請求項１又は２
記載のマルチチップモジュール。3. The heat spreader is fixed to the semiconductor chip, and the heat conductive resin is arranged between the cover and the heat spreader.
The described multi-chip module.
だけ設けられたことを特徴とする請求項１又は３記載の
マルチチップモジュール。4. The multi-chip module according to claim 1, wherein only one cover fixing pillar portion is provided in the center of the cover.
置する半導体チップの周囲に複数本が設けられたことを
特徴とする請求項１又は３記載のマルチチップモジュー
ル。5. The multi-chip module according to claim 1, wherein a plurality of cover fixing pillar portions are provided around a semiconductor chip located in a central portion of the cover.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7241559A JPH0982882A (en) | 1995-09-20 | 1995-09-20 | Multi-chip module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7241559A JPH0982882A (en) | 1995-09-20 | 1995-09-20 | Multi-chip module |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0982882A true JPH0982882A (en) | 1997-03-28 |
Family
ID=17076156
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7241559A Pending JPH0982882A (en) | 1995-09-20 | 1995-09-20 | Multi-chip module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0982882A (en) |
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| JP2002542626A (en) * | 1999-04-20 | 2002-12-10 | タイコ・エレクトロニクス・コーポレイション | Dissipation of heat from circuit boards with bare silicon chips |
| JP2003060523A (en) * | 2001-08-09 | 2003-02-28 | Tdk Corp | Radio communication module |
| EP1198005A4 (en) * | 1999-03-26 | 2004-11-24 | Hitachi Ltd | Semiconductor module and method of mounting |
| US6940162B2 (en) | 1999-03-26 | 2005-09-06 | Renesas Technology Corp. | Semiconductor module and mounting method for same |
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| US6940162B2 (en) | 1999-03-26 | 2005-09-06 | Renesas Technology Corp. | Semiconductor module and mounting method for same |
| JP2002542626A (en) * | 1999-04-20 | 2002-12-10 | タイコ・エレクトロニクス・コーポレイション | Dissipation of heat from circuit boards with bare silicon chips |
| JP2003060523A (en) * | 2001-08-09 | 2003-02-28 | Tdk Corp | Radio communication module |
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| JP2009283958A (en) * | 2005-04-19 | 2009-12-03 | Renesas Technology Corp | Semiconductor device |
| US9496153B2 (en) | 2005-04-19 | 2016-11-15 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing the same |
| JP2008235369A (en) * | 2007-03-16 | 2008-10-02 | Fujitsu Ltd | Semiconductor device |
| US9059145B2 (en) | 2011-08-25 | 2015-06-16 | Toyota Jidosha Kabushiki Kaisha | Power module, method for manufacturing power module, and molding die |
| CN103066027A (en) * | 2011-08-25 | 2013-04-24 | 丰田自动车株式会社 | Power module, method for manufacturing power module, and molding die |
| CN104716109A (en) * | 2013-12-11 | 2015-06-17 | 台湾积体电路制造股份有限公司 | Packages with Thermal Management Features for Reduced Thermal Crosstalk and Methods of Forming Same |
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