JPH0954341A - Active matrix type liquid crystal display element - Google Patents

Active matrix type liquid crystal display element

Info

Publication number
JPH0954341A
JPH0954341A JP20881195A JP20881195A JPH0954341A JP H0954341 A JPH0954341 A JP H0954341A JP 20881195 A JP20881195 A JP 20881195A JP 20881195 A JP20881195 A JP 20881195A JP H0954341 A JPH0954341 A JP H0954341A
Authority
JP
Japan
Prior art keywords
sub
liquid crystal
electrodes
electrode
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20881195A
Other languages
Japanese (ja)
Inventor
Satoshi Asada
智 浅田
Mitsuhiro Uno
光宏 宇野
Yoneji Takubo
米治 田窪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP20881195A priority Critical patent/JPH0954341A/en
Publication of JPH0954341A publication Critical patent/JPH0954341A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy

Landscapes

  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

PROBLEM TO BE SOLVED: To assure the image display having high quality by suppressing the difference in the luminance arising between divided exposure regions by a simple structure. SOLUTION: This active matrix type liquid crystal display element is provided with pixel electrodes and switching elements for impressing driving voltages thereon so as to correspond to the respective intersected points of plural signal wirings and plural scanning wirings arranged in a matrix form. The pixel electrodes are divided to plural sub-pixel electrodes including sub-pixel electrodes 2a directly connected to the switching elements and sub-pixel electrodes 2b connected to the switching elements via control capacitors 9a. These control capacitors 9a are formed of rectangular parts of a specified width formed in part of the sub-pixel electrodes 2b and control capacitor electrodes 8d of a rectangular shape of a specified width facing these electrodes via insulating layers so as to intersect therewith. Even if the overlap parts of the two electrodes of the rectangular shape deviate within the prescribed range, the area of the overlap parts does not change.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、ＡＶ・ＯＡ機器な
どの平面ディスプレイとして用いることのできる液晶表
示素子のアクティブマトリックス型液晶表示素子に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display element of a liquid crystal display element which can be used as a flat panel display for AV / OA equipment and the like.

【０００２】[0002]

【従来の技術】現在、液晶を用いた表示素子は、ビデオ
カメラのビューファインダーやポケットＴＶさらには高
精細投写型ＴＶ、パソコン、ワープロなどの情報表示端
末など種々の分野で応用されてきており、開発、商品化
が活発に行われている。その中で代表的なものとしてア
クティブマトリックス型の液晶表示素子があり、カラー
化、高画質化が実現できることから非常に注目されてい
る。これは、マトリックス上に配置されたそれぞれの画
素電極にスイッチ素子が設けられた構造を有し、それら
のスイッチ素子を介して各画素電極に液晶の光学特性を
制御する電気信号が独立に供給される。スイッチング素
子としては、薄膜トランジスタ（ＴＦＴ）を用いたもの
が主流である。2. Description of the Related Art At present, liquid crystal display devices have been applied in various fields such as viewfinders of video cameras, pocket TVs, high-definition projection TVs, personal computers, and information display terminals such as word processors. Development and commercialization are actively carried out. Among them, an active matrix type liquid crystal display device is a typical one, and it has been drawing much attention because it can realize colorization and high image quality. This has a structure in which a switch element is provided on each pixel electrode arranged on a matrix, and an electric signal for controlling the optical characteristics of the liquid crystal is independently supplied to each pixel electrode via these switch elements. It A switching element using a thin film transistor (TFT) is the mainstream.

【０００３】このアクティブマトリックス型の方式は大
容量の表示を行っても高いコントラストが保たれるとい
う大きな特徴を有し、特に近年市場ニーズの高いノート
パソコンやラップトップパソコン、さらには、エンジニ
アリングワークステーション用の大型・大容量フルカラ
ーディスプレイの本命として開発、商品化が盛んであ
る。This active matrix type system has a great feature that a high contrast is maintained even when a large capacity display is carried out. Particularly, a notebook computer, a laptop computer, and an engineering workstation, which have recently been in high demand in the market. As a favorite of large-sized, large-capacity full-color displays for consumer use, it is actively developed and commercialized.

【０００４】この様なアクティブマトリックス方式の液
晶表示素子において、広く用いられている液晶表示モー
ドに、ＴＮ（Twisted Nematic）方式のＮＷ（Normally
White）モードがある。ＴＮ方式は液晶層を狭持する
基板間で液晶分子が９０゜捻れた構造をとるパネルを２
枚の偏光板によりはさんだものである。ＮＷモードにお
いては２枚の偏光板は互いの偏光軸方向が直交し、一方
の偏光板はその偏光軸が一方の基板に接している液晶分
子の長軸方向と平行か垂直になるように配置されている
ものである。この場合、電圧が印加されない状態、また
は、印加されてもしきい値電圧以下のときに白表示であ
り、しきい値より高い電圧を印加していくと、徐々に光
透過率が低下して黒表示となる。In such an active matrix type liquid crystal display device, a TN (Twisted Nematic) type NW (Normally) liquid crystal display mode is widely used.
White) mode. The TN method uses two panels that have a structure in which liquid crystal molecules are twisted 90 ° between substrates that sandwich a liquid crystal layer.
It depends on the number of polarizing plates. In the NW mode, the two polarizing plates are arranged such that their polarizing axis directions are orthogonal to each other, and one polarizing plate has its polarizing axis parallel or perpendicular to the long axis direction of the liquid crystal molecules in contact with one substrate. It has been done. In this case, white is displayed when no voltage is applied or when the voltage is less than or equal to the threshold voltage even if applied, and when a voltage higher than the threshold is applied, the light transmittance gradually decreases and black Will be displayed.

【０００５】このような表示特性が得られるのは、液晶
パネルに電圧を印加すると液晶分子は捻れ構造をほどき
ながら電界の向きに配列しようとし、この分子の配列状
態により、パネルを透過してくる光の偏光状態が変わ
り、光の透過率が変調されるからである。しかし同じ分
子配列状態でも、液晶パネルに入射してくる光の入射方
向によって透過光の偏光状態は変化するので、入射方向
に対応して光の透過率は異なってくる。すなわち、液晶
パネルは視角依存性を有する。Such display characteristics are obtained because when a voltage is applied to the liquid crystal panel, the liquid crystal molecules try to align in the direction of the electric field while unwinding the twisted structure, and the molecules pass through the panel depending on the alignment state. This is because the polarization state of incoming light changes and the light transmittance is modulated. However, even in the same molecular arrangement state, the polarization state of the transmitted light changes depending on the incident direction of the light incident on the liquid crystal panel, so that the light transmittance varies depending on the incident direction. That is, the liquid crystal panel has a viewing angle dependency.

【０００６】この視角依存性に起因して、主視角方向
（液晶層の中間層における液晶分子の長軸方向）に対し
て視点を斜めに傾けると輝度の逆転現象が引き起こされ
る。この表示モードの場合、輝度の逆転現象は、ある電
圧における輝度がそれより低い電圧における輝度より明
るくなる現象を意味する。特に黒表示のために高電圧を
印加したときの輝度逆転現象は、液晶パネルの画質上、
重要な課題となっている。Due to this viewing angle dependence, when the viewpoint is tilted obliquely with respect to the main viewing angle direction (the long axis direction of the liquid crystal molecules in the intermediate layer of the liquid crystal layer), the phenomenon of brightness inversion occurs. In this display mode, the brightness reversal phenomenon means that the brightness at a certain voltage becomes brighter than the brightness at a lower voltage. In particular, the brightness reversal phenomenon when a high voltage is applied for black display is due to the image quality of the liquid crystal panel.
It is an important issue.

【０００７】この課題を解決するために、一つの画素電
極を複数の副画素に分割し、各副画素によって液晶層に
印加される電圧を各副画素間に備えられた制御容量によ
って変化させることによって、広い視野角で良好な多諧
調表示をさせ視角特性を改善する方法（以下、画素分割
法という）が提案されている。この画素分割法の原理
を、代表的な画素分割構成の等価回路である図４に基づ
いて簡単に説明する。図に示すように画素は二つの副画
素に分割され、一方の副画素１（Ｃｌｃ１）はＴＦＴの
ドレイン電極（Ｄ）に直接接続されている。他方の副画
素２（Ｃｌｃ２）は制御容量（Ｃｃｏｎ）を介してドレ
イン電極（Ｄ）に接続されている。In order to solve this problem, one pixel electrode is divided into a plurality of subpixels, and the voltage applied to the liquid crystal layer by each subpixel is changed by the control capacitance provided between the subpixels. Has proposed a method (hereinafter, referred to as a pixel division method) for improving a viewing angle characteristic by performing a good multi-tone display in a wide viewing angle. The principle of this pixel division method will be briefly described with reference to FIG. 4, which is an equivalent circuit of a typical pixel division configuration. As shown in the figure, the pixel is divided into two sub-pixels, and one sub-pixel 1 (Clc1) is directly connected to the drain electrode (D) of the TFT. The other sub-pixel 2 (Clc2) is connected to the drain electrode (D) via the control capacitor (Ccon).

【０００８】したがって、ＴＦＴを介して副画素１に印
加される駆動電圧Ｖｌｃ１はＴＦＴのドレイン電圧（Ｖ
ｄ）に等しいが、副画素２に印加される駆動電圧Ｖｌｃ
２はパルス電圧であるドレイン電圧（Ｖｄ）を副画素２
の容量Ｃｌｃ２と制御容量Ｃｃｏｎとで分圧したものと
なる。つまり、次式（数１および数２）の関係が成り立
つ。Therefore, the driving voltage Vlc1 applied to the sub-pixel 1 through the TFT is the drain voltage (V
drive voltage Vlc that is equal to d) but is applied to subpixel 2
2 is a drain voltage (Vd) which is a pulse voltage
The voltage is divided by the capacity Clc2 and the control capacity Ccon. That is, the relationship of the following expressions (Equation 1 and Equation 2) is established.

【０００９】[0009]

【数１】 Ｖｌｃ１＝Ｖｄ## EQU00001 ## Vlc1 = Vd

【００１０】[0010]

【数２】 Ｖｌｃ２＝Ｖｄ×Ｃｃｏｎ／（Ｃｌｃ２
＋Ｃｃｏｎ） ２つの式から明らかなように、Ｖｌｃ１＞Ｖｌｃ２とな
る。よって、主視角方向から３０゜ずれた方向における
輝度対駆動電圧特性は、図５に示すように、副画素２の
特性が副画素１の特性に対して高電圧側にシフトする結
果、両画素の合成特性については、それぞれの副画素の
輝度反転部の山と谷とが打ち消しあって輝度反転現象が
なくなる。このようにして、画素分割法による液晶表示
素子の視野角特性の改善が達成される。## EQU00002 ## Vlc2 = Vd.times.Ccon / (Clc2
+ Ccon) As apparent from the two equations, Vlc1> Vlc2. Therefore, as shown in FIG. 5, the luminance-driving voltage characteristic in the direction deviated from the main viewing angle direction by 30 ° shifts the characteristic of the sub-pixel 2 from the characteristic of the sub-pixel 1 to the high voltage side, and as a result, With respect to the composite characteristic of, the peaks and valleys of the luminance inversion portion of each sub-pixel cancel each other out, and the luminance inversion phenomenon disappears. In this way, the viewing angle characteristic of the liquid crystal display element is improved by the pixel division method.

【００１１】この画素分割法を用いた従来の液晶表示素
子に用いられている薄膜トランジスタ基板の構成を図６
（ａ）および（ｂ）に示す。図６（ａ）は平面構成図で
あり、図６（ｂ）はそのＢ−Ｂ’断面図である。図に示
すように、複数の走査線（ゲート線）１６と複数の信号
線（ソース線）１７の各交差点に対応して、二つの副画
素電極２ａ，２ｂと薄膜トランジスタ（ＴＦＴ）とが形
成されている。副画素電極２ｂと制御容量電極２０との
対向する部分には制御容量１９が形成されている。図６
（ｂ）において、４はゲート絶縁膜として働く第１絶縁
体層であり、６は第２絶縁体層である。そして液晶分子
を所定の方向に配列させるため、このアレイ基板１と、
透明電極膜１１及び遮光帯１２が積層された対向基板１
３とに配向膜を塗布した後、ラビング処理を施す。この
二枚の基板を数μｍのギャップを保つように貼り合わ
せ、その間に液晶を注入する。作製した液晶セルの両外
側面に偏光板を一枚づつ貼り、一方の面にバックライト
用光源を配置して液晶表示素子が構成される。FIG. 6 shows the structure of a thin film transistor substrate used in a conventional liquid crystal display device using this pixel division method.
Shown in (a) and (b). FIG. 6A is a plan configuration diagram, and FIG. 6B is a BB ′ sectional view thereof. As shown in the figure, two sub-pixel electrodes 2a and 2b and a thin film transistor (TFT) are formed corresponding to each intersection of a plurality of scanning lines (gate lines) 16 and a plurality of signal lines (source lines) 17. ing. A control capacitor 19 is formed in a portion where the subpixel electrode 2b and the control capacitor electrode 20 face each other. Figure 6
In (b), 4 is a first insulator layer that functions as a gate insulating film, and 6 is a second insulator layer. In order to arrange the liquid crystal molecules in a predetermined direction, the array substrate 1
Opposed substrate 1 in which transparent electrode film 11 and light-shielding band 12 are laminated
After applying the alignment film to 3 and 3, rubbing treatment is performed. The two substrates are bonded to each other with a gap of several μm kept therebetween, and liquid crystal is injected between them. A polarizing plate is attached to each of both outer surfaces of the produced liquid crystal cell, and a light source for a backlight is arranged on one surface to form a liquid crystal display element.

【００１２】[0012]

【発明が解決しようとする課題】上記トランジスタアレ
イ基板の作製において各薄膜毎にパターニングを行う
際、まず薄膜をスパッタ法やＣＶＤ法により基板一面に
積層させ、その上にフォトレジストを一面に塗布した
後、パターンマスクを介して露光を行う。そして光が当
たった部分のレジストを除去する現像液に浸した後に、
レジストが除去され露出した部分の薄膜をエッチングす
ることによってパターニングを行う。When patterning each thin film in the production of the above transistor array substrate, first, the thin films are laminated on one surface of the substrate by a sputtering method or a CVD method, and a photoresist is applied on one surface of the thin film. After that, exposure is performed through a pattern mask. Then, after immersing in a developing solution that removes the resist in the exposed area,
Patterning is performed by etching the thin film in the exposed portion after the resist is removed.

【００１３】このような露光工程において、表示画面の
大きさによっては一度に露光を行わず、図７に示すよう
に、複数のブロックに分割して露光を行う場合がある。
このとき、パターンマスクとアレイガラス基板との相対
位置が、ある誤差範囲内でずれることがある。この場
合、隣合う分割露光領域において各々の制御容量電極と
副画素電極との重なり面積、ひいては制御容量の大きさ
が異なってしまう。その結果、式（数２）から求まる副
画素電極に印加される電圧Ｖｌｃ２が分割露光領域間で
異なってしまい、分割露光領域間で輝度差が生じる。In such an exposure process, depending on the size of the display screen, the exposure may not be performed at once, but may be divided into a plurality of blocks to perform the exposure as shown in FIG.
At this time, the relative position between the pattern mask and the array glass substrate may shift within a certain error range. In this case, the overlapping area of each control capacitance electrode and the sub-pixel electrode, and hence the size of the control capacitance, are different in the adjacent divided exposure regions. As a result, the voltage Vlc2 applied to the subpixel electrode, which is obtained from the equation (Equation 2), differs between the divided exposure regions, and a difference in brightness occurs between the divided exposure regions.

【００１４】そこで、本発明の第１の目的は、上記のよ
うな原因で生じる輝度差の発生を簡単な構造で防止する
ことにより、高品質の表示を確保することにある。Therefore, a first object of the present invention is to ensure a high quality display by preventing the occurrence of the brightness difference caused by the above-mentioned causes with a simple structure.

【００１５】[0015]

【課題を解決するための手段】上記の目的を達成するた
めの本発明によるアクティブマトリックス型液晶表示素
子は、マトリックス状に配置された複数の信号配線と複
数の走査配線との各交点に対応するように、画素電極と
これに駆動電圧を印加するためのスイッチング素子とが
設けられ、前記画素電極は前記スイッチング素子に直接
接続された第１副画素電極と、制御容量を介して前記ス
イッチング素子に接続された第２副画素電極とを含む複
数の副画素電極に分割されているものであって、第１の
特徴構成は、前記制御容量が、第２副画素電極の一部に
形成された一定幅の長方形部分と、これと交差するよう
に絶縁層を介して対向する一定幅の長方形状の制御容量
電極とによって形成され、前記二つの長方形の電極の重
なり部分が所定の範囲内でずれてもその重なり部分の面
積が変化しない点にある。An active matrix type liquid crystal display device according to the present invention for achieving the above object corresponds to each intersection of a plurality of signal wirings and a plurality of scanning wirings arranged in a matrix. Thus, a pixel electrode and a switching element for applying a driving voltage to the pixel electrode are provided, and the pixel electrode is connected to the first sub-pixel electrode directly connected to the switching element and the switching element via a control capacitor. It is divided into a plurality of sub-pixel electrodes including a connected second sub-pixel electrode, and in the first characteristic configuration, the control capacitance is formed in a part of the second sub-pixel electrode. It is formed by a rectangular portion having a constant width and a rectangular control capacitance electrode having a constant width and facing each other across an insulating layer so as to intersect with the rectangular portion, and the overlapping portion of the two rectangular electrodes has a predetermined width. The area of the overlapping portion is also displaced in 囲内 is in that it does not change.

【００１６】また、第２の特徴構成は、前記制御容量
は、第１副画素電極に接続された第１制御容量電極と第
２副画素電極の一部分とが絶縁層を介して対向すること
により形成された第１制御容量と、第２副画素電極に接
続された第２制御容量電極が第１の副画素電極と絶縁層
を介して対向することにより形成された第２制御容量と
からなり、第１制御容量の形状と第２制御容量の形状と
が等しく、第１及び第２副画素電極に対して、第１及び
第２制御容量電極が所定範囲内でずれても第１制御容量
部分の面積と第２制御容量部分の面積との和が一定とな
る点にある。この第２の特徴構成において、好ましく
は、第１及び第２制御容量電極が、第１及び第２副画素
電極の境界部分を覆うように配置されている。In a second characteristic configuration, the control capacitance is such that the first control capacitance electrode connected to the first subpixel electrode and a part of the second subpixel electrode face each other with an insulating layer interposed therebetween. The formed first control capacitance and the second control capacitance formed by the second control capacitance electrode connected to the second subpixel electrode facing the first subpixel electrode via the insulating layer. , The first control capacitor and the second control capacitor have the same shape, and the first and second control capacitor electrodes are displaced from each other with respect to the first and second sub-pixel electrodes within a predetermined range. The sum of the area of the portion and the area of the second controlled capacitance portion is constant. In the second characteristic configuration, preferably, the first and second control capacitance electrodes are arranged so as to cover a boundary portion between the first and second subpixel electrodes.

【００１７】[0017]

【発明の実施の形態】本発明の第１の実施形態にあって
は、図８（ａ）に示すように、副画素電極１５ａの一部
に一定幅の長方形パターンが形成され、やはり一定幅の
長方形状に形成された制御容量電極１４ａがこの副画素
電極１５ａの長方形パターン部分と交差するように設け
られ、両電極が絶縁層を介して対向することにより制御
容量１６ａが形成されている。図において距離ａ、ｂ、
ｃ、ｄはパターンマスクとアレイガラス基板との位置合
わせの精度ｇより大きい。したがって、制御容量電極１
４ａが副画素電極１５ａに対してｘ軸方向及びｙ軸方向
に距離ｇずつずれたとしても、両電極の重なり部分の面
積、したがって制御容量１６ａの容量値は変化しない。
これによって、分割露光領域間に生じる輝度差が抑えら
れる。BEST MODE FOR CARRYING OUT THE INVENTION In the first embodiment of the present invention, as shown in FIG. 8A, a rectangular pattern having a constant width is formed on a part of the sub-pixel electrode 15a, and a constant width is also obtained. The rectangular shaped control capacitance electrode 14a is provided so as to intersect with the rectangular pattern portion of the sub-pixel electrode 15a, and both electrodes face each other with an insulating layer in between to form a control capacitance 16a. In the figure, distances a, b,
c and d are larger than the alignment accuracy g between the pattern mask and the array glass substrate. Therefore, the controlled capacitance electrode 1
Even if 4a is displaced from the subpixel electrode 15a by a distance g in the x-axis direction and the y-axis direction, the area of the overlapping portion of both electrodes, and thus the capacitance value of the control capacitor 16a, does not change.
This suppresses the brightness difference between the divided exposure areas.

【００１８】以下、具体的な製作例について説明する。
図１（ａ）に本発明の第１の実施形態に係る液晶表示素
子に用いた薄膜トランジスタアレイ基板の平面構成図を
示す。また、この図におけるＢ−Ｂ´断面に相当する液
晶表示素子の断面図を図１（ｂ）に示す。A specific manufacturing example will be described below.
FIG. 1A shows a plan view of a thin film transistor array substrate used for a liquid crystal display element according to the first embodiment of the present invention. Further, FIG. 1B shows a cross-sectional view of the liquid crystal display element corresponding to the BB ′ cross section in this figure.

【００１９】副画素電極２ａ、２ｂは、スパッタリング
法によって堆積させたＩＴＯ（ＩｎＯｘ−ＳｎＯｘ）を
用いてアレイ基板１上に図の様な形状にパターン形成し
た。クロムを用いてゲート電極３を形成した後、ＴＦＴ
のゲート絶縁膜として働く第１絶縁体層４として窒化シ
リコン（ＳｉＮｘ）をその上に積層させた。次に、ＴＦ
Ｔのスイッチ機能を司る半導体層５として、プラズマＣ
ＶＤ法によってアモルファスシリコン（α−Ｓｉ）を積
層させた。第２絶縁体層６は、窒化シリコン（ＳｉＮ
ｘ）のパターン化によって形成した。The sub-pixel electrodes 2a and 2b were patterned on the array substrate 1 using ITO (InOx-SnOx) deposited by a sputtering method in the shape shown in the figure. After forming the gate electrode 3 using chromium, the TFT
Silicon nitride (SiNx) was laminated thereon as the first insulator layer 4 serving as the gate insulating film. Next, TF
As the semiconductor layer 5 that controls the switching function of T, plasma C
Amorphous silicon (α-Si) was laminated by the VD method. The second insulator layer 6 is made of silicon nitride (SiN
x) patterned.

【００２０】その後、第１絶縁体層４と半導体層５をド
ライエッチングすることによって開口部７ａ、７ｂを設
け、これによって副画素電極２ａの一部が露出される。
次にスパッタリング法によって堆積させたチタン／アル
ミニウム（Ｔｉ／Ａｌ）の二層を堆積させ、その後、半
導体層５と共にドライエッチングすることにより、ソー
ス電極８ａ、ドレイン電極８ｂ、および蓄積容量電極８
ｃを同時にパターン形成した。さらに、副画素電極２ｂ
と重なる部分に制御容量電極８ｄをパターンに形成し
た。After that, the first insulator layer 4 and the semiconductor layer 5 are dry-etched to form openings 7a and 7b, whereby a part of the sub-pixel electrode 2a is exposed.
Next, two layers of titanium / aluminum (Ti / Al) deposited by the sputtering method are deposited, and then dry-etched together with the semiconductor layer 5 to form the source electrode 8a, the drain electrode 8b, and the storage capacitor electrode 8.
c was simultaneously patterned. Furthermore, the sub-pixel electrode 2b
A control capacitance electrode 8d was formed in a pattern in a portion overlapping with.

【００２１】このとき、開口部７ａを介して副画素電極
２ａとドレイン電極８ｂとが接続し、同様に開口部７ｂ
を介して副画素電極２ａと蓄積容量電極８ｃとが接続す
る。そして、制御容量電極８ｄと副画素電極２ｂとの間
に制御容量９ａが形成され、前段のゲート電極３と蓄積
容量電極８ｃとの間に蓄積容量１０が形成される。なお
この蓄積容量１０は画素に供給された電圧を保持するた
めに設けるものである。このようにして完成した薄膜ト
ランジスタアレイ基板と、透明電極膜１１及び遮光帯１
２が積層された対向基板１３とに配向膜を塗布し、ラビ
ング処理を行った。その後、約５μｍのギャップを形成
するように両基板を貼り合わせ、その間に液晶を注入し
て液晶表示素子を作製した。At this time, the sub-pixel electrode 2a and the drain electrode 8b are connected via the opening 7a, and similarly the opening 7b is formed.
The subpixel electrode 2a and the storage capacitor electrode 8c are connected via the. Then, the control capacitance 9a is formed between the control capacitance electrode 8d and the sub-pixel electrode 2b, and the storage capacitance 10 is formed between the gate electrode 3 of the previous stage and the storage capacitance electrode 8c. The storage capacitor 10 is provided to hold the voltage supplied to the pixel. The thin film transistor array substrate completed in this way, the transparent electrode film 11 and the light shielding band 1
An alignment film was applied to the counter substrate 13 on which 2 was laminated, and a rubbing treatment was performed. Then, the two substrates were bonded to each other so as to form a gap of about 5 μm, and liquid crystal was injected between them to manufacture a liquid crystal display element.

【００２２】このようにして作製した液晶表示素子の点
灯画像検査を行ったところ、隣合う分割露光領域の間で
輝度差は発生せず、広い視角特性を持ち、かつ高品質な
画像表示が得られた。When a lighting image inspection of the liquid crystal display element thus manufactured was conducted, a brightness difference was not generated between adjacent divided exposure areas, a wide viewing angle characteristic was obtained, and a high quality image display was obtained. Was given.

【００２３】次に本発明の第２の実施形態について説明
する。図８（ｂ）に示すように、開口部１７ａを介して
第１副画素電極１５ａに接続された第１制御容量電極１
４ｂと、開口部１７ｂを介して第２副画素電極１５ｂに
接続された第２制御容量電極１４ａとが形成されてい
る。第１制御容量電極１４ｂと第２副画素電極１５ｂと
の重なり部分には第１制御容量１６ａが形成され、第２
制御容量電極１４ａと第１副画素電極１５ａとの重なり
部分には第２制御容量１６ｂが形成されている。第１及
び第２制御容量の形状、すなわち重なり部の形状は等し
く、図８（ｂ）における距離ａ’，ｂ’，ｃ’，ｄ’，
ｅ’，及びｆ’はパターンマスクとアレイガラス基板と
の位置合わせの精度ｇより大きい。Next, a second embodiment of the present invention will be described. As shown in FIG. 8B, the first control capacitance electrode 1 connected to the first subpixel electrode 15a through the opening 17a.
4b and the second control capacitance electrode 14a connected to the second subpixel electrode 15b through the opening 17b are formed. A first control capacitor 16a is formed in an overlapping portion of the first control capacitor electrode 14b and the second subpixel electrode 15b, and a second control capacitor 16a is formed.
A second control capacitor 16b is formed in the overlapping portion of the control capacitor electrode 14a and the first subpixel electrode 15a. The shapes of the first and second control capacitors, that is, the shapes of the overlapping portions are the same, and the distances a ′, b ′, c ′, d ′, in FIG.
e ′ and f ′ are larger than the alignment accuracy g of the pattern mask and the array glass substrate.

【００２４】したがって、パターンマスクとアレイガラ
ス基板との位置合わせの誤差により、第１及び第２制御
容量電極が第１及び第２副画素電極に対してｘ及びｙ軸
方向に距離ｇずつずれたとしても、第１制御容量部分の
面積と第２制御容量部分の面積との和は変化しない。し
たがって、並列接続された二つの制御容量１６ａ及び１
６ｂの合成容量は変化しない。この結果、分割露光領域
間に生ずる輝度差が抑えられる。Therefore, due to an error in alignment between the pattern mask and the array glass substrate, the first and second control capacitor electrodes are displaced from the first and second subpixel electrodes by a distance g in the x and y axis directions. However, the sum of the area of the first control capacitance portion and the area of the second control capacitance portion does not change. Therefore, two control capacitors 16a and 16a connected in parallel are provided.
The combined capacity of 6b does not change. As a result, the brightness difference between the divided exposure areas can be suppressed.

【００２５】以下、本実施形態の具体的な製作例を図２
（ａ）及び（ｂ）に基づいて説明する。図２（ａ）は本
発明の第２の実施形態に係る液晶表示素子に用いた薄膜
トランジスタアレイ基板のＴＦＴ画素部の平面構成図で
ある。また、この図におけるＢ−Ｂ´断面に相当する液
晶表示素子の断面図を図２（ｂ）に示す。Hereinafter, a specific manufacturing example of this embodiment is shown in FIG.
A description will be given based on (a) and (b). FIG. 2A is a plan configuration diagram of the TFT pixel portion of the thin film transistor array substrate used for the liquid crystal display element according to the second embodiment of the present invention. Further, FIG. 2B shows a cross-sectional view of the liquid crystal display element corresponding to the BB ′ cross section in this figure.

【００２６】薄膜トランジスタアレイ基板および液晶表
示素子の作製方法は第１の実施形態と基本的に同じであ
るが、次の点で異なっている。つまり、開口部７ａ、７
ｂと同時に開口部７ｃ，７ｄを副画素電極２ａ，２ｂに
設け、制御容量電極８ｄ，８ｅを図のようなパターンに
形成する。開口部７ｃを介して副画素電極２ａと制御容
量電極８ｄが接続し、開口部７ｄを介して副画素電極２
ｂと制御容量電極８ｅが接続する。そして、制御容量電
極８ｄと副画素電極２ｂとの間で制御容量９ａが形成さ
れ、制御容量電極８ｅと副画素電極２ａとの間で制御容
量９ｂが形成される。The manufacturing method of the thin film transistor array substrate and the liquid crystal display element is basically the same as that of the first embodiment, but is different in the following points. That is, the openings 7a, 7
Simultaneously with b, openings 7c and 7d are provided in the sub-pixel electrodes 2a and 2b, and control capacitance electrodes 8d and 8e are formed in a pattern as shown in the figure. The subpixel electrode 2a is connected to the control capacitance electrode 8d through the opening 7c, and the subpixel electrode 2 is connected through the opening 7d.
b is connected to the control capacitance electrode 8e. Then, the control capacitance 9a is formed between the control capacitance electrode 8d and the subpixel electrode 2b, and the control capacitance 9b is formed between the control capacitance electrode 8e and the subpixel electrode 2a.

【００２７】このような構成の薄膜トランジスタアレイ
基板を用いて作製した液晶表示素子の点灯画像検査を行
ったところ、隣合う分割露光領域の間で輝度差は発生せ
ず、広い視角特性を持ち、かつ高品質な画像表示が得ら
れた。When a lighting image inspection of a liquid crystal display element manufactured by using the thin film transistor array substrate having such a structure is performed, a brightness difference does not occur between adjacent divided exposure areas, a wide viewing angle characteristic is obtained, and A high quality image display was obtained.

【００２８】次に、第３の実施形態に係る液晶表示素子
に用いた薄膜トランジスタアレイ基板の平面構成図を図
３（ａ）に示す。また、この図におけるＢ−Ｂ´断面に
相当する液晶表示素子の断面図を図３（ｂ）に示す。Next, FIG. 3A shows a plan view of a thin film transistor array substrate used in the liquid crystal display element according to the third embodiment. Further, FIG. 3B shows a cross-sectional view of the liquid crystal display element corresponding to the BB ′ cross section in this figure.

【００２９】この実施形態における薄膜トランジスタア
レイ基板および液晶表示素子の作製方法は基本的には第
２の実施形態と同じであるが、次の点が異なる。つま
り、チタン／アルミニウム（Ｔｉ／Ａｌ）の二層を用い
て制御容量電極８ｄ，８ｅを副画素電極２ａ，２ｂの境
界部分を覆うように形成した。開口部７ｃ，７ｄを介し
て、副画素電極２ａ，２ｂと制御容量電極８ｄ，８ｅが
接続し、制御容量電極８ｄ，８ｅと副画素電極２ｂ，２
ａとの間に制御容量９ａ．９ｂが形成される点は第２の
実施形態と同じである。The method of manufacturing the thin film transistor array substrate and the liquid crystal display element in this embodiment is basically the same as that of the second embodiment, but the following points are different. That is, the control capacitance electrodes 8d and 8e were formed using two layers of titanium / aluminum (Ti / Al) so as to cover the boundary portion between the sub-pixel electrodes 2a and 2b. The sub-pixel electrodes 2a and 2b are connected to the control capacitance electrodes 8d and 8e through the openings 7c and 7d, and the control capacitance electrodes 8d and 8e and the sub-pixel electrodes 2b and 2e are connected.
control capacitance 9a. The point that 9b is formed is the same as in the second embodiment.

【００３０】本実施形態による液晶表示素子は、副画素
電極の境界部分が不透明金属で覆われることにより、そ
の部分で発生する液晶分子配向の不均一性による光抜け
が遮光されるといった効果を有し、第１、第２の実施例
に比べて一層高コントラストな画像を提供することがで
きる。The liquid crystal display element according to the present embodiment has the effect that the boundary portion of the subpixel electrode is covered with the opaque metal, and thus the light leakage due to the nonuniformity of the alignment of the liquid crystal molecules generated at the portion is blocked. However, it is possible to provide an image with higher contrast as compared with the first and second embodiments.

【００３１】[0031]

【発明の効果】以上説明したように、本発明によれば、
広い視角で良好な多階調表示を実現できる画素分割構成
のアクティブマトリックス型液晶表示素子において、簡
単な構造で、しかも従来と同じ作製工程によって、分割
露光領域間の輝度差の発生を防止することができ、高品
質の画像表示が得られる。As described above, according to the present invention,
In an active matrix type liquid crystal display device with a pixel division structure capable of realizing excellent multi-gradation display with a wide viewing angle, it is possible to prevent the occurrence of a brightness difference between divided exposure regions by a simple structure and by the same manufacturing process as the conventional one. And a high quality image display can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の第１の実施形態に係る液晶表示素子の
薄膜トランジスタ基板の構成を示す平面図および液晶表
示素子の断面図FIG. 1 is a plan view showing a configuration of a thin film transistor substrate of a liquid crystal display element according to a first embodiment of the present invention and a sectional view of the liquid crystal display element.

【図２】第２の実施形態に係る液晶表示素子の薄膜トラ
ンジスタ基板の構成を示す平面図および液晶表示素子の
断面図FIG. 2 is a plan view showing a configuration of a thin film transistor substrate of a liquid crystal display element according to a second embodiment and a sectional view of the liquid crystal display element.

【図３】第３の実施形態に係る液晶表示素子の薄膜トラ
ンジスタ基板の構成を示す平面図および液晶表示素子の
断面図FIG. 3 is a plan view showing a configuration of a thin film transistor substrate of a liquid crystal display element according to a third embodiment and a sectional view of the liquid crystal display element.

【図４】画素分割構成によるＴＦＴ液晶表示素子の一画
素当たりの等価回路図FIG. 4 is an equivalent circuit diagram for one pixel of a TFT liquid crystal display device having a pixel division structure.

【図５】画素分割構成によるＴＦＴ液晶表示素子の主視
角方向から３０゜離れた視角における輝度対駆動電圧特
性を示すグラフFIG. 5 is a graph showing a luminance vs. driving voltage characteristic at a viewing angle of 30 ° apart from a main viewing angle direction of a TFT liquid crystal display device having a pixel division structure.

【図６】従来の液晶表示素子の薄膜トランジスタ基板の
構成を示す平面図および液晶表示素子の断面図FIG. 6 is a plan view showing a configuration of a thin film transistor substrate of a conventional liquid crystal display element and a sectional view of the liquid crystal display element.

【図７】分割露光工程を示す模式図FIG. 7 is a schematic diagram showing a division exposure process.

【図８】第１及び第２の実施形態における副画素電極と
制御電極との重なり部分の拡大平面図FIG. 8 is an enlarged plan view of an overlapping portion of a subpixel electrode and a control electrode in the first and second embodiments.

【符号の説明】[Explanation of symbols]

１ アレイ基板 ２ａ，２ｂ，１５ａ，１５ｂ 副画素電極 ３ ゲート電極 ４ 第１絶縁体層 ５ 半導体層 ６ 第２絶縁体層 ７ａ，７ｂ，７ｃ，７ｄ 開口部 ８ａ ソース電極 ８ｂ ドレイン電極 ８ｃ 蓄積容量電極 ８ｄ，８ｅ，１４ａ，１４ｂ 制御容量電極 ９ａ，９ｂ，１６ａ，１６ｂ 制御容量 １０ 蓄積容量 １１ 透明電極膜 １２ 遮光帯 １３ 対向基板 １７ａ，１７ｂ 開口部 1 array substrate 2a, 2b, 15a, 15b subpixel electrode 3 gate electrode 4 first insulator layer 5 semiconductor layer 6 second insulator layer 7a, 7b, 7c, 7d opening 8a source electrode 8b drain electrode 8c storage capacitor electrode 8d, 8e, 14a, 14b Control capacitance electrode 9a, 9b, 16a, 16b Control capacitance 10 Storage capacitance 11 Transparent electrode film 12 Light-shielding band 13 Counter substrate 17a, 17b Opening

Claims (3)

【特許請求の範囲】[Claims] 【請求項１】 マトリックス状に配置された複数の信号
配線と複数の走査配線との各交点に対応するように、画
素電極とこれに駆動電圧を印加するためのスイッチング
素子とが設けられ、前記画素電極は前記スイッチング素
子に直接接続された第１副画素電極と、制御容量を介し
て前記スイッチング素子に接続された第２副画素電極と
を含む複数の副画素電極に分割されている液晶表示素子
であって、 前記制御容量は第２副画素電極の一部に形成された一定
幅の長方形部分と、これと交差するように絶縁層を介し
て対向する一定幅の長方形状の制御容量電極とによって
形成され、前記二つの長方形の電極の重なり部分が所定
の範囲内でずれてもその重なり部分の面積が変化しない
ことを特徴とするアクティブマトリックス型液晶表示素
子。1. A pixel electrode and a switching element for applying a drive voltage to the pixel electrode are provided so as to correspond to respective intersections of a plurality of signal wirings and a plurality of scanning wirings arranged in a matrix. The pixel electrode is divided into a plurality of sub-pixel electrodes including a first sub-pixel electrode directly connected to the switching element and a second sub-pixel electrode connected to the switching element via a control capacitor, and a liquid crystal display. In the device, the control capacitance has a rectangular portion having a constant width formed in a part of the second sub-pixel electrode, and a rectangular control capacitance electrode having a constant width that is opposed to the rectangular portion through an insulating layer so as to intersect the rectangular portion. An active matrix type liquid crystal display device, characterized in that the area of the overlapping portions of the two rectangular electrodes is not changed even if the overlapping portions of the two rectangular electrodes are displaced within a predetermined range. 【請求項２】 マトリックス状に配置された複数の信号
配線と複数の走査配線との各交点に対応するように、画
素電極とこれに駆動電圧を印加するためのスイッチング
素子とが設けられ、前記画素電極は前記スイッチング素
子に直接接続された第１副画素電極と、制御容量を介し
て前記スイッチング素子に接続された第２副画素電極と
を含む複数の副画素電極に分割されている液晶表示素子
であって、 前記制御容量は、第１副画素電極に接続された第１制御
容量電極と第２副画素電極の一部分とが絶縁層を介して
対向することにより形成された第１制御容量と、第２副
画素電極に接続された第２制御容量電極が第１の副画素
電極と絶縁層を介して対向することにより形成された第
２制御容量とからなり、 第１制御容量の形状と第２制御容量の形状とが等しく、
第１及び第２副画素電極に対して、第１及び第２制御容
量電極が所定範囲内でずれても第１制御容量部分の面積
と第２制御容量部分の面積との和が一定であることを特
徴とするアクティブマトリックス型液晶表示素子。2. A pixel electrode and a switching element for applying a drive voltage to the pixel electrode are provided so as to correspond to respective intersections of a plurality of signal wirings and a plurality of scanning wirings arranged in a matrix. The pixel electrode is divided into a plurality of sub-pixel electrodes including a first sub-pixel electrode directly connected to the switching element and a second sub-pixel electrode connected to the switching element via a control capacitor, and a liquid crystal display. In the device, the control capacitance is a first control capacitance formed by the first control capacitance electrode connected to the first subpixel electrode and a part of the second subpixel electrode facing each other through an insulating layer. And a second control capacitance formed by a second control capacitance electrode connected to the second subpixel electrode facing the first subpixel electrode with an insulating layer in between, and a shape of the first control capacitance And the second control capacity Equal to the Jo,
The sum of the area of the first control capacitance portion and the area of the second control capacitance portion is constant even if the first and second control capacitance electrodes deviate within a predetermined range with respect to the first and second subpixel electrodes. An active matrix type liquid crystal display device characterized by the above. 【請求項３】 第１及び第２制御容量電極が、第１及び
第２副画素電極の境界部分を覆うように配置されている
請求項２記載のアクティブマトリックス型液晶表示素
子。3. The active matrix type liquid crystal display element according to claim 2, wherein the first and second control capacitance electrodes are arranged so as to cover a boundary portion between the first and second subpixel electrodes.
JP20881195A 1995-08-16 1995-08-16 Active matrix type liquid crystal display element Pending JPH0954341A (en)

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JP2006126837A (en) * 2004-10-25 2006-05-18 Samsung Electronics Co Ltd Multi-domain thin-film transistor display panel
JP2006171731A (en) * 2004-12-17 2006-06-29 Samsung Electronics Co Ltd Thin film transistor display panel and liquid crystal display including same
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