JPH09298310A - Nitride semiconductor element - Google Patents
Nitride semiconductor elementInfo
- Publication number
- JPH09298310A JPH09298310A JP11494296A JP11494296A JPH09298310A JP H09298310 A JPH09298310 A JP H09298310A JP 11494296 A JP11494296 A JP 11494296A JP 11494296 A JP11494296 A JP 11494296A JP H09298310 A JPH09298310 A JP H09298310A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- layer
- support
- nitride semiconductor
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
- Light Receiving Elements (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は窒化物半導体（Ｉｎ
XＡｌYＧａ1-X-YＮ、０≦X、０≦Y、X＋Y≦１）よりな
り、発光ダイオード（ＬＥＤ）、レーザダイオード（Ｌ
ＥＤ）等の発光素子、太陽電池、光センサー等の受光素
子に利用される窒化物半導体素子に関する。The present invention relates to a nitride semiconductor (In).
X Al Y Ga 1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1), light emitting diode (LED), laser diode (L
The present invention relates to a nitride semiconductor element used as a light emitting element such as ED), a light receiving element such as a solar cell, and an optical sensor.
【０００２】[0002]
【従来の技術】一般に、窒化物半導体よりなる発光チッ
プは、同一面側に正と負の電極が設けられている。これ
は窒化物半導体が絶縁性基板の上に成長されることが多
いことによる。このような発光チップは例えばフェース
ダウンの状態で、あるいはフェースアップの状態で例え
ばステム、リードフレーム、ヒートシンク、サブマウン
ト等の支持体にマウントされて発光素子とされる。2. Description of the Related Art Generally, a light emitting chip made of a nitride semiconductor is provided with positive and negative electrodes on the same surface side. This is because nitride semiconductors are often grown on insulating substrates. Such a light emitting chip is mounted on a support such as a stem, a lead frame, a heat sink, or a submount in a face-down state or a face-up state to form a light emitting element.
【０００３】本出願人は、先に特開平７−２３５７２９
号公報において、窒化物半導体発光チップがフェースダ
ウンで支持体にマウントされてなるレーザ素子を示し
た。この技術は、例えばサファイアのような絶縁性基板
を用いた窒化物半導体レーザチップの放熱性を向上させ
る目的で、レーザチップをフェースダウンして絶縁性の
ヒートシンク上にマウントしたものである。The applicant of the present invention has previously filed Japanese Patent Application Laid-Open No. 7-235729.
In the publication, a laser device is shown in which a nitride semiconductor light emitting chip is mounted face down on a support. In this technique, for the purpose of improving the heat dissipation of a nitride semiconductor laser chip using an insulating substrate such as sapphire, the laser chip is face-down mounted on an insulating heat sink.
【０００４】[0004]
【発明が解決しようとする課題】通常、同一面側に２種
類の電極が設けられた半導体チップをフェースダウンで
支持体にボンディングする場合、支持体の所定の位置
に、加熱された半田材がディスペンサーにより所定量吐
出されると同時に、半導体チップがその半田材の上に載
置され、冷却により支持体と半導体チップとが電気的に
接続される手段が行われる。半田材には銀ペースト、Ｉ
ｎペースト、Ｐｂ／Ｓｎ等の低融点金属が用いられるこ
とが多い。しかし、半田材は、周知のように過熱された
状態で流動性が大きいという欠点を有している。そのた
め同一面側に正と負の電極が設けられた窒化物半導体チ
ップでは、半田材が所定の位置より流出することによ
り、片方の電極と接触して電極間をショートさせてしま
う恐れがある。Usually, when a semiconductor chip having two kinds of electrodes provided on the same surface side is bonded face down to a support, a heated solder material is placed at a predetermined position of the support. At the same time when a predetermined amount is discharged by a dispenser, a semiconductor chip is placed on the solder material and a means for electrically connecting the support and the semiconductor chip by cooling is performed. Solder material is silver paste, I
A low melting point metal such as n paste or Pb / Sn is often used. However, as is well known, the solder material has a drawback that it has a large fluidity in the overheated state. Therefore, in a nitride semiconductor chip in which positive and negative electrodes are provided on the same surface side, the solder material may flow out from a predetermined position to contact one electrode and cause a short circuit between the electrodes.
【０００５】同一面側に電極が設けられた半導体チップ
がフェースダウンでマウントされた素子は信頼性を向上
させる必要がある。特にレーザ素子のように発熱量の大
きいデバイスを実現するためには、半田材が熱により変
形、変質すると素子としての信頼性が著しく低下する。
従って、本発明はこのような事情を鑑みて成されたもの
であって、その目的とするところは、電極間ショートの
ない信頼性に優れた窒化物半導体素子を提供することに
ある。An element in which a semiconductor chip having electrodes provided on the same surface side is mounted facedown has to have improved reliability. In particular, in order to realize a device having a large amount of heat generation such as a laser element, when the solder material is deformed or deteriorated by heat, the reliability as an element is significantly lowered.
Therefore, the present invention has been made in view of such circumstances, and an object of the present invention is to provide a highly reliable nitride semiconductor element free from a short circuit between electrodes.
【０００６】[0006]
【課題を解決するための手段】本発明の窒化物半導体素
子は、同一面側に正負一対の電極が設けられてなる窒化
物半導体チップがフェースダウンの状態で支持体にマウ
ントされてなる窒化物半導体素子において、前記支持体
には半導体チップの電極位置と対応する位置に形成され
た第１の電極と、その第１の電極と電気的に接続され、
第１の電極よりも面積が大きい第２の電極とが形成され
ており、さらに前記半導体チップの電極は前記第１の電
極に直接接続されていることを特徴とする。In the nitride semiconductor device of the present invention, a nitride semiconductor chip having a pair of positive and negative electrodes provided on the same side is mounted face down on a support. In the semiconductor element, the support is electrically connected to a first electrode formed at a position corresponding to an electrode position of the semiconductor chip, and the first electrode.
A second electrode having an area larger than that of the first electrode is formed, and the electrode of the semiconductor chip is directly connected to the first electrode.
【０００７】本発明の素子では、前記第２の電極が、支
持体に接する側に形成された第１の層と、第１の電極側
に接する側に形成された第２の層とからなる少なくとも
２層構造を有することが好ましい。In the element of the present invention, the second electrode comprises a first layer formed on the side in contact with the support and a second layer formed on the side in contact with the first electrode. It is preferable to have at least a two-layer structure.
【０００８】また第２の電極が、支持体に接する側に形
成された第１の層と、第１の電極側に接する側に形成さ
れた第２の層と、さらに前記第１の層と第２の層との間
に形成された中間層からなる少なくとも３層構造を有す
ることが好ましい。The second electrode includes a first layer formed on the side in contact with the support, a second layer formed on the side in contact with the first electrode, and the first layer. It is preferable to have at least a three-layer structure including an intermediate layer formed between the second layer and the second layer.
【０００９】具体的な電極材料は、第１の層がチタン
（Ｔｉ）、クロム（Ｃｒ）、アルミニウム（Ａｌ）、ジ
ルコニウム（Ｚｒ）よりなる群から選択された少なくと
も一種を含み、前記第２の層が少なくとも金（Ａｕ）を
含むことが好ましい。In a specific electrode material, the first layer contains at least one selected from the group consisting of titanium (Ti), chromium (Cr), aluminum (Al) and zirconium (Zr), and the second layer It is preferred that the layer comprises at least gold (Au).
【００１０】さらに、前記中間層は白金（Ｐｔ）、ニッ
ケル（Ｎｉ）、モリブデン（Ｍｏ）、タングステン
（Ｗ）よりなる群から選択された少なくとも一種を含む
ことが好ましい。Further, the intermediate layer preferably contains at least one selected from the group consisting of platinum (Pt), nickel (Ni), molybdenum (Mo), and tungsten (W).
【００１１】本発明の窒化物半導体素子は、以下のよう
な方法で得ることができる。即ち、支持体の表面に面積
の大きい第２の電極と、第２の電極よりも面積の小さい
第１の電極とを形成する。なお第１の電極は予め窒化物
半導体の電極位置に対応した位置に形成する。一方、同
一面側に正と負の電極が設けられた半導体チップを、前
記支持体の第１の電極位置に対応するように、支持体上
に載置した後、全体を加熱することにより、半導体チッ
プの電極と、第１の電極とが接している箇所を合金化し
て、半導体チップを支持体にマウントする。電極を形成
するには特殊な方法を用いる必要はなく、通常行われて
いる蒸着、スパッタ、あるいは印刷、メッキ等の方法に
より形成可能である。The nitride semiconductor device of the present invention can be obtained by the following method. That is, the second electrode having a large area and the first electrode having a smaller area than the second electrode are formed on the surface of the support. The first electrode is previously formed at a position corresponding to the electrode position of the nitride semiconductor. On the other hand, a semiconductor chip provided with positive and negative electrodes on the same surface side is placed on the support so as to correspond to the first electrode position of the support, and then the whole is heated, A portion where the electrode of the semiconductor chip and the first electrode are in contact with each other is alloyed, and the semiconductor chip is mounted on a support. It is not necessary to use a special method for forming the electrodes, and the electrodes can be formed by a commonly used method such as vapor deposition, sputtering, printing or plating.
【００１２】[0012]
【発明の実施の形態】図１は本発明の窒化物半導体素子
の一構造を示す模式的な断面図であり、具体的にはレー
ザ素子の構造を示している。この図において１００は窒
化物半導体よりなる発光チップであり、発光チップ１０
０は主として基板１０１と、レーザ発振して発光する窒
化物半導体層１０２とを有しており、窒化物半導体層１
０２の同一面側には、負電極１０３と正電極１０４とが
設けられている。FIG. 1 is a schematic cross-sectional view showing one structure of the nitride semiconductor device of the present invention, specifically showing the structure of a laser device. In this figure, reference numeral 100 denotes a light emitting chip made of a nitride semiconductor.
Reference numeral 0 mainly includes a substrate 101 and a nitride semiconductor layer 102 that emits laser light to emit light.
A negative electrode 103 and a positive electrode 104 are provided on the same surface side of 02.
【００１３】一方、発光チップ１００がマウントされる
支持体２０には、半導体チップ１００の負電極１０３、
および正電極１０４と対応する位置に、それぞれ第１の
電極２１ａ、２１ｂ（以下、第１の電極の符号を２１と
記す。）が形成されており、さらに第１の電極２１と電
気的に接続され、第１の電極よりも面積が大きい第２の
電極２２ａ、２２ｂ（以下、第２の電極の符号を２２と
記す。）が支持体に接するように形成されている。そし
て、支持体側に形成された第１の電極２１と、半導体チ
ップ側の負電極１０３、正電極１０４とは、それぞれ半
田のような導電性接着剤を介さず、直接接続されてい
る。On the other hand, on the support 20 on which the light emitting chip 100 is mounted, the negative electrode 103 of the semiconductor chip 100,
Further, first electrodes 21a and 21b (hereinafter, the reference numeral of the first electrode is referred to as 21) are formed at positions corresponding to the positive electrode 104 and are electrically connected to the first electrode 21. The second electrodes 22a and 22b (hereinafter, the reference numeral of the second electrode is referred to as 22) having an area larger than that of the first electrode are formed so as to be in contact with the support. The first electrode 21 formed on the support side and the negative electrode 103 and the positive electrode 104 on the semiconductor chip side are directly connected to each other without a conductive adhesive such as solder.
【００１４】第１の電極２１の材料は特に限定するもの
ではないが、窒化物半導体の電極と合金化しやすく、接
触抵抗の低い材料を選択することが望ましい。例えば窒
化物半導体の正電極の材料にはＮｉ、Ａｕ、白金族元素
等の仕事関数の大きい材料が選択されることが多く、負
電極の材料にはＴｉ、Ａｌ、Ｗ等の仕事関数の小さい材
料が選択されることが多い。そのため第１の電極２１に
は、窒化物半導体の電極と同じ金属を使用するか、ある
いは融点が６００℃以下の金属、もしくは合金を選択す
ることが望ましい。融点が６００℃以下の金属、合金と
しては具体的にはＡｕを含む合金、例えばＡｕ／Ｓｎ、
Ａｕ／Ｓｉ、Ａｕ／Ｇｅのような合金があり、他にはＩ
ｎを含む合金を選択することが望ましい。The material of the first electrode 21 is not particularly limited, but it is desirable to select a material having a low contact resistance because it is easily alloyed with the electrode of the nitride semiconductor. For example, a material having a high work function such as Ni, Au, or a platinum group element is often selected as the material for the positive electrode of the nitride semiconductor, and a material having a low work function such as Ti, Al, or W is selected as the material for the negative electrode. Materials are often selected. Therefore, for the first electrode 21, it is desirable to use the same metal as the nitride semiconductor electrode, or to select a metal or alloy having a melting point of 600 ° C. or less. A metal having a melting point of 600 ° C. or lower, specifically, an alloy containing Au, for example, Au / Sn,
There are alloys such as Au / Si and Au / Ge.
It is desirable to select an alloy containing n.
【００１５】このように本発明の窒化物半導体素子で
は、半導体チップの電極と、支持体に形成された電極と
が導電性接着剤を介さずに接続されているため、接着剤
の流れ出しが無くなることにより、電極間ショートが無
くなり、素子の信頼性が格段に向上する。As described above, in the nitride semiconductor device of the present invention, since the electrode of the semiconductor chip and the electrode formed on the support are connected without the conductive adhesive, the adhesive does not flow out. As a result, the short circuit between the electrodes is eliminated, and the reliability of the device is significantly improved.
【００１６】また、本発明の素子では第１の電極２１よ
りも第２の電極２２の面積を大きくしている。即ち、本
発明の素子では第１の電極２１は半導体チップの電極と
接続するためのものであり、第２の電極２２は支持体２
０の表面に形成して、外部リード、電源のように外部か
ら電力を供給するための電極として作用する。従って、
第２の電極は第１の電極よりも面積を大きくして支持体
と剥がれにくくする必要がある。そこで、本発明の好ま
しい態様では、第２の電極を層構造とすることにより支
持体と剥がれにくくすることができる。In the element of the present invention, the area of the second electrode 22 is larger than that of the first electrode 21. That is, in the device of the present invention, the first electrode 21 is for connecting to the electrode of the semiconductor chip, and the second electrode 22 is for the support 2
It is formed on the surface of 0 and acts as an electrode for supplying electric power from the outside like an external lead or a power supply. Therefore,
The second electrode needs to have a larger area than the first electrode so that the second electrode is less likely to peel off from the support. Therefore, in a preferred embodiment of the present invention, the second electrode has a layered structure so that the second electrode can be hardly peeled off from the support.
【００１７】支持体２０には数々の材料が使用される、
例えば半導体チップがレーザチップである場合には、Ａ
ｌＮ、ＳｉＣ、ＧａＡｓ、ＢＮ、Ｓｉ、Ｃ（ダイヤモン
ド）等の熱伝導性の良いヒートシンクが使用され、ＬＥ
Ｄチップであれば、Ａｌ2Ｏ3、ＳｉＯ2等の絶縁性のグ
リーンシートが使用される。支持体の材料は特に限定す
るものではなく、絶縁性、導電性いずれの材料でもよ
い。導電性の支持体を用いる場合には電極間の短絡を防
止するため、第２の電極２２を形成する前に、その支持
体の表面に絶縁性の被膜を形成することもできる。A number of materials are used for the support 20,
For example, when the semiconductor chip is a laser chip, A
A heat sink with good thermal conductivity such as 1N, SiC, GaAs, BN, Si, C (diamond) is used.
For a D chip, an insulating green sheet such as Al 2 O 3 or SiO 2 is used. The material of the support is not particularly limited and may be either an insulating material or a conductive material. When a conductive support is used, in order to prevent a short circuit between the electrodes, an insulating coating film may be formed on the surface of the support before forming the second electrode 22.
【００１８】図１に示すように、第２の電極２２は、そ
れぞれ支持体に接する側に第１の層２２１ａ、２２１ｂ
（以下、第１の層の符号を２２１と記す。）が形成され
ており、第１の電極２１に接する側に第２の層２２２
ａ、２２２ｂ（以下、第２の層の符号を２２２と記
す。）が形成されている。第１の層２２１は支持体２０
と接着性（密着性）のよい金属を選択し、第２の層２２
２は第１の電極２１と接着性のよい金属を選択すること
が望ましい。具体的には第１の層２２１はＴｉ、Ｃｒ、
Ａｌ、Ｚｒよりなる群から選択された少なくとも一種を
含み、第２の層２２２が少なくとも金（Ａｕ）を含むこ
とが望ましい。特に第１の層２２１は支持体２０にＡｌ
2Ｏ3、ＳｉＯ2等の絶縁体、またはＳｉＣ、ＡｌＮ、Ｇ
ａＡｓ等の半導体を用いた場合に非常に接着性がよい。
また第２の層２２２にＡｕを用いると、第１の電極２１
との接触抵抗を少なくして接続することができると共
に、ワイヤーボンディング時の金線の接着性がよい。As shown in FIG. 1, the second electrode 22 has the first layers 221a and 221b on the side in contact with the support, respectively.
(Hereinafter, the reference numeral of the first layer is referred to as 221) is formed, and the second layer 222 is formed on the side in contact with the first electrode 21.
a and 222b (hereinafter, the reference numeral of the second layer is referred to as 222) are formed. The first layer 221 is the support 20.
A metal having good adhesiveness (adhesion) with the second layer 22
For 2, it is desirable to select a metal having good adhesiveness to the first electrode 21. Specifically, the first layer 221 is made of Ti, Cr,
It is preferable that the second layer 222 include at least one selected from the group consisting of Al and Zr, and at least include gold (Au). Particularly, the first layer 221 is made of Al on the support 20.
Insulator such as 2 O 3 , SiO 2 or SiC, AlN, G
The adhesiveness is very good when a semiconductor such as aAs is used.
When Au is used for the second layer 222, the first electrode 21
It can be connected with a reduced contact resistance with and has good adhesiveness of the gold wire during wire bonding.
【００１９】さらに本発明の好ましい態様において、図
１に示すように、第２の電極２２が、支持体に接する側
に形成された第１の層２２１と、第１の電極側に接する
側に形成された第２の層２２２と、さらに前記第１の層
と第２の層との間に形成された中間層２２３ａ、２２３
ｂ（以下、中間層の符号を２２３と記す。）とからなる
少なくとも３層構造を有している。この中間層２２３は
第１の層２２１と第２の層２２２との接着性をさらに高
める作用がある。さらに加熱ボンディング時に第１の層
２２１と第２の層２２２とが合金化して、それぞれの電
極材料の効果を低下させるのを防止するバリア層として
の作用もある。具体的な中間層はＰｔ、Ｎｉ、Ｍｏ、Ｗ
よりなる群から選択された少なくとも一種を含むことが
望ましい。これらの金属は特に、Ａｕを含む第２の層２
２２と、Ｔｉ、Ｃｒ、Ａｌ、Ｚｒ第１の層２２１との接
着性を向上させる作用がある。Further, in a preferred embodiment of the present invention, as shown in FIG. 1, the second electrode 22 is provided on the first layer 221 formed on the side in contact with the support and on the side in contact with the first electrode side. The formed second layer 222 and intermediate layers 223a and 223 formed between the first layer and the second layer.
b (hereinafter, reference numeral of the intermediate layer is referred to as 223). The intermediate layer 223 has a function of further enhancing the adhesiveness between the first layer 221 and the second layer 222. Further, it also has a function as a barrier layer for preventing the first layer 221 and the second layer 222 from being alloyed with each other at the time of heat bonding to reduce the effect of each electrode material. Specific intermediate layers are Pt, Ni, Mo, W
It is desirable to include at least one selected from the group consisting of: These metals are particularly suitable for the second layer 2 containing Au.
22 and the Ti, Cr, Al, and Zr first layers 221 have an effect of improving the adhesiveness.
【００２０】つまり、本発明の素子において、支持体側
に形成される第１の電極２１は、加熱により、窒化物半
導体の電極１０３、１０４と合金化されて一体となる接
着用の電極であり、第２の電極２２は外部よりワイヤー
ボンディング、ダイボンディング等を行って電源手段と
接続するための電極として作用するものである。第２の
電極２２は特にＡｕを含む材料とすると、例えば金線で
ワイヤーボンディングする際に、金線との接着性がよい
が、さらに支持体２０との接着性をよくするために、第
２の電極２２を層構造とする。第２の電極２２を層構造
とした場合、第２の電極２２は支持体２０との接着性の
よい第１の層２２１と、第１の電極２１と接着性のよい
第２の層２２２とからなる。しかしながら、加熱により
第１の層２２１と第２の層２２２とが合金化すると、支
持体２０との接着性、および金線の接着性が損なわれる
恐れがあるため、さらに中間層２２３を入れることによ
り、第１の電極２１全体の支持体２０への接着性をよく
すると共に、ワイヤーボンディング時の金線との接着性
もよくすることができる。That is, in the element of the present invention, the first electrode 21 formed on the support side is an electrode for bonding which is alloyed and integrated with the electrodes 103 and 104 of the nitride semiconductor by heating, The second electrode 22 functions as an electrode for connecting to the power supply means by performing wire bonding, die bonding, or the like from the outside. When the second electrode 22 is made of a material containing Au in particular, for example, when performing wire bonding with a gold wire, the second electrode 22 has good adhesiveness with the gold wire. The electrode 22 of has a layered structure. When the second electrode 22 has a layered structure, the second electrode 22 includes a first layer 221 having good adhesion to the support 20, and a second layer 222 having good adhesion to the first electrode 21. Consists of. However, if the first layer 221 and the second layer 222 are alloyed by heating, the adhesiveness with the support 20 and the adhesiveness of the gold wire may be impaired. Therefore, the intermediate layer 223 should be further added. As a result, it is possible to improve the adhesiveness of the entire first electrode 21 to the support 20 and also the adhesiveness to the gold wire during wire bonding.
【００２１】[0021]
［実施例１］以下、図面を元に本発明の素子について詳
説する。図１は実施例１に係る素子の構造を示す模式的
な断面図であり、図２は発光チップ側から見た支持体の
みの構造を示す平面図である。[Embodiment 1] The device of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing the structure of the element according to Example 1, and FIG. 2 is a plan view showing the structure of only the support as seen from the light emitting chip side.
【００２２】サファイア基板１０１の上に、少なくとも
ｎ型窒化物半導体層と、発振する活性層と、ｐ型窒化物
半導体層とを有する窒化物半導体１０２よりなる５００
μｍ角のレーザチップ１００を用意する。このレーザチ
ップは図１に示すように、最上層の窒化物半導体層の一
部がエッチングにより除去されて同一面側に正電極１０
４と負電極１０３とを有する。正電極１０４にはＮｉと
Ａｕを含む合金が使用されており、負電極１０３にはＴ
ｉとＡｌとを含む合金が使用されている。A nitride semiconductor 102 having at least an n-type nitride semiconductor layer, an oscillating active layer, and a p-type nitride semiconductor layer on a sapphire substrate 101.
A μm square laser chip 100 is prepared. In this laser chip, as shown in FIG. 1, a part of the uppermost nitride semiconductor layer is removed by etching and the positive electrode 10 is formed on the same surface side.
4 and the negative electrode 103. An alloy containing Ni and Au is used for the positive electrode 104, and T is used for the negative electrode 103.
An alloy containing i and Al is used.
【００２３】一方、支持体２０には５ｍｍ角のＡｌＮよ
りなるサブマウントを使用し、このサブマウントの表面
にフォトリソグラフィー技術を用いて適当な形状の保護
膜を形成した後、まずＴｉとＡｌを含む第１の層２２１
ａ、２２１ｂを蒸着により形成する。On the other hand, a 5 mm square submount made of AlN is used for the support 20, and a protective film having an appropriate shape is formed on the surface of the submount by photolithography. Including first layer 221
a and 221b are formed by vapor deposition.
【００２４】続いて、第１の層２２１ａ、２２１ｂの上
にそれぞれＰｔとＮｉとを含む中間層２２３ａ、２２３
ｂとを同じく蒸着により形成する。Subsequently, intermediate layers 223a and 223 containing Pt and Ni respectively are formed on the first layers 221a and 221b.
Similarly, b and b are formed by vapor deposition.
【００２５】さらに、中間層２２３ａ、２２３ｂの上に
Ａｕよりなる第２の層２２２ａ、２２２ｂを同じく蒸着
により形成した後、保護膜を除去する。以上の操作によ
り、Ｔｉ／Ａｌを含む第１の層２２１と、Ｐｔ／Ｎｉを
含む中間層２２３、Ａｕを含む第２の層２２２とが積層
されてなる第２の電極２２を形成する。Further, second layers 222a and 222b made of Au are similarly formed on the intermediate layers 223a and 223b by vapor deposition, and then the protective film is removed. Through the above operation, the second electrode 22 is formed by stacking the first layer 221 containing Ti / Al, the intermediate layer 223 containing Pt / Ni, and the second layer 222 containing Au.
【００２６】第２の電極２２を形成した後、その第２の
層の上に、適当な形状を有する保護膜を形成した後、Ａ
ｕとＳｎを含む合金よりなる第１の電極２１ａ、２１ｂ
を同じく蒸着により形成する。図２は電極形成後の支持
体１０の平面図を示すものであり、電極の位置は図１と
対応している。After forming the second electrode 22, a protective film having an appropriate shape is formed on the second layer, and then A
First electrodes 21a and 21b made of an alloy containing u and Sn
Are also formed by vapor deposition. FIG. 2 is a plan view of the support 10 after the electrodes are formed, and the positions of the electrodes correspond to those in FIG.
【００２７】以上のようにして電極を形成したレーザチ
ップ１００を、支持体２０の上に互いの電極同士が対向
するようにして載置し、５００℃で電極同士を熱圧着す
る。この熱圧着によりレーザチップの電極１０３、１０
４と、支持体２０の第１の電極２１とが合金化して接着
されると共に、第２の電極２２と第１の電極２１、およ
び第２の電極２２と支持体２０とが強固に接着される。The laser chip 100 having the electrodes formed as described above is placed on the support 20 so that the electrodes face each other, and the electrodes are thermocompression bonded at 500 ° C. By this thermocompression bonding, the electrodes 103 and 10 of the laser chip are
4 and the first electrode 21 of the support 20 are alloyed and adhered, and the second electrode 22 and the first electrode 21 and the second electrode 22 and the support 20 are firmly adhered. It
【００２８】次に支持体２０を導電性のヒートシンクに
設置する。なおヒートシンクには支持体の裏面まで形成
された第２の電極２２ａと、ヒートシンクとを半田を介
して接着することにより設置する。さらに支持体２０の
表面に形成された第２の電極の最上層に金線をワイヤー
ボンディングすることによりレーザ素子とする。Next, the support 20 is set on a conductive heat sink. The second electrode 22a formed up to the back surface of the support is attached to the heat sink by bonding the heat sink with solder. Further, a gold wire is wire-bonded to the uppermost layer of the second electrode formed on the surface of the support 20 to form a laser element.
【００２９】以上のような工程で、レーザチップをフェ
ースダウンの状態で支持体にダイボンドしたところ、電
極ずれによるダイボンド自体の歩留まりは９５％以上あ
り、その中でレーザチップの電極間のショートによる歩
留まりは０％であった。またワイヤーの剥がれによる歩
留まりは０％であった。さらにこのレーザ素子を１００
時間連続でパルス発振させたところ、発振中に電極間で
ショートするものは無かった。When the laser chip was die-bonded to the support in a face-down state in the above process, the yield of the die bond itself due to electrode displacement was 95% or more. Among them, the yield due to short circuit between electrodes of the laser chip. Was 0%. The yield due to peeling of the wire was 0%. Furthermore, this laser element is 100
When pulse oscillation was performed continuously for a time, none of the electrodes short-circuited during oscillation.
【００３０】［実施例２］支持体１００の第１の電極２
１の材料をＡｕとＳｉとを含む合金とする。また第２の
電極２２において、第１の層２２１をＣｒとＺｒとを含
む合金とし、中間層２２３をＭｏとＷとを含む合金とす
る他は、実施例１と同様にしてレーザ素子としたとこ
ろ、電極の特性、歩留まり等については実施例１とほぼ
同等の特性を示した。Example 2 First electrode 2 of support 100
The material of No. 1 is an alloy containing Au and Si. Further, in the second electrode 22, a laser element was prepared in the same manner as in Example 1 except that the first layer 221 was an alloy containing Cr and Zr and the intermediate layer 223 was an alloy containing Mo and W. However, the characteristics of the electrode, the yield, and the like were almost the same as those of the first embodiment.
【００３１】［実施例３］支持体１００の第１の電極２
１の材料をＡｕとＧｅとを含む合金とする。また第２の
電極２２において、第１の層２２１をＡｌとＣｒとを含
む合金とし、中間層２２３をＮｉとＭｏとを含む合金と
する他は、実施例１と同様にしてレーザ素子としたとこ
ろ、電極の特性、歩留まり等については実施例１とほぼ
同等の特性を示した。[Embodiment 3] First electrode 2 of support 100
The material of No. 1 is an alloy containing Au and Ge. Further, in the second electrode 22, a laser element was prepared in the same manner as in Example 1 except that the first layer 221 was made of an alloy containing Al and Cr and the intermediate layer 223 was made of an alloy containing Ni and Mo. However, the characteristics of the electrode, the yield, and the like were almost the same as those of the first embodiment.
【００３２】［実施例４］支持体１００の第１の電極２
１ｂの材料をＮｉとＡｕとを含む合金とし、２１ａの材
料をＴｉとＡｌとを含む合金とする。即ちレーザチップ
の電極材料と同一の材料とする。また第２の電極２２に
おいて、第１の層２２１をＡｌとＣｒとを含む合金と
し、中間層２２３をＮｉとする他は、実施例１と同様に
してレーザ素子としたところ、電極の特性、歩留まり等
については実施例１とほぼ同等の特性を示した。[Embodiment 4] First electrode 2 of support 100
The material of 1b is an alloy containing Ni and Au, and the material of 21a is an alloy containing Ti and Al. That is, the same material as the electrode material of the laser chip is used. Further, in the second electrode 22, a laser element was prepared in the same manner as in Example 1 except that the first layer 221 was an alloy containing Al and Cr and the intermediate layer 223 was Ni. The yield and the like showed almost the same characteristics as in Example 1.
【００３３】[0033]
【発明の効果】以上説明したように、本発明の窒化物半
導体素子は、半導体チップの電極と、支持体との電極と
を導電性の接着剤を介さずに接着しているため、非常に
信頼性の高い半導体素子を実現することができる。また
本発明の実施例ではレーザ素子について説明したが、本
発明はレーザ素子に限定するものではなく、窒化物半導
体を用いたＬＥＤ素子、受光素子等のあらゆる半導体デ
バイスに適用できることは言うまでもない。As described above, in the nitride semiconductor device of the present invention, the electrode of the semiconductor chip and the electrode of the support are bonded to each other without a conductive adhesive, so that A highly reliable semiconductor element can be realized. Further, although the laser element has been described in the embodiments of the present invention, it is needless to say that the present invention is not limited to the laser element and can be applied to any semiconductor device such as an LED element and a light receiving element using a nitride semiconductor.
【図面の簡単な説明】[Brief description of drawings]
【図１】 本発明の一実施例に係る窒化物半導体素子の
構造を示す模式断面図。FIG. 1 is a schematic sectional view showing the structure of a nitride semiconductor device according to one embodiment of the present invention.
【図２】 図１の支持体を半導体チップ載置側から見た
平面図。FIG. 2 is a plan view of the support body of FIG. 1 viewed from a semiconductor chip mounting side.
１００・・・・半導体チップ １０３・・・・負電極 １０４・・・・正電極 ２０・・・・支持体 ２１ａ、２１ｂ・・・・第１の電極 ２２ａ、２２ｂ・・・・第２の電極 ２２１ａ、２２１ｂ・・・第１の層 ２２２ａ、２２２ｂ・・・第２の層 ２２３ａ、２２３ｂ・・・中間層 100 ... Semiconductor chip 103 ... Negative electrode 104 ... Positive electrode 20 ... Support 21a, 21b ... First electrode 22a, 22b ... Second electrode 221a, 221b ... first layer 222a, 222b ... second layer 223a, 223b ... intermediate layer
Claims (5)
なる窒化物半導体チップがフェースダウンの状態で支持
体にマウントされてなる窒化物半導体素子において、前
記支持体の表面には、半導体チップの電極位置と対応す
る位置に形成された第１の電極と、その第１の電極と電
気的に接続され、第１の電極よりも面積が大きい第２の
電極とが形成されており、さらに前記半導体チップの電
極は前記第１の電極に直接接続されていることを特徴と
する窒化物半導体素子。1. A nitride semiconductor device in which a nitride semiconductor chip having a pair of positive and negative electrodes provided on the same surface side is mounted face down on a support, wherein a semiconductor is provided on the surface of the support. A first electrode formed at a position corresponding to the electrode position of the chip, and a second electrode electrically connected to the first electrode and having a larger area than the first electrode are formed, Further, the electrode of the semiconductor chip is directly connected to the first electrode, and the nitride semiconductor device is characterized.
形成された第１の層と、第１の電極側に接する側に形成
された第２の層とからなる少なくとも２層構造を有する
ことを特徴とする請求項１に記載の窒化物半導体素子。2. The at least two-layer structure in which the second electrode comprises a first layer formed on the side in contact with the support and a second layer formed on the side in contact with the first electrode. The nitride semiconductor device according to claim 1, further comprising:
形成された第１の層と、第１の電極側に接する側に形成
された第２の層と、さらに前記第１の層と第２の層との
間に形成された中間層からなる少なくとも３層構造を有
することを特徴とする請求項１に記載の窒化物半導体素
子。3. The first electrode, wherein the second electrode is formed on a side in contact with the support, a second layer formed on a side in contact with the first electrode side, and the first layer. 2. The nitride semiconductor device according to claim 1, having at least a three-layer structure including an intermediate layer formed between the layer and the second layer.
（Ｃｒ）、アルミニウム（Ａｌ）、ジルコニウム（Ｚ
ｒ）よりなる群から選択された少なくとも一種を含み、
前記第２の層が少なくとも金（Ａｕ）を含むことを特徴
とする請求項２または３に記載の窒化物半導体素子。4. The first layer comprises titanium (Ti), chromium (Cr), aluminum (Al), zirconium (Z).
r) comprising at least one selected from the group consisting of
The nitride semiconductor device according to claim 2 or 3, wherein the second layer contains at least gold (Au).
（Ｎｉ）、モリブデン（Ｍｏ）、タングステン（Ｗ）よ
りなる群から選択された少なくとも一種を含むことを特
徴とする請求項３または４に記載の窒化物半導体素子。5. The intermediate layer according to claim 3, wherein the intermediate layer contains at least one selected from the group consisting of platinum (Pt), nickel (Ni), molybdenum (Mo), and tungsten (W). The nitride semiconductor device described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11494296A JP3407536B2 (en) | 1996-05-09 | 1996-05-09 | Nitride semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11494296A JP3407536B2 (en) | 1996-05-09 | 1996-05-09 | Nitride semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09298310A true JPH09298310A (en) | 1997-11-18 |
| JP3407536B2 JP3407536B2 (en) | 2003-05-19 |
Family
ID=14650474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11494296A Expired - Fee Related JP3407536B2 (en) | 1996-05-09 | 1996-05-09 | Nitride semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3407536B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11224960A (en) * | 1997-11-19 | 1999-08-17 | Unisplay Sa | Led lamp and led chip |
| JP2004311783A (en) * | 2003-04-08 | 2004-11-04 | Fuji Xerox Co Ltd | Photodetector and its mounting method |
| US7211832B2 (en) | 2004-01-13 | 2007-05-01 | Toyoda Gosei Co., Ltd. | Light emitting apparatus |
| US7947998B2 (en) | 1997-11-19 | 2011-05-24 | Unisplay S.A. | LED lamps |
| US8587020B2 (en) | 1997-11-19 | 2013-11-19 | Epistar Corporation | LED lamps |
-
1996
- 1996-05-09 JP JP11494296A patent/JP3407536B2/en not_active Expired - Fee Related
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11224960A (en) * | 1997-11-19 | 1999-08-17 | Unisplay Sa | Led lamp and led chip |
| JP2010177711A (en) * | 1997-11-19 | 2010-08-12 | Unisplay Sa | Led lamp and led chip |
| US7947998B2 (en) | 1997-11-19 | 2011-05-24 | Unisplay S.A. | LED lamps |
| US8399903B2 (en) | 1997-11-19 | 2013-03-19 | Epistar Corporation | LED lamps |
| US8587020B2 (en) | 1997-11-19 | 2013-11-19 | Epistar Corporation | LED lamps |
| US8592856B2 (en) | 1997-11-19 | 2013-11-26 | Epistar Corporation | LED lamps |
| US8604508B2 (en) | 1997-11-19 | 2013-12-10 | Epistar Corporation | LED lamps |
| US8692268B2 (en) | 1997-11-19 | 2014-04-08 | Epistar Corporation | LED lamps |
| US8779460B2 (en) | 1997-11-19 | 2014-07-15 | Epistar Corporation | Light source unit |
| JP2014220542A (en) * | 1997-11-19 | 2014-11-20 | 晶元光電股▲ふん▼有限公司 | Led lamp and led chip |
| JP2004311783A (en) * | 2003-04-08 | 2004-11-04 | Fuji Xerox Co Ltd | Photodetector and its mounting method |
| US7211832B2 (en) | 2004-01-13 | 2007-05-01 | Toyoda Gosei Co., Ltd. | Light emitting apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3407536B2 (en) | 2003-05-19 |
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