JPH09288961A - Field electron emitter and its manufacture - Google Patents

Field electron emitter and its manufacture

Info

Publication number
JPH09288961A
JPH09288961A JP10173596A JP10173596A JPH09288961A JP H09288961 A JPH09288961 A JP H09288961A JP 10173596 A JP10173596 A JP 10173596A JP 10173596 A JP10173596 A JP 10173596A JP H09288961 A JPH09288961 A JP H09288961A
Authority
JP
Japan
Prior art keywords
emitter
electron emission
field electron
laminated
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10173596A
Other languages
Japanese (ja)
Inventor
Yukihiro Kondo
行広 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP10173596A priority Critical patent/JPH09288961A/en
Publication of JPH09288961A publication Critical patent/JPH09288961A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a field electron emitter whose life is prolonged. SOLUTION: An emitter 5 is deposited over a substrate via a resistor layer. A gate electrode is deposited over the substrate via an insulating layer, and is opposed to the emitter 5 via a predetermined recess serving as an electron emission space. The emitter 5 has four pointed ends 5a that project in the direction of a plane, the angles of the pointed ends 5a being of three kinds, e.g. 45, 30, and 15 degrees. Since plural kinds of emitters 5 with different voltage-current characteristics are formed by forming plural kinds of pointed ends 5a with different angles, even if some of the emitters are damaged when the applied voltage increases as the emitters deteriorate, the emission currents of the remaining emitters increase and compensate them, thereby holding the emission currents roughly constant as a whole.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、電界電子放出素子
とその製造方法に関するものである。
TECHNICAL FIELD The present invention relates to a field electron emission device and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来より、マイクロ波真空管や薄形の表
示装置などの所謂真空マイクロエレクトロニクスデバイ
スの電子源として電界電子放出素子が使用されている。
電界電子放出素子の電子放出特性は、(1)式に示すフ
ァウラーノルドハイムの式に従っており、エミッタの材
質即ち仕事関数、エミッタの尖端部の尖端形状、エミッ
タ−ゲート間の距離、温度などに大きく依存している。
2. Description of the Related Art Conventionally, field electron emission devices have been used as electron sources for so-called vacuum microelectronic devices such as microwave vacuum tubes and thin display devices.
The electron emission characteristics of the field electron emission device follow the Fowler-Nordheim equation shown in the equation (1), and are largely dependent on the material of the emitter, that is, the work function, the tip shape of the tip of the emitter, the distance between the emitter and the gate, and the temperature. Depends on.

【0003】 j=(AF2 /Φ)exp(−BΦ3/2 /F) ・・・(1) F=βV ・・・(2) ここで、jは放出電流密度、A,Bは定数、Φはエミッ
タの仕事関数、Fは電界強度、Vは印加電圧、βはエミ
ッタの尖端部の鋭さやエミッタ−ゲート間の距離などの
幾何学的な量に依存する係数である。なお、係数βはエ
ミッタの尖端部の形状が鋭い程、エミッタ−ゲート間の
距離が短い程大きくなる。
J = (AF 2 / Φ) exp (−BΦ 3/2 / F) (1) F = βV (2) where j is the emission current density and A and B are constants. , Φ is the work function of the emitter, F is the electric field strength, V is the applied voltage, and β is a coefficient depending on geometrical quantities such as the sharpness of the tip of the emitter and the distance between the emitter and the gate. The coefficient β increases as the shape of the tip of the emitter becomes sharper and the distance between the emitter and the gate becomes shorter.

【0004】(1),(2)式より、放出電流密度jは
電界強度Fが大きい程、またエミッタの仕事関数Φが小
さい程、飛躍的に増大する。今、エミッタの仕事関数Φ
を一定とすると、放出電流密度jは次式で表される。こ
こで、A’=A/Φ、B’=BΦ3/2 とする。 j=A’F2 exp(−B’/F) ・・・(3) ここで、(2)式より電界強度Fはエミッタ−ゲート間
の距離やエミッタの尖端部の形状の鋭さに依存している
ので、エミッタ−ゲート間の距離が一定であれば、印加
電圧Vと放出電流Iの関係は図9に示すようになる。エ
ミッタの尖端部の形状をD3 ,D2 ,D1 の順に鋭く形
成した場合、エミッタの尖端部の形状が鋭い程、同じ放
出電流Iを得るために必要な印加電圧Vが低くなってい
る。また、エミッタの尖端部の形状が一定であれば、印
加電圧Vと放出電流Iの関係は図10に示すようにな
る。エミッタ−ゲート間の距離がE3 ,E2 ,E1 の順
で短くなる場合、エミッタ−ゲート間の距離が短いほ
ど、同じ放出電流Iを得るために必要な印加電圧Vが低
くなる。而して、エミッタの尖端部の形状を鋭くした
り、エミッタ−ゲート間の距離をマイクロメーターのオ
ーダーまで狭くしたことにより、比較的低い印加電圧V
で電界放出を発生させることができた。
From equations (1) and (2), the emission current density j increases dramatically as the electric field strength F increases and the work function Φ of the emitter decreases. Now, the work function Φ of the emitter
Assuming that is constant, the emission current density j is expressed by the following equation. Here, it is assumed that A ′ = A / Φ and B ′ = BΦ 3/2 . j = A′F 2 exp (−B ′ / F) (3) Here, the electric field strength F depends on the distance between the emitter and the gate and the sharpness of the shape of the tip of the emitter from the equation (2). Therefore, if the emitter-gate distance is constant, the relationship between the applied voltage V and the emission current I is as shown in FIG. When the shape of the tip of the emitter is made sharper in the order of D 3 , D 2 , and D 1 , the sharper the shape of the tip of the emitter, the lower the applied voltage V required to obtain the same emission current I. . If the shape of the tip of the emitter is constant, the relationship between the applied voltage V and the emission current I is as shown in FIG. When the emitter-gate distance becomes shorter in the order of E 3 , E 2 , and E 1 , the shorter the emitter-gate distance becomes, the lower the applied voltage V required to obtain the same emission current I becomes. By sharpening the shape of the tip of the emitter and narrowing the distance between the emitter and the gate to the order of micrometers, a relatively low applied voltage V
It was possible to generate field emission.

【0005】[0005]

【発明が解決しようとする課題】上記構成の電界電子放
出素子では、所望の電子放出特性を得るために、エミッ
タの尖端部を尖鋭化したり、エミッタ−ゲート間の距離
を高精度に制御しなければならず、従来の半導体プロセ
ス技術で培われた薄膜微細加工技術を用いて加工するこ
とのできる微細構造が必要となる。ところで、電界電子
放出素子ではエミッタ表面が真空中に晒されているの
で、エミッタの電子放出特性はその表面状態に大きく依
存している。また、プロセス工程で発生するエミッタの
尖端形状のばらつきやゲート−エミッタ間の距離のばら
つきによって、エミッタの尖端部に印加される電界強度
が均一にならず、エミッタの放出電流にばらつきが発生
して、エミッタに過電流が流れる場合があり、その過電
流によって発生したジュール熱によりエミッタの尖端部
の温度が融点を超えて、エミッタの尖端部の形状が変形
或いは蒸発する場合があった。
In the field electron emission device having the above structure, the tip of the emitter must be sharpened or the distance between the emitter and the gate must be controlled with high accuracy in order to obtain desired electron emission characteristics. Inevitably, a fine structure that can be processed by using the thin film fine processing technology cultivated in the conventional semiconductor process technology is required. By the way, since the emitter surface of the field electron emission device is exposed to a vacuum, the electron emission characteristics of the emitter largely depend on its surface state. Also, due to variations in the shape of the tip of the emitter and variations in the distance between the gate and the emitter that occur during the process steps, the electric field strength applied to the tip of the emitter may not be uniform, resulting in variations in the emission current of the emitter. In some cases, an overcurrent may flow through the emitter, and the Joule heat generated by the overcurrent may cause the temperature of the tip of the emitter to exceed the melting point and cause the shape of the tip of the emitter to deform or evaporate.

【0006】而して、エミッタの放出電流の増加によっ
て、エミッタの尖端部が破壊されることになり、放出電
流の増加がエミッタの劣化の要因になるという問題点が
あった。また、エミッタの尖端部の温度上昇によって放
出電子電流が増加して、エミッタの劣化が一層促進され
るという問題点もあった。さらに、エミッタの尖端部に
は非常に大きな電界が印加されているので、エミッタの
尖端部の形状が電界から受ける力によって除々に変形し
(ビルトアップ現象)、経時的に尖鋭化するため、エミ
ッタに過電流が発生する原因となり、エミッタの劣化の
要因となるという問題点もあった。
Therefore, there is a problem that the tip of the emitter is destroyed due to the increase of the emission current of the emitter, and the increase of the emission current causes the deterioration of the emitter. There is also a problem that the temperature of the tip of the emitter rises and the emission electron current increases, which further accelerates the deterioration of the emitter. In addition, since a very large electric field is applied to the tip of the emitter, the shape of the tip of the emitter is gradually deformed by the force received from the electric field (build-up phenomenon) and sharpens with time. There is also a problem in that it causes an overcurrent and causes deterioration of the emitter.

【0007】本発明は上記問題点に鑑みて為されたもの
であり、放出電流の安定化を図るとともに長寿命化を図
った電界電子放出素子及びその製造方法を提供すること
にある。
The present invention has been made in view of the above problems, and it is an object of the present invention to provide a field electron emission device having a stable emission current and a long life, and a method for manufacturing the same.

【0008】[0008]

【課題を解決するための手段】請求項1の発明では、上
記目的を達成するために、エッチング保護膜が表面に積
層された基板と、エッチング保護膜上に形成された電圧
−電流特性の異なる複数のエミッタと、エッチング保護
膜上に絶縁層を介して積層され電子放出空間となる所定
の凹所を介してエミッタと対向するゲート電極とを備え
ているので、エミッタの印加電圧が増加しても全体とし
ては放出電流を略一定とすることができる。
In order to achieve the above object, according to the invention of claim 1, a substrate having an etching protection film laminated on its surface and a voltage-current characteristic formed on the etching protection film are different from each other. Since a plurality of emitters and a gate electrode, which is laminated on the etching protection film via an insulating layer and faces the emitter via a predetermined recess serving as an electron emission space, are provided, the voltage applied to the emitter increases. Also, the emission current can be made substantially constant as a whole.

【0009】請求項2の発明では、請求項1の発明にお
いて、エミッタに平面方向に突出する尖端部を設け、尖
端部の尖端形状をエミッタ毎に複数種類変化させてお
り、請求項3の発明では、エミッタとゲート電極との間
の距離をエミッタ毎に複数変化させているので、エミッ
タの印加電圧が増加しても全体としては放出電流を略一
定とすることができる。
According to a second aspect of the present invention, in the first aspect of the invention, the emitter is provided with a pointed portion projecting in a plane direction, and a plurality of pointed shapes of the pointed portion are changed for each emitter. Since the distance between the emitter and the gate electrode is changed for each emitter, the emission current can be made substantially constant as a whole even if the voltage applied to the emitter increases.

【0010】請求項4の発明では、請求項1の電界電子
放出素子を製造するにあたり、基板表面にエッチング保
護膜を積層し、エッチング保護膜上にさらにエミッタを
積層し、エミッタ表面にエッチングマスクを形成し、エ
ミッタをエッチングにより所望の尖端形状の尖端部に形
成しているので、エミッタの尖端部の形状を容易に制御
することができる。
According to the invention of claim 4, in manufacturing the field electron emission device of claim 1, an etching protective film is laminated on the surface of the substrate, an emitter is further laminated on the etching protective film, and an etching mask is formed on the surface of the emitter. Since the emitter is formed and the emitter is formed into a desired pointed tip by etching, the shape of the tip of the emitter can be easily controlled.

【0011】請求項5の発明では、請求項1の電界電子
放出素子を製造するにあたり、基板表面にエッチング保
護膜を積層する際に、エッチング保護膜のゲート電極が
積層される部位に所定の高さの段差を設けており、請求
項6の発明では、基板を予めエッチングして、基板のゲ
ート電極を積層する部位に所定の高さの段差を設けてい
るので、エミッタ−ゲート間の距離を容易に制御するこ
とができる。
According to the invention of claim 5, in manufacturing the field electron emission device according to claim 1, when the etching protection film is laminated on the surface of the substrate, a predetermined height is formed on a portion of the etching protection film where the gate electrode is laminated. According to the invention of claim 6, the substrate is pre-etched to form a step having a predetermined height at a portion of the substrate where the gate electrode is laminated. Therefore, the distance between the emitter and the gate is reduced. It can be controlled easily.

【0012】[0012]

【発明の実施の形態】本発明の実施の形態を図面を参照
して説明する。 (実施形態1)本実施形態の電界電子放出素子は、図2
(f)に示すように、ガラス基板1と、ガラス基板1の
表面に積層された反応性イオンエッチング時のエッチン
グ保護膜としてのAl2 3 層2と、Al2 3 層2上
に形成されたクロムからなるベース電極3と、ベース電
極3上にシリコンからなる抵抗層4を介して積層された
タングステンからなるエミッタ5と、エミッタ5以外の
ベース電極3及びAl23 層2上に形成された絶縁層
8と、絶縁層8上に形成され所定の凹所12を介してエ
ミッタ5と対向するゲート電極9とを備えている。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described with reference to the drawings. (Embodiment 1) The field electron emission device of the present embodiment is shown in FIG.
As shown in (f), it is formed on the glass substrate 1, the Al 2 O 3 layer 2 laminated on the surface of the glass substrate 1 as an etching protection film at the time of reactive ion etching, and the Al 2 O 3 layer 2. On the base electrode 3 and the Al 2 O 3 layer 2 other than the emitter 5 and the base electrode 3 made of chromium, the emitter 5 made of tungsten laminated on the base electrode 3 via the resistance layer 4 made of silicon. The insulating layer 8 is formed, and the gate electrode 9 that is formed on the insulating layer 8 and faces the emitter 5 via a predetermined recess 12.

【0013】この電界電子放出素子の製造方法を図2を
用いて説明する。まず、図2(a)に示すように、ガラ
ス基板1上に反応性イオンエッチング時のエッチング保
護膜としてのAl2 3 層2を電子ビーム蒸着法を用い
て2000Å蒸着し、さらに、Al2 3 層2の表面に
クロムからなるベース電極3を蒸着する。この時、ベー
ス電極3のパターンは蒸着時のメタルマスクでも良い
し、蒸着後にエッチングを行なっても良い。さらに、ベ
ース電極3上にシリコンからなる抵抗層4と、タングス
テンからなるエミッタ5と、アルミニウム層6とを順に
積層する。次に、図2(b)に示すように、アルミニウ
ム層6の表面にフォトレジスト7を塗布して、フォトリ
ソグラフィーにより所望のレジストパターンを形成す
る。そして、フォトレジスト7をエッチングマスクとし
て、アルミニウム層6をエッチングした後、図2(c)
に示すようにフォトレジスト7を除去する。尚、アルミ
ニウム層6のエッチングはドライエッチングでもウェッ
トエッチングでも良い。次に、図2(d)に示すよう
に、アルミニウム層6をエッチングマスクとして、四フ
ッ化塩素(CF4 )等のエッチングガスを用いた反応性
イオンエッチングにより、エミッタ5と抵抗層4をエッ
チングする。この時、エッチング条件を調整することに
より、反応性イオンエッチングに等方性エッチングの傾
向を持たせて、抵抗層4にアンダーカットを発生させ
て、抵抗層4の幅をエミッタ5の幅よりも狭くしてい
る。そして、図2(e)に示すように、抵抗層4以外の
ベース電極3及び酸化アルミニウム層2の表面に、酸化
シリコン(SiO2 )及び酸化アルミニウム(Al2
3 )等からなる絶縁層8と、クロムからなるゲート電極
9とを電子ビーム蒸着によって順に蒸着させる。さら
に、図2(f)に示すように、犠牲層としてのアルミニ
ウム層6を溶解除去(リフトオフ)し、電界電子放出素
子を形成している。
A method of manufacturing this field electron emission device will be described with reference to FIG. First, as shown in FIG. 2 (a), the the Al 2 O 3 layer 2 as an etching protective film during reactive ion etching on the glass substrate 1 to 2000Å deposited by electron beam evaporation, and further, Al 2 A base electrode 3 made of chromium is deposited on the surface of the O 3 layer 2. At this time, the pattern of the base electrode 3 may be a metal mask at the time of vapor deposition, or may be etched after vapor deposition. Further, a resistance layer 4 made of silicon, an emitter 5 made of tungsten, and an aluminum layer 6 are sequentially stacked on the base electrode 3. Next, as shown in FIG. 2B, a photoresist 7 is applied to the surface of the aluminum layer 6 and a desired resist pattern is formed by photolithography. Then, after etching the aluminum layer 6 using the photoresist 7 as an etching mask, FIG.
The photoresist 7 is removed as shown in FIG. The etching of the aluminum layer 6 may be dry etching or wet etching. Next, as shown in FIG. 2D, the emitter 5 and the resistance layer 4 are etched by reactive ion etching using an etching gas such as chlorine tetrafluoride (CF 4 ) with the aluminum layer 6 as an etching mask. To do. At this time, by adjusting the etching conditions, the reactive ion etching has a tendency of isotropic etching to generate an undercut in the resistance layer 4 so that the width of the resistance layer 4 is smaller than that of the emitter 5. It is narrowing. Then, as shown in FIG. 2E, silicon oxide (SiO 2 ) and aluminum oxide (Al 2 O) are formed on the surfaces of the base electrode 3 and the aluminum oxide layer 2 other than the resistance layer 4.
3 ) An insulating layer 8 made of, for example, and a gate electrode 9 made of chromium are sequentially deposited by electron beam evaporation. Further, as shown in FIG. 2F, the aluminum layer 6 as the sacrificial layer is dissolved and removed (lifted off) to form a field electron emission device.

【0014】上述のように、エミッタ5の表面にフォト
レジスト7を形成し、フォトレジスト7をエッチングマ
スクとして、反応性イオンエッチングを行なって、エミ
ッタ5の尖端部5aを所望の形状に精度良く形成するこ
とができるので、エミッタ5の個数や配置を自由に制御
することができる。ここで、エミッタ5のエッチングに
用いるフォトレジスト7のパターンは、図1(a)〜
(d)に示すように、平面方向に鋭く突出する4個の尖
端部5aが形成されており、尖端部5aの角度は、例え
ば、45度〔図1(b)〕、30度〔図1(c)〕、1
5度〔図1(d)〕の3種類に形成されている。3種類
のパターンの尖端部5aはアレイ状に同数配置されてお
り、上述の製造方法を用いて形成されている。
As described above, the photoresist 7 is formed on the surface of the emitter 5, and reactive ion etching is performed using the photoresist 7 as an etching mask to accurately form the tip 5a of the emitter 5 into a desired shape. Therefore, the number and arrangement of the emitters 5 can be freely controlled. Here, the pattern of the photoresist 7 used for etching the emitter 5 is as shown in FIG.
As shown in (d), four sharp tips 5a that project sharply in the plane direction are formed, and the angles of the sharp tips 5a are, for example, 45 degrees [FIG. 1 (b)] and 30 degrees [FIG. (C)], 1
It is formed in three types of 5 degrees [FIG. 1 (d)]. The tip portions 5a of the three types of patterns are arranged in the same number in an array and are formed by using the above-described manufacturing method.

【0015】この電界電子放出素子の電子放出特性を図
3乃至図5に示す。この電界電子放出素子は、図3に示
すように、電子放出を続けると、時間の経過とともにエ
ミッタ5が除々に劣化して、放出電流が除々に減少する
(図3のA)。この時、エミッタ5の印加電圧を増加さ
せて、エミッタ5の劣化による放出電流の低下を補正し
ているが、エミッタ5の印加電圧の増加に伴って、一部
のエミッタ5では過電流が流れ、過電流によるジュール
熱の発生によってエミッタ5の尖端部5aの温度が融点
を超えて、尖端部5aが破壊する。本発明の電界電子放
出素子では、図4に示すように、尖端部5aの形状がr
1 (図4のB1 ),r2 (図4のB2 ),r3 (図4の
3 )のエミッタ5を同数ずつ形成することにより、電
圧−電流特性の異なるエミッタ5を同数ずつ配置してい
るので、印加電圧の増加に伴って、一部のエミッタ5が
破壊しても、残りのエミッタ5の放出電流の増加によ
り、全体としては安定した放出電流を得ることができ
る。尖端部5aの形状がr1 ,r2 ,r3 のエミッタ5
の電圧−電流特性を図5に示す。尖端部5aの形状はr
3 ,r2 ,r1 の順で鋭くなっており、同じ放出電流を
得るために必要な印加電圧はr3 (図5のC3 ),r2
(図5のC2 ),r1 (図5のC1 )の順に小さくなっ
ている。ここで、エミッタ5の印加電圧がV0 に増加し
た場合、尖端部5aの形状がr1 のエミッタでは過電流
が流れ、尖端部5aの形状がr1 のエミッタ5は破損す
るが、尖端部5aの形状がr2 ,r3 のエミッタ5の放
出電流は夫々増加するので、全体としては放出電流を略
一定とすることができる。したがって、時間の経過とと
もに、エミッタ5の印加電圧が増加しても放出電流を安
定化することができ、素子の長寿命化を図ることができ
る。
The electron emission characteristics of this field electron emission device are shown in FIG.
3 to 5 are shown. This field electron emission device is shown in FIG.
As described above, if the electron emission is continued,
The mitter 5 gradually deteriorates, and the emission current gradually decreases.
(A in FIG. 3). At this time, increase the applied voltage of the emitter 5.
To correct the decrease in emission current due to the deterioration of the emitter 5.
However, as the applied voltage to the emitter 5 increases,
Overcurrent flows in the emitter 5 of the
Due to the generation of heat, the temperature of the tip 5a of the emitter 5 melts.
Beyond, the tip 5a breaks. Field electron emission of the present invention
In the output element, as shown in FIG. 4, the shape of the tip 5a is r.
1(B in FIG. 41), RTwo(B in FIG. 4Two), RThree(Of FIG. 4
BThreeBy forming the same number of emitters 5) of
The same number of emitters 5 having different pressure-current characteristics are arranged.
Therefore, as the applied voltage increases, some of the emitters 5
Even if it is destroyed, the emission current of the remaining emitters 5 will increase.
Therefore, a stable emission current can be obtained as a whole.
You. The shape of the tip 5a is r1, RTwo, RThreeEmitter 5
FIG. 5 shows the voltage-current characteristics of the. The shape of the tip 5a is r
Three, RTwo, R1It becomes sharper in the order of
The applied voltage required to obtain is rThree(C in FIG. 5Three), RTwo
(C in FIG. 5Two), R1(C in FIG. 51) Decreasing in order
ing. Here, the applied voltage of the emitter 5 is V0Increased to
If the shape of the tip 5a is r1Overcurrent in the emitter of
Flow and the shape of the tip 5a is r1The emitter 5 of is damaged
However, the shape of the tip 5a is rTwo, RThreeRelease of the emitter 5
Since the output current increases, the emission current is reduced as a whole.
It can be constant. Therefore, with the passage of time
Even if the applied voltage of the emitter 5 is increased, the emission current is reduced.
Can be standardized and the life of the device can be extended.
You.

【0016】尚、本実施形態の電界電子放出素子では、
エミッタ5の尖端部5aの角度を3種類設けたが、尖端
部5aの種類を3種類に限定する趣旨のものではなく、
2種類としてもよい。 (実施形態2)実施形態1ではエミッタ5の尖端部5a
の形状を複数種類形成して電圧−電流特性の異なるエミ
ッタ5を形成したが、本実施形態ではエミッタ5とゲー
ト電極9との距離を複数変化させることにより、エミッ
タ5の電圧−電流特性を変化させている。
In the field electron emission device of this embodiment,
Although three types of angles of the tip 5a of the emitter 5 are provided, it is not intended to limit the number of types of the tip 5a to three,
It may be two types. (Embodiment 2) In Embodiment 1, the tip 5a of the emitter 5 is
The emitter 5 having different voltage-current characteristics is formed by forming a plurality of shapes, but in the present embodiment, the voltage-current characteristics of the emitter 5 are changed by changing the distance between the emitter 5 and the gate electrode 9. I am letting you.

【0017】ところで、図6に示すように、エッチング
保護膜2上のベース電極3以外の部位にAl2 3 層1
0、絶縁層8、Al2 3 層11及びゲート電極9が順
に積層されている場合、エミッタ5とゲート電極9との
距離dは、犠牲層たるアルミニウム層6のエミッタ5か
らの突出量をdS 、絶縁層8とゲート電極9及びAl 2
3 層10,11の膜厚をt、絶縁層8とゲート電極9
及びAl2 3 層10,11の端面の傾斜角をθとする
と、 d=ds +t・tanθ ・・・(4) と表される。ここで、傾斜角θは略一定であるので、エ
ミッタ−ゲート間の距離dはアルミニウム層6の突出量
s と、絶縁層8とゲート電極9及びAl2 3層1
0,11の膜厚tに依存している。ここで、アルミニウ
ム層6をリフトオフし易くするためには突出量ds を大
きくする必要があるが、エミッタ−ゲート間の距離dを
短くするために、突出量ds を略一定としている。
By the way, as shown in FIG.
Al on the part other than the base electrode 3 on the protective film 2TwoOThreeLayer 1
0, insulating layer 8, AlTwoOThreeLayer 11 and gate electrode 9 are in order
Of the emitter 5 and the gate electrode 9
The distance d depends on whether the emitter 5 of the aluminum layer 6, which is a sacrificial layer,
The amount of protrusionS, Insulating layer 8 and gate electrode 9 and Al Two
OThreeThe thickness of the layers 10 and 11 is t, the insulating layer 8 and the gate electrode 9 are
And AlTwoOThreeLet θ be the inclination angle of the end faces of the layers 10 and 11.
And, d = ds+ T · tan θ is expressed as (4). Here, since the inclination angle θ is substantially constant,
The distance d between the mitter and the gate is the amount of protrusion of the aluminum layer 6.
ds, Insulating layer 8, gate electrode 9 and AlTwoOThreeLayer 1
It depends on the film thickness t of 0 and 11. Where Aluminium
In order to make it easier to lift off the vacuum layer 6, the protrusion amount dsIs large
The distance d between the emitter and the gate must be
To make it shorter, the protrusion amount dsIs almost constant.

【0018】したがって、エミッタ−ゲート間の距離d
は絶縁層8とゲート電極9及びAl 2 3 層10,11
の膜厚tに依存するが、膜厚tは絶縁層8の厚みによっ
て略決定され、絶縁層8の厚みは絶縁耐圧によって決ま
るので、距離dを小さくするために膜厚tを薄くするこ
とはできない。500V程度の絶縁耐圧を得るために
は、絶縁層8の厚みは1μm程度必要である。
Therefore, the distance d between the emitter and the gate
Is an insulating layer 8, a gate electrode 9 and Al TwoOThreeLayers 10 and 11
The thickness t depends on the thickness t of the insulating layer 8.
The thickness of the insulating layer 8 is determined by the withstand voltage.
Therefore, the film thickness t should be reduced in order to reduce the distance d.
I can not do such a thing. To obtain a dielectric strength of about 500V
The insulating layer 8 needs to have a thickness of about 1 μm.

【0019】而して、本実施形態の電界電子放出素子で
は、膜厚tを薄くする代わりに、図7に示すように、実
施形態1で説明した製造工程においてガラス基板1の表
面にAl2 3 層2を形成する際に、Al2 3 層2を
リン酸系の酸でウェットエッチングして、Al2 3
2のゲート電極9を積層する部位に所定の高さの段差2
aを設けて、エミッタ−ゲート間の距離dを制御してい
る。
Therefore, in the field electron emission device of this embodiment, instead of reducing the film thickness t, as shown in FIG. 7, Al 2 is formed on the surface of the glass substrate 1 in the manufacturing process described in the first embodiment. When the O 3 layer 2 is formed, the Al 2 O 3 layer 2 is wet-etched with a phosphoric acid to form a step 2 having a predetermined height at a portion of the Al 2 O 3 layer 2 where the gate electrode 9 is laminated.
By providing a, the distance d between the emitter and the gate is controlled.

【0020】このようにして、エミッタ−ゲート間の距
離dが異なるエミッタ5を複数種類形成することによ
り、電圧−電流特性の異なるエミッタ5を同数ずつ配置
することができ、印加電圧の増加に伴って、一部のエミ
ッタ5が破壊しても、残りのエミッタ5の放出電流の増
加により、全体としては安定した放出電流を得ることが
できるので、素子の長寿命化が実現できる。
By forming a plurality of types of emitters 5 having different emitter-gate distances d in this manner, the same number of emitters 5 having different voltage-current characteristics can be arranged, and as the applied voltage increases. Thus, even if some of the emitters 5 are destroyed, the emission current of the remaining emitters 5 increases and a stable emission current can be obtained as a whole, so that the life of the device can be extended.

【0021】尚、本実施形態では、Al2 3 層2を、
リン酸系の酸を用いてウェットエッチングしたが、水酸
化ナトリウムや水酸化カリウム等のアルカリ或いはリン
酸、硝酸からなる混酸等の酸を用いてウェットエッチン
グしても良いし、ドライエッチングしても良い。尚、本
実施形態では、エミッタ−ゲート間の距離dのみを複数
種類変化させているが、エミッタ−ゲート間の距離dを
複数種類変化させるとともに、エミッタ5の尖端部5a
の形状を複数種類変化させても良い。 (実施形態3)実施形態2ではエミッタ−ゲート間の距
離dを制御するためにAl2 3 層2に段差2aを設け
たが、本実施形態ではガラス基板に段差を設けている。
In this embodiment, the Al 2 O 3 layer 2 is
Wet etching was performed using a phosphoric acid, but wet etching may be performed using an alkali such as sodium hydroxide or potassium hydroxide or an acid such as phosphoric acid or a mixed acid consisting of nitric acid, or dry etching may be performed. good. In the present embodiment, only the emitter-gate distance d is changed in plural types, but the emitter-gate distance d is changed in plural types and the tip 5a of the emitter 5 is changed.
A plurality of shapes may be changed. (Embodiment 3) Embodiment 2 In the emitter - it is provided with a step 2a to the Al 2 O 3 layer 2 to control the distance d between the gate, in the present embodiment is provided with a step on the glass substrate.

【0022】すなわち、ガラス基板1にエッチング保護
膜2を形成する前に、ガラス基板1を四フッ化炭素(C
4 )ガスを主成分とするエッチングガスを用いてドラ
イエッチングして、ガラス基板1の絶縁層8を積層する
部位に所望の高さの段差1aを形成し、エミッタ−ゲー
ト間の距離dを制御している。このようにして、エミッ
タ−ゲート間の距離dが異なるエミッタ5を複数種類形
成することにより、電圧−電流特性の異なるエミッタ5
を同数ずつ配置することができ、印加電圧の増加に伴っ
て、一部のエミッタ5が破壊しても、残りのエミッタ5
の放出電流の増加により、全体としては安定した放出電
流を得ることができるので、素子の長寿命化が実現でき
る。
That is, before forming the etching protection film 2 on the glass substrate 1, the glass substrate 1 is coated with carbon tetrafluoride (C).
F 4 ) Dry etching is performed using an etching gas containing gas as a main component to form a step 1a having a desired height at a portion of the glass substrate 1 where the insulating layer 8 is laminated, and a distance d between the emitter and the gate is set. Have control. By thus forming a plurality of types of emitters 5 having different emitter-gate distances d, the emitters 5 having different voltage-current characteristics are formed.
Can be arranged in the same number, and even if some of the emitters 5 are destroyed as the applied voltage increases, the remaining emitters 5
By increasing the emission current of, the stable emission current can be obtained as a whole, so that the life of the device can be extended.

【0023】尚、本実施形態では、エミッタ−ゲート間
の距離dのみを複数種類変化させているが、エミッタ−
ゲート間の距離dを複数種類変化させるとともに、エミ
ッタ5の尖端部5aの形状を複数種類変化させても良
い。
In this embodiment, only a plurality of types of the distance d between the emitter and the gate are changed.
A plurality of types of the distance d between the gates may be changed and a plurality of types of the tip 5a of the emitter 5 may be changed.

【0024】[0024]

【発明の効果】請求項1の発明は、上述のように、エッ
チング保護膜が表面に積層された基板と、エッチング保
護膜上に形成された電圧−電流特性の異なる複数のエミ
ッタと、エッチング保護膜上に絶縁層を介して積層され
電子放出空間となる所定の凹所を介してエミッタと対向
するゲート電極とを備えており、放出電流を経時的に安
定化することができ、長寿命化を図ることができるとい
う効果がある。
As described above, according to the present invention, a substrate having an etching protection film laminated on the surface thereof, a plurality of emitters formed on the etching protection film and having different voltage-current characteristics, and etching protection. Equipped with a gate electrode facing the emitter through a predetermined recess that becomes an electron emission space by being laminated on the film via an insulating layer, the emission current can be stabilized over time, and the life can be extended. There is an effect that can be achieved.

【0025】請求項2の発明は、エミッタに平面方向に
突出する尖端部を設け、尖端部の尖端形状をエミッタ毎
に複数種類変化させており、請求項3の発明は、エミッ
タとゲート電極との間の距離をエミッタ毎に複数変化さ
せているので、放出電流を経時的に安定化することがで
き、長寿命化を図ることができるという効果がある。請
求項4の発明は、請求項2の発明において、基板表面に
エッチング保護膜を積層し、エッチング保護膜上にさら
にエミッタを積層し、エミッタ表面にエッチングマスク
を形成し、エミッタをエッチングにより所望の尖端形状
の尖端部に形成しているので、エミッタの尖端部の形状
を容易に制御することができ、簡易な製造プロセスで長
寿命化を図った電界電子放出素子を製造できるという効
果がある。
According to a second aspect of the present invention, the emitter is provided with a pointed portion projecting in the plane direction, and a plurality of types of pointed shape of the pointed portion are changed for each emitter. Since a plurality of distances are changed for each emitter, the emission current can be stabilized over time and the life can be extended. According to a fourth aspect of the present invention, in the second aspect, an etching protection film is laminated on the surface of the substrate, an emitter is further laminated on the etching protection film, an etching mask is formed on the surface of the emitter, and the emitter is etched to a desired shape. Since it is formed at the tip of the tip shape, the shape of the tip of the emitter can be easily controlled, and there is an effect that it is possible to manufacture a field electron emission device having a long life by a simple manufacturing process.

【0026】請求項5の発明は、請求項3の発明におい
て、基板表面にエッチング保護膜を積層する際に、エッ
チング保護膜のゲート電極が積層される部位に所定の高
さの段差を設けているので、エミッタ−ゲート間の距離
を容易に制御することができ、簡易な製造プロセスで長
寿命化を図った電界電子放出素子を製造できるという効
果がある。
According to a fifth aspect of the present invention, in the third aspect of the present invention, when the etching protection film is laminated on the substrate surface, a step having a predetermined height is provided at a portion of the etching protection film where the gate electrode is laminated. Therefore, it is possible to easily control the distance between the emitter and the gate, and it is possible to manufacture a field electron emission device having a long life by a simple manufacturing process.

【0027】請求項6の発明は、請求項3の発明におい
て、基板を予めエッチングして、基板のゲート電極を積
層する部位に所定の高さの段差を設けているので、エミ
ッタ−ゲート間の距離を容易に制御することができ、簡
易な製造プロセスで長寿命化を図った電界電子放出素子
を製造できるという効果がある。
According to a sixth aspect of the present invention, in the third aspect of the invention, the substrate is pre-etched to provide a step having a predetermined height at a portion of the substrate where the gate electrode is laminated. It is possible to easily control the distance, and it is possible to manufacture a field electron emission device having a long life by a simple manufacturing process.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施形態1の電界電子放出素子のエミッタを示
し、(a)は平面図、(b)〜(d)は要部拡大図であ
る。
1A and 1B show an emitter of a field electron emission device according to a first embodiment, FIG. 1A is a plan view, and FIGS.

【図2】同上の製造方法を示し、(a)〜(f)は各工
程の断面図である。
FIG. 2 shows the same manufacturing method as above, and (a) to (f) are cross-sectional views of respective steps.

【図3】同上の時間と放出電流の関係を示す図である。FIG. 3 is a diagram showing the relationship between time and emission current of the above.

【図4】同上のエミッタの尖端部の形状と個数の関係を
示す図である。
FIG. 4 is a diagram showing the relationship between the shape and the number of tip portions of the above-mentioned emitter.

【図5】同上の電圧電流特性を示す図である。FIG. 5 is a diagram showing a voltage-current characteristic of the above.

【図6】電界電子放出素子のエミッタ−ゲート間の距離
を説明する断面図である。
FIG. 6 is a cross-sectional view illustrating a distance between an emitter and a gate of a field electron emission device.

【図7】実施形態2の電界電子放出素子を示す断面図で
ある。
FIG. 7 is a cross-sectional view showing a field electron emission device of Embodiment 2.

【図8】実施形態3の電界電子放出素子を示す断面図で
ある。
FIG. 8 is a sectional view showing a field electron emission device according to a third embodiment.

【図9】電圧電子放出素子のエミッタの尖端形状を変化
させた場合の電圧電流特性を示す図である。
FIG. 9 is a diagram showing voltage-current characteristics when the tip shape of the emitter of the voltage electron-emitting device is changed.

【図10】同上のエミッタ−ゲート間の距離を変化させ
た場合の電圧電流特性を示す図である。
FIG. 10 is a diagram showing a voltage-current characteristic when the distance between the emitter and the gate in the above is changed.

【符号の説明】[Explanation of symbols]

5 エミッタ 5a 尖端部 5 Emitter 5a Tip

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】エッチング保護膜が表面に積層された基板
と、前記エッチング保護膜上に形成された電圧−電流特
性の異なる複数のエミッタと、前記エッチング保護膜上
に絶縁層を介して積層され電子放出空間となる所定の凹
所を介して前記エミッタと対向するゲート電極とを備え
て成ることを特徴とする電界電子放出素子。
1. A substrate having an etching protection film laminated on the surface thereof, a plurality of emitters formed on the etching protection film and having different voltage-current characteristics, and laminated on the etching protection film with an insulating layer interposed therebetween. A field electron emission device comprising a gate electrode facing the emitter via a predetermined recess serving as an electron emission space.
【請求項2】前記エミッタに平面方向に突出する尖端部
を設け、前記尖端部の尖端形状を前記エミッタ毎に複数
種類変化させて成ることを特徴とする請求項1記載の電
界電子放出素子。
2. The field electron emission device according to claim 1, wherein the emitter is provided with a pointed portion protruding in a plane direction, and a plurality of types of pointed shapes of the pointed portion are changed for each of the emitters.
【請求項3】前記エミッタと前記ゲート電極との間の距
離を前記エミッタ毎に複数種類変化させて成ることを特
徴とする請求項1記載の電界電子放出素子。
3. The field electron emission device according to claim 1, wherein a plurality of types of distances between the emitter and the gate electrode are changed for each emitter.
【請求項4】請求項1記載の電界電子放出素子を製造す
るにあたり、前記基板表面に前記エッチング保護膜を積
層し、前記エッチング保護膜上にさらにエミッタを積層
し、前記エミッタ表面にエッチングマスクを形成し、前
記エミッタをエッチングにより所望の尖端形状の尖端部
に形成することを特徴とする電界電子放出素子の製造方
法。
4. In manufacturing the field electron emission device according to claim 1, the etching protection film is laminated on the substrate surface, an emitter is further laminated on the etching protection film, and an etching mask is formed on the emitter surface. A method of manufacturing a field electron emission device, characterized in that the emitter is formed and the emitter is formed in a desired sharp tip by etching.
【請求項5】請求項1記載の電界電子放出素子を製造す
るにあたり、前記基板表面に前記エッチング保護膜を積
層する際に、前記エッチング保護膜の前記ゲート電極が
積層される部位に所定の高さの段差を設けることを特徴
とする電界電子放出素子の製造方法。
5. The method of manufacturing the field electron emission device according to claim 1, wherein when the etching protection film is laminated on the surface of the substrate, a predetermined height is provided on a portion of the etching protection film where the gate electrode is laminated. A method for manufacturing a field electron emission device, characterized in that a step difference in height is provided.
【請求項6】前記基板を予めエッチングして、前記基板
の前記ゲート電極を積層する部位に所定の高さの段差を
設けて成ることを特徴とする請求項5記載の電界電子放
出素子の製造方法。
6. The method for manufacturing a field electron emission device according to claim 5, wherein the substrate is pre-etched to provide a step having a predetermined height at a portion of the substrate where the gate electrode is laminated. Method.
JP10173596A 1996-04-23 1996-04-23 Field electron emitter and its manufacture Pending JPH09288961A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10173596A JPH09288961A (en) 1996-04-23 1996-04-23 Field electron emitter and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10173596A JPH09288961A (en) 1996-04-23 1996-04-23 Field electron emitter and its manufacture

Publications (1)

Publication Number Publication Date
JPH09288961A true JPH09288961A (en) 1997-11-04

Family

ID=14308520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10173596A Pending JPH09288961A (en) 1996-04-23 1996-04-23 Field electron emitter and its manufacture

Country Status (1)

Country Link
JP (1) JPH09288961A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365481B2 (en) 2001-12-10 2008-04-29 Matsushita Electric Industrial Co., Ltd. Field emission device with change in emission property

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7365481B2 (en) 2001-12-10 2008-04-29 Matsushita Electric Industrial Co., Ltd. Field emission device with change in emission property

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